KR960026191U - Image data processing device - Google Patents
Image data processing deviceInfo
- Publication number
- KR960026191U KR960026191U KR2019940034864U KR19940034864U KR960026191U KR 960026191 U KR960026191 U KR 960026191U KR 2019940034864 U KR2019940034864 U KR 2019940034864U KR 19940034864 U KR19940034864 U KR 19940034864U KR 960026191 U KR960026191 U KR 960026191U
- Authority
- KR
- South Korea
- Prior art keywords
- image data
- data processing
- processing device
- image
- processing
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N21/00—Selective content distribution, e.g. interactive television or video on demand [VOD]
- H04N21/40—Client devices specifically adapted for the reception of or interaction with content, e.g. set-top-box [STB]; Operations thereof
- H04N21/41—Structure of client; Structure of client peripherals
- H04N21/426—Internal components of the client ; Characteristics thereof
- H04N21/42607—Internal components of the client ; Characteristics thereof for processing the incoming bitstream
- H04N21/42615—Internal components of the client ; Characteristics thereof for processing the incoming bitstream involving specific demultiplexing arrangements
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
- H03K19/1737—Controllable logic circuits using multiplexers
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
- H04N19/124—Quantisation
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
- H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
- H04N19/136—Incoming video signal characteristics or properties
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
- H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
- H04N19/423—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation characterised by memory arrangements
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019940034864U KR0117570Y1 (en) | 1994-12-21 | 1994-12-21 | Image data processing apparatus |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR2019940034864U KR0117570Y1 (en) | 1994-12-21 | 1994-12-21 | Image data processing apparatus |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960026191U true KR960026191U (en) | 1996-07-22 |
KR0117570Y1 KR0117570Y1 (en) | 1998-05-15 |
Family
ID=19402042
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR2019940034864U KR0117570Y1 (en) | 1994-12-21 | 1994-12-21 | Image data processing apparatus |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0117570Y1 (en) |
-
1994
- 1994-12-21 KR KR2019940034864U patent/KR0117570Y1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0117570Y1 (en) | 1998-05-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E701 | Decision to grant or registration of patent right | ||
REGI | Registration of establishment | ||
FPAY | Annual fee payment |
Payment date: 20090130 Year of fee payment: 12 |
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EXPY | Expiration of term |