KR960026190U - HD decoder's vertical interpolation device - Google Patents

HD decoder's vertical interpolation device

Info

Publication number
KR960026190U
KR960026190U KR2019940034379U KR19940034379U KR960026190U KR 960026190 U KR960026190 U KR 960026190U KR 2019940034379 U KR2019940034379 U KR 2019940034379U KR 19940034379 U KR19940034379 U KR 19940034379U KR 960026190 U KR960026190 U KR 960026190U
Authority
KR
South Korea
Prior art keywords
decoder
vertical interpolation
interpolation device
vertical
interpolation
Prior art date
Application number
KR2019940034379U
Other languages
Korean (ko)
Other versions
KR0119392Y1 (en
Inventor
안정일
Original Assignee
엘지전자주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 엘지전자주식회사 filed Critical 엘지전자주식회사
Priority to KR2019940034379U priority Critical patent/KR0119392Y1/en
Publication of KR960026190U publication Critical patent/KR960026190U/en
Application granted granted Critical
Publication of KR0119392Y1 publication Critical patent/KR0119392Y1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level
    • H04N7/0135—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level involving interpolation processes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1737—Controllable logic circuits using multiplexers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/015—High-definition television systems
KR2019940034379U 1994-12-16 1994-12-16 Vertical interpolation device of hdtv decoder KR0119392Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019940034379U KR0119392Y1 (en) 1994-12-16 1994-12-16 Vertical interpolation device of hdtv decoder

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019940034379U KR0119392Y1 (en) 1994-12-16 1994-12-16 Vertical interpolation device of hdtv decoder

Publications (2)

Publication Number Publication Date
KR960026190U true KR960026190U (en) 1996-07-22
KR0119392Y1 KR0119392Y1 (en) 1998-07-15

Family

ID=19401639

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019940034379U KR0119392Y1 (en) 1994-12-16 1994-12-16 Vertical interpolation device of hdtv decoder

Country Status (1)

Country Link
KR (1) KR0119392Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100688151B1 (en) * 2004-12-09 2007-03-02 한국생산기술연구원 Pre-treatment method and device of an image data by a logical circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100688151B1 (en) * 2004-12-09 2007-03-02 한국생산기술연구원 Pre-treatment method and device of an image data by a logical circuit

Also Published As

Publication number Publication date
KR0119392Y1 (en) 1998-07-15

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