KR960024922A - Microprocessor system with program loader - Google Patents

Microprocessor system with program loader Download PDF

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Publication number
KR960024922A
KR960024922A KR1019940039007A KR19940039007A KR960024922A KR 960024922 A KR960024922 A KR 960024922A KR 1019940039007 A KR1019940039007 A KR 1019940039007A KR 19940039007 A KR19940039007 A KR 19940039007A KR 960024922 A KR960024922 A KR 960024922A
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KR
South Korea
Prior art keywords
rom
microprocessor
ram
program
storing
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Application number
KR1019940039007A
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Korean (ko)
Inventor
오승목
Original Assignee
김광호
삼성전자 주식회사
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Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019940039007A priority Critical patent/KR960024922A/en
Publication of KR960024922A publication Critical patent/KR960024922A/en

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Abstract

마이크로프로세서의 운용프로그램을 격납한 메모리에서의 소비전력을 절감하는 메모리구성을 갖는 마이크로 프로세서 시스템이 개시된다.A microprocessor system having a memory configuration for reducing power consumption in a memory containing an operating program of a microprocessor is disclosed.

본 발명에 따른 마이크로프로세서 시스템은 마이크로프로세서와 상기 마이크로프로세서의 프로그램을 격납하는 롬을 갖는 시스템에 있어서, 상기 롬에 격납된 프로그램의 복사본이 저장되고, 상기 마이크로컴퓨터에 의해 액세스되는 램; 및 시스템의 초기동작시 상기 롬에 격납된 운용프로그램을 상기 롬에 격납시켜주는 프로그램로더를 포함함을 특징으로 한다.A microprocessor system according to the present invention comprises: a system having a microprocessor and a ROM storing a program of the microprocessor, the system comprising: a RAM in which a copy of a program stored in the ROM is stored and accessed by the microcomputer; And a program loader for storing the operating program stored in the ROM in the ROM during the initial operation of the system.

한 발명에 따른 마이크로프로세서 시스템에서는 롬에 격납된 프로그램을 램에 복사시켜두고 마이크로프로세서가 램을 액세스하여 프로그램을 독취하게 함으로써 시스템의 소비전력을 절감시키는 효과를 갖는다.In the microprocessor system according to the present invention, the program stored in the ROM is copied to RAM and the microprocessor accesses the RAM to read the program, thereby reducing power consumption of the system.

Description

프로그램로더를 갖는 마이크로프로세서 시스템.Microprocessor system with a program loader.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 마이크로프로세서 시스템을 보이는 블럭도이다. 제4도는 제2도에 도시된 장치의 버스 시스템의 다른 예를 보이는 도면이다, 제5도는 제2도에 도시된 프로그램로더의 일실시예를 보이는 블럭도이다.2 is a block diagram showing a microprocessor system according to the present invention. FIG. 4 is a diagram showing another example of the bus system of the apparatus shown in FIG. 2. FIG. 5 is a block diagram showing one embodiment of the program loader shown in FIG.

Claims (3)

마이크로프로세서와 상기 마이크로프로세서의 프로그램을 격납하는 롬을 갖는 시스템에 있어서, 상기 롬에 격납된 프로그램의 복사본이 저장되고, 상기 마이크로컴퓨터에 의해 액세스되는 램; 및 시스템의 초기동작시 상기 롬에 격납된 운용프로그램을 상기 롬에 격납시켜주는 프로그램로더를 포함하는 마이크로프로세서 시스템.CLAIMS 1. A system having a microprocessor and a ROM storing a program of the microprocessor, the system comprising: a RAM storing a copy of a program stored in the ROM and accessed by the microcomputer; And a program loader for storing an operating program stored in the ROM in the ROM during an initial operation of the system. 제2항에 있어서, 상기 프로그램로더는 시스템의 초기동작시 마이프로프로세서에 전송되는 DMA 리퀘스트신호를 발생하고; 마이크로프로세서로부터 전송되는 버스허가(BUS GRANT) 신호에 응답하여 롬어드레스 카운터(52) 및 램어드레스 카운터(54)의 계수동작을 트리거(trigger) 시키는 시퀸스제어부; 상기 롬의 독출어드페스를 발생하는 롬어드레스 카운터; 상기 램의 기록어드레스를 발생하는 램어드레스 카운터; 상기 롬으로부터 독출된 데이타 길이와 상기 마이크로프로세서에서취급되는 데이타 길이와의 차이를 완충시키는 버퍼수단을 구비함을 특징으로 하는 마이크로프로세서 시스템.3. The system of claim 2, wherein the program loader generates a DMA request signal that is sent to the microprocessor during initial operation of the system; A sequence control unit which triggers a counting operation of the ROM address counter 52 and the RAM address counter 54 in response to a BUS GRANT signal transmitted from the microprocessor; A ROM address counter for generating a read address of the ROM; A RAM address counter for generating a write address of the RAM; And buffer means for buffering a difference between the data length read from the ROM and the data length handled by the microprocessor. 제3항에 있어서, 상기 버퍼수단은 상기 롬으로부터 독출된 비트열을 상기 마이크로프로세서에서 취급되는 데이타길이를 갖는 병렬데이타로 변환시켜 상기 램에 제공하는 직/병렬변환기임을 특징으로 하는 마이크로프로세서 시스템.4. The microprocessor system of claim 3, wherein the buffer means converts a bit string read from the ROM into parallel data having a data length handled by the microprocessor and provides the serial / parallel converter to the RAM. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940039007A 1994-12-29 1994-12-29 Microprocessor system with program loader KR960024922A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940039007A KR960024922A (en) 1994-12-29 1994-12-29 Microprocessor system with program loader

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Application Number Priority Date Filing Date Title
KR1019940039007A KR960024922A (en) 1994-12-29 1994-12-29 Microprocessor system with program loader

Publications (1)

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KR960024922A true KR960024922A (en) 1996-07-20

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57176456A (en) * 1981-04-22 1982-10-29 Fanuc Ltd Data processing system
JPS58184656A (en) * 1982-04-22 1983-10-28 Nec Corp Program storage system
JPS6160131A (en) * 1984-08-31 1986-03-27 Toshiba Corp Microprogram controller
JPS62249231A (en) * 1986-04-23 1987-10-30 Pfu Ltd Microprogram control processing system
JPH01261758A (en) * 1988-04-13 1989-10-18 Canon Inc Computer system
JPH0228859A (en) * 1988-07-19 1990-01-30 Seiko Epson Corp Electronic computer

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57176456A (en) * 1981-04-22 1982-10-29 Fanuc Ltd Data processing system
JPS58184656A (en) * 1982-04-22 1983-10-28 Nec Corp Program storage system
JPS6160131A (en) * 1984-08-31 1986-03-27 Toshiba Corp Microprogram controller
JPS62249231A (en) * 1986-04-23 1987-10-30 Pfu Ltd Microprogram control processing system
JPH01261758A (en) * 1988-04-13 1989-10-18 Canon Inc Computer system
JPH0228859A (en) * 1988-07-19 1990-01-30 Seiko Epson Corp Electronic computer

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