KR960024865A

KR960024865A - Hardware scroll device and method

Info

Publication number: KR960024865A
Application number: KR1019940033079A
Authority: KR
Inventors: 김대현
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1994-12-07
Filing date: 1994-12-07
Publication date: 1996-07-20
Also published as: KR0123276B1

Abstract

본 발명은 개인용 컴퓨터(PC)상에서의 스크롤(scroll) 방법을 하드웨어로 구현하여 1~512라인까지의 화면이동을 상/하,좌/우 관계없이 빠른 속도로 스크롤할 수 있도록 한 하드웨어적인 스크롤 장치 및 그 방법에 관한 것으로, 기존 모니터에사용되는 스크롤 방법은 중앙처리장치(CPU) 내부에서 어셈블리 언어의 명령어를 이용하여 소프트웨어(S/W)적인 방법으로처리하거나, 그래픽 기능 가운데서 적절한 페이지(page)모드를 선택하여 스크롤 기능을 수행하므로서, 로우 스피드 클럭(low speed clock)을 사용하거나 그래픽 그림을 스크롤 할 때는 속도가 현저하게 저하되어 사용시 불편함을 느끼는 문제점이 있는 바, 본 발명은 종래의 문제점을 해결하기 위해 비디오 램으로부터 읽혀지는 데이타들의 번지를 원하는 스크롤번지만큼 변경시켜 적어도 2프레임 안에서 스크롤 기능이 가능하도록 한 스크롤 장치 및 그 방법을 제공하여 소프트웨어적으로 실행하던 화면의 스크롤 기능을 하드웨어적으로 구현하므로써, 1~512라인까지의 원하는 스크롤 사이즈 만큼을 1/60 프레임의 속도로 화면 이동시킬 수 있어 스크롤 속도를 현저히 향상시키는 효과가 있다.The present invention implements a scrolling method on a personal computer (PC) by hardware, so that the scrolling device from 1 to 512 lines can be scrolled at high speed regardless of up / down, left / right hardware And a scrolling method used in a conventional monitor may be processed in a software (S / W) method using instructions of an assembly language inside a central processing unit (CPU), or an appropriate page among graphic functions. By selecting a mode to perform a scroll function, when using a low speed clock (scrolling) or scrolling graphic pictures, there is a problem that the speed is significantly lowered to feel uncomfortable in use, the present invention is a conventional problem To solve this problem, change the address of the data read from the video RAM by the desired scrolling address. By providing a scrolling device and a method to enable the scrolling function, and hardware-implementing the scrolling function of the screen executed by software, the screen scrolls at the speed of 1/60 frames by the desired scroll size from 1 to 512 lines. This can significantly improve the scrolling speed.

Description

Hardware scroll device and method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명의 전반적인 구성도, 제2도는 제1도 스크롤 제어기의 세부 구성도, 제3도는 제2도 스크롤모드 제어기의 실시도.FIG. 1 is a general configuration diagram of the present invention, FIG. 2 is a detailed configuration diagram of a first scroll controller, and FIG. 3 is an embodiment of a scroll mode controller.

Claims

An apparatus for scrolling a screen of a monitor, comprising: a register unit (10) driven by a central processing unit (CPU); A FIFO 2Q for sequentially storing data output from the register unit 10 for a while; A cathode ray tube (CRT) controller 30 for outputting a vertical synchronization signal v_sync and controlling a screen; A graphics processor 40 for performing various graphics functions; A memory controller 50 which receives the data context (d_c) signal from the pipo 20 and outputs various signals (ras, cas, oe, we, page) to the memory 70; A scroll controller 60 which receives the signals output from the respective units, outputs a horizontal address signal and a vertical address signal to the memory 70 side, and outputs a ready (RDY) signal to the central processing unit side to control screen scrolling; Hardware scroll device, characterized in that consisting of a memory for storing data (70).

According to claim 1, The scroll controller 60 receives a variety of signals (d_c, sm_wr, v_sync) and outputs a ready (RDY) signal to the central processing unit when the data in advance in the pipo 20, A scroll mode controller 61 which outputs a scroll selector s_s signal to each mux 64, 65; A first adder 62 which receives and adds a scroll horizontal address s_h and a write horizontal address w_r; A second adder 63 which receives and adds the write vertical address w_v and the scroll vertical address s_v; A first mux 64 for receiving the scroll selector s_s signal output from the scroll mode controller 61, the write horizontal address w_h signal, and the signal output from the first adder 62, and outputting a final horizontal address; And; The second mux 65 which receives the scroll selector s_s signal output from the scroll mode controller 61, the write vertical address w_v signal, and the signal output from the second adder 63, and outputs a final vertical address. Hardware scroll device, characterized in that consisting of.

3. The RDY signal of claim 2, wherein the scroll mode controller 61 receives a data condition d_c signal and a scroll mode write signal sm_wr that has passed through the inverter 61-2. A first di-flip flop 61-1 for outputting the first and second flip-flops 61-1; A JK flip-flop 61-3 which receives the scroll mode write signal sm_wr and outputs a scroll flag sm_flag signal; The data signal (d_c) that has passed through the inverter (61-4) is input to provide a clear signal to the first de-flip flop (61-1) via the buffer (61-5). A second di-flip-flop 61-6 receiving feedback; A third de-flip flop 61-7 which receives a vertical sync signal v_sync and a scroll mode flag sm_flag signal output from the JK flip-flop 61-3 and outputs a scroll select signal s_s Hardware scroll device characterized by consisting of.

In a method of scrolling a screen of a monitor, when the screen is scrolled when data is stored or read in the memory 70, the screen scroll value is input to the horizontal scroll register 14 and the vertical scroll register 15 as many scroll lines as desired. After storing, the scroll mode write (sm_wr) signal is activated, and then, whether or not scrolling is performed on a frame-by-frame basis by the vertical sync (v_sync) signal output from the cathode ray tube controller 30, and the existing address and the scroll address are added to each other. Hardware scroll method to improve the scrolling speed by changing the area of the memory address to be refreshed to the monitor by operating the scroll controller 30 for outputting the horizontal address and the vertical address to scroll.

The method of claim 4, wherein the scroll mode write signal sm_wr is activated according to the data state d_c signal when the data stored in the PIPO 20 does not exist. Subsequently, when the scroll mode flag sm_flag is activated, the signal sm_flag finally activates the scroll select signal s_s at the rising edge of the vertical synchronization v_sync signal, which is a synchronization signal in a screen unit, and activates the scroll select signal s_s. According to the received signal s_s, the normal address is converted into a scroll address and input to the memory 70. From the next frame, the hardware scrolls the screen by the value specified in the horizontal scroll register 14 and the vertical scroll register 15. Scroll way.

The method of claim 4, wherein the scrolling method when scrolling data exists in the PIPO 20 as a method of verifying scrolling is performed so that the data previously stored in the PIPO 20 can be written to the memory 70. After the RDY signal is input to the CPU at the falling edge of the mode write signal sm_wr, the data is written to the memory 70, and the data state d_c Signal is inactive, and ready (RDY) signal is also activated to operate the scroll mode write signal (sm_wr), and the scroll select (s_s) signal is finally activated according to the active state of the signal (sm_wr) to horizontal scroll. A hardware scrolling method in which a screen is scrolled by a value specified in the register 14 and the vertical scroll register 15.

※ Note: The disclosure is based on the initial application.