KR960012425A - Device Separator Formation Method of Semiconductor Device - Google Patents

Device Separator Formation Method of Semiconductor Device Download PDF

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Publication number
KR960012425A
KR960012425A KR1019940022551A KR19940022551A KR960012425A KR 960012425 A KR960012425 A KR 960012425A KR 1019940022551 A KR1019940022551 A KR 1019940022551A KR 19940022551 A KR19940022551 A KR 19940022551A KR 960012425 A KR960012425 A KR 960012425A
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South Korea
Prior art keywords
silicon substrate
film
barrier layer
nitride
etching process
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KR1019940022551A
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Korean (ko)
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조병진
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김주용
현대전자산업 주식회사
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Priority to KR1019940022551A priority Critical patent/KR960012425A/en
Publication of KR960012425A publication Critical patent/KR960012425A/en

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Abstract

본 발명은 반도체 소자의 소자분리막 형성방법에 관한 것으로, 버즈 비크(Bird's Beak)의 생성을 방지하기 위하여 실리콘 기판의 소자 분리 영역 (Isolation region)중앙의 소정 부우를 리세스(Recess)구조가 되도록 1차 식각한 후 상기 소자 분리영역 전체를 2차 식각하여 2-단(2-Step)리세스 구조의 트렌치 (Trench)를 형성한 다음 필드 산화(Field oxidation)공정을 실시하므로써 평탄화와 동시에 버즈 비크의 생성이 방지되어 넓은 활성영역의 확보가 가능하고 소자분리 특성이 향상될 수 있도록 한 반도체 소자의 소자분리막 형성방법에 관한 것이다.The present invention relates to a method of forming a device isolation film of a semiconductor device, in order to prevent the formation of a bird's beak so that a predetermined boolean in the center of an isolation region of a silicon substrate becomes a recess structure. After the second etching, the entire isolation region of the device is second-etched to form a trench having a 2-step recess structure, and then subjected to a field oxidation process to planarize and simultaneously The present invention relates to a method of forming a device isolation film of a semiconductor device to prevent generation, to ensure a wide active area, and to improve device isolation characteristics.

Description

반도체 소자의 소자 분리막 형성방법Device Separator Formation Method of Semiconductor Device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1A 내지 제1G도는 본 발명에 따른 반도체 소자의 소자 분리막 형성 방법을 설명하기 위한 소자의 단면도.1A to 1G are cross-sectional views of a device for explaining a device isolation film forming method of a semiconductor device according to the present invention.

Claims (5)

반도체 소자의 소자분리막 형성방법에 있어서, 패드 산화막이 형성된 실리콘 기판에 다층구조의 산화장벽층을 형성한 후 소자분리 영역의 패드 산화막이 노출되도록 상기 산화 장벽층을 패터닝시키는 단계와, 상기 단계로부터 전체 상부면에 제1질화막을 증착하고 식각공정을 실시하여 상기 패터닝된 산화 장벽층의 양측벽에 제1질화막 스페이서를 형성시킨 후 제1차 식각공정을 실시하여 노출된 패드 산화막 및 실리콘 기판을 순차적으로 식각한 다음 상기 제1질화막 스페이서를 제거시키고 노출된 패드 산화막을 제거시키는 단계와, 상기 단계로부터 제2차 식각공정을 실시하여 소자 분리영역의 실리콘 기판에 2-단 리세스 구조의 트렌치를 형성시키는 단계와, 상기 단계로부터 전체 상부면에 제2질화막을 증착하고 식각공정을 실시하여 상기 소자분리 영역 양측의 산화장벽층 및 노출된 실리콘 기판의 측벽에 제2질화막 스페이서를 형성시킨 후 산화공정을 실시하고 상기 산화장벽층 및 패드 산화막을 순차적으로 제거시키는 단계로 이루어지는 것을 특징으로 하는 반도체 소자의 소자분리막 형성방법.A method of forming a device isolation film of a semiconductor device, comprising: forming an oxide barrier layer having a multilayer structure on a silicon substrate on which a pad oxide film is formed, and then patterning the oxide barrier layer so that the pad oxide film of the device isolation region is exposed; A first nitride film is deposited on the upper surface, and an etching process is performed to form first nitride film spacers on both sidewalls of the patterned oxide barrier layer, and then a first etching process is performed to sequentially expose the exposed pad oxide film and the silicon substrate. After etching, removing the first nitride spacer and removing the exposed pad oxide layer, and performing a second etching process from the step to form a two-stage recess structure trench in the silicon substrate of the device isolation region. And depositing a second nitride film on the entire upper surface from the step and performing an etching process. Forming a second nitride spacer on the oxide barrier layer on both sides of the region and the sidewalls of the exposed silicon substrate, followed by an oxidation process and sequentially removing the oxide barrier layer and the pad oxide layer. Separator Formation Method. 제1항에 있어서, 상기 산화장벽층은 버퍼 폴리실리콘, 질화막 및 TEOS이 순차적으로 증착되어 형성된 것을 특징으로 하는 반도체 소자의 소자분리막 형성방법.The method of claim 1, wherein the oxide barrier layer is formed by sequentially depositing a buffer polysilicon, a nitride film, and a TEOS. 제1항에 있어서, 상기 제1질화막은 1000 내지 1500Å 두께로 형성되며, 제2질화막은 산화공정시 산화될 정도의 얇은 두께로 형성되는 것을 특징으로 하는 반도체 소자의 소자분리막 형성방법.The method of claim 1, wherein the first nitride layer is formed to a thickness of 1000 to 1500 Å, and the second nitride layer is formed to a thickness thin enough to be oxidized during an oxidation process. 제3항에 있어서, 상기 제2질화막은 70 내지 130Å 정도의 두께로 형성되는 것을 특징으로 하는 반도체 소자의 소자분리막 형성방법.The method of claim 3, wherein the second nitride film is formed to a thickness of about 70 to about 130 microns. 제1항에 있어서, 상기 제1차 식각공정시 실리콘 기판은 500 내지 1000Å 정도의 깊이로 식각되며, 제2차 식각공정시 상기 실리콘 기판은 300 내지 500Å 정도의 깊이로 식각되는 것을 특징으로 하는 반도체 소자의 소자분리막 형성방법.The semiconductor of claim 1, wherein the silicon substrate is etched to a depth of about 500 to 1000 microns in the first etching process, and the silicon substrate is etched to a depth of about 300 to 500 microns in the second etching process. Device isolation film formation method of the device. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940022551A 1994-09-08 1994-09-08 Device Separator Formation Method of Semiconductor Device KR960012425A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100400286B1 (en) * 1996-12-31 2004-01-13 주식회사 하이닉스반도체 Method for forming isolation layer of semiconductor device
KR100829369B1 (en) * 2002-12-09 2008-05-13 동부일렉트로닉스 주식회사 Formation method of shallow trench isolation in semiconductor device
KR100849080B1 (en) * 2002-06-28 2008-07-30 매그나칩 반도체 유한회사 Method for forming isolation film in semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100400286B1 (en) * 1996-12-31 2004-01-13 주식회사 하이닉스반도체 Method for forming isolation layer of semiconductor device
KR100849080B1 (en) * 2002-06-28 2008-07-30 매그나칩 반도체 유한회사 Method for forming isolation film in semiconductor device
KR100829369B1 (en) * 2002-12-09 2008-05-13 동부일렉트로닉스 주식회사 Formation method of shallow trench isolation in semiconductor device

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