KR960009792A - Variable surround circuit - Google Patents
Variable surround circuit Download PDFInfo
- Publication number
- KR960009792A KR960009792A KR1019940019666A KR19940019666A KR960009792A KR 960009792 A KR960009792 A KR 960009792A KR 1019940019666 A KR1019940019666 A KR 1019940019666A KR 19940019666 A KR19940019666 A KR 19940019666A KR 960009792 A KR960009792 A KR 960009792A
- Authority
- KR
- South Korea
- Prior art keywords
- signal
- surround
- variable
- time delay
- pass filter
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04S—STEREOPHONIC SYSTEMS
- H04S1/00—Two-channel systems
- H04S1/002—Non-adaptive circuits, e.g. manually adjustable or static, for enhancing the sound image or the spatial distribution
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/13—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
- H03K5/135—Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
- H03K2005/00019—Variable delay
- H03K2005/00058—Variable delay controlled by a digital setting
- H03K2005/00071—Variable delay controlled by a digital setting by adding capacitance as a load
Abstract
본 발명은 서라운드출력 가능한 음향기기에 있어서 사용자의 선택에 따라 서라운드신호의 지연시간을 다양하게 가변시킴으로써 서라운드 효과를 극대화시킬 수 있도록 된 가변형 서라운드회로를 제공하기 위한 것이다.The present invention is to provide a variable surround circuit that can maximize the surround effect by varying the delay time of the surround signal in accordance with the user's selection in the sound output capable of surround output.
이를 위해 본 발명은, 시간지연부(40)에서 소정시간 지연출력된 후 지역필터(50) 및 증폭기(60)를 거친 서라운드신호를 스피커(SP)를 매개로 하여 출력시키는 음향기기에서, 오디오신호처리된 L,R채널의 오디오 신호를 복수의 서라운드 신호패턴(S1,S2,S3)으로 변환시키는 신호변환수단(10)과, 사용자가 임의의 서라운드 신호패턴을 선택하게 됨에 따라 마이컴의 제어하에 상기 신호변환수단(10)으로부터의 서라운드신호패턴 중 특정패턴을 추종하기 위해 스위칭동작하는 신호선택부(20)및, 상기 신호선택부(20)의 스위칭동작과 결과에 따라 해당서라운드신호의 지연시간을 결정하여 상기 시간지연부(40)로 인가하는 시간지연결정수단(30)을 추가로 구비하여 구성된 것이다.To this end, the present invention, in a sound device that outputs a surround signal through the local filter 50 and the amplifier 60 after a predetermined time delay output from the time delay unit 40 via the speaker SP, the audio signal Signal conversion means 10 for converting the processed L, R channel audio signal into a plurality of surround signal patterns (S1, S2, S3) and under the control of the microcomputer as the user selects an arbitrary surround signal pattern. A signal selector 20 for switching to follow a specific pattern among the surround signal patterns from the signal converting means 10 and a delay time of the corresponding surround signal according to the switching operation and the result of the signal selector 20. It is configured to further include a time delay determination means 30 to determine and apply to the time delay unit 40.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명의 일실시예에 따른 가변형 서라운드회로도이다.1 is a variable surround circuit diagram according to an embodiment of the present invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10 : 신호변환수단 20 : 신호선택부10: signal conversion means 20: signal selection unit
30 : 시간지연결정수단 40 : 시간지연부30: time delay determination means 40: time delay unit
50 : 저역필터 60 : 증폭기50: low pass filter 60: amplifier
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940019666A KR960015874B1 (en) | 1994-08-10 | 1994-08-10 | Variable type surround circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019940019666A KR960015874B1 (en) | 1994-08-10 | 1994-08-10 | Variable type surround circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
KR960009792A true KR960009792A (en) | 1996-03-22 |
KR960015874B1 KR960015874B1 (en) | 1996-11-22 |
Family
ID=19390084
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940019666A KR960015874B1 (en) | 1994-08-10 | 1994-08-10 | Variable type surround circuit |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960015874B1 (en) |
-
1994
- 1994-08-10 KR KR1019940019666A patent/KR960015874B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR960015874B1 (en) | 1996-11-22 |
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E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
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Payment date: 19991030 Year of fee payment: 4 |
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