KR960008827B1 - Repair driving circuit - Google Patents

Repair driving circuit Download PDF

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Publication number
KR960008827B1
KR960008827B1 KR93028590A KR930028590A KR960008827B1 KR 960008827 B1 KR960008827 B1 KR 960008827B1 KR 93028590 A KR93028590 A KR 93028590A KR 930028590 A KR930028590 A KR 930028590A KR 960008827 B1 KR960008827 B1 KR 960008827B1
Authority
KR
South Korea
Prior art keywords
inverter
driving circuit
mos transistor
mos
receiving
Prior art date
Application number
KR93028590A
Other languages
Korean (ko)
Other versions
KR950022112A (en
Inventor
Sang-Ki Kwak
Original Assignee
Lg Semicon Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lg Semicon Co Ltd filed Critical Lg Semicon Co Ltd
Priority to KR93028590A priority Critical patent/KR960008827B1/en
Publication of KR950022112A publication Critical patent/KR950022112A/en
Application granted granted Critical
Publication of KR960008827B1 publication Critical patent/KR960008827B1/en

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Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G11C29/787Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes using a fuse hierarchy

Abstract

a fuse(G3); an inverter(I4) for receiving a chip enable signal; a P-MOS transistor(M6) and N-MOS transistor(M7) for receiving the inverter output with their gates; an inverter(I5) connecting common crossing point between N-MOS and P-MOS transistors; another N-MOS transistor(M8) connecting the input, output and ground of the inverter. A repair circuit is operated without 8 initial cycle.
KR93028590A 1993-12-20 1993-12-20 Repair driving circuit KR960008827B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR93028590A KR960008827B1 (en) 1993-12-20 1993-12-20 Repair driving circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR93028590A KR960008827B1 (en) 1993-12-20 1993-12-20 Repair driving circuit

Publications (2)

Publication Number Publication Date
KR950022112A KR950022112A (en) 1995-07-26
KR960008827B1 true KR960008827B1 (en) 1996-07-05

Family

ID=19371725

Family Applications (1)

Application Number Title Priority Date Filing Date
KR93028590A KR960008827B1 (en) 1993-12-20 1993-12-20 Repair driving circuit

Country Status (1)

Country Link
KR (1) KR960008827B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100953028B1 (en) * 2008-07-10 2010-04-14 주식회사 하이닉스반도체 IO repair circuit and non volatile device having the same

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100739927B1 (en) * 2005-06-29 2007-07-16 주식회사 하이닉스반도체 Redundancy input/output fuse circuit for semiconductor memory device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100953028B1 (en) * 2008-07-10 2010-04-14 주식회사 하이닉스반도체 IO repair circuit and non volatile device having the same

Also Published As

Publication number Publication date
KR950022112A (en) 1995-07-26

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