KR960006628A - Bit allocation circuitry to maintain uniform peak-to-noise ratio (PSNR) - Google Patents

Bit allocation circuitry to maintain uniform peak-to-noise ratio (PSNR) Download PDF

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KR960006628A
KR960006628A KR1019940018826A KR19940018826A KR960006628A KR 960006628 A KR960006628 A KR 960006628A KR 1019940018826 A KR1019940018826 A KR 1019940018826A KR 19940018826 A KR19940018826 A KR 19940018826A KR 960006628 A KR960006628 A KR 960006628A
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South Korea
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bit allocation
noise ratio
encoder
bit
image
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KR1019940018826A
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Korean (ko)
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KR0124174B1 (en
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이민섭
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배순훈
대우전자 주식회사
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/103—Selection of coding mode or of prediction mode
    • H04N19/114—Adapting the group of pictures [GOP] structure, e.g. number of B-frames between two anchor frames
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/102—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or selection affected or controlled by the adaptive coding
    • H04N19/124—Quantisation
    • H04N19/126—Details of normalisation or weighting functions, e.g. normalisation matrices or variable uniform quantisers
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146—Data rate or code amount at the encoder output
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146—Data rate or code amount at the encoder output
    • H04N19/15—Data rate or code amount at the encoder output by monitoring actual compressed data size at the memory before deciding storage at the transmission buffer
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/174—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a slice, e.g. a line of blocks or a group of blocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/60—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding
    • H04N19/61—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using transform coding in combination with predictive coding

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

본 발명은 입력되는 영상을 코드화하는 엔코더와, 슬라이스단위로 전송용 버퍼 상태에 따라 변화되는 양자화 파라미터를 카운트하는 양자화 파라미터 카운터와, 상기 엔코더에서 코딩 결과 발생된 비트의 수를 카운트하는 비트 카운터와, 상기 양자화 파라미터 카운터와 비트 카운터의 출력을 이용하여 비트 할당량을 계산하는 비트 할당량 계산부와, 상기 엔코더에서 코딩된 영상을 복원하는 영상 복원부와, 입력되는 영상을 소정 시간 지연하는 프레임 메모리와, 상기 영상 복원부와 프레임 메모리의 출력을 이용하여 PSNR값을 구하여 상기 비트 할당량 계산부로 출력하여 다음 영상의 비트 할당량 계산에 사용하는 PSNR 측정부로 구성되어, 엔코딩된 영상을 복원하여 PSNR값을 구한 후 이 값을 다음 영상의 비트 할당량 계산에 이용함으로써 균등한 화질의 복원 영상을 만든다.The present invention provides an encoder for encoding an input image, a quantization parameter counter for counting quantization parameters that change according to the transmission buffer state in slice units, a bit counter for counting the number of bits generated as a result of coding in the encoder, A bit allocation calculator for calculating a bit allocation using the output of the quantization parameter counter and the bit counter, an image reconstruction unit for reconstructing the image coded by the encoder, a frame memory for delaying the input image by a predetermined time, and The PSNR measurement unit is used to calculate the PSNR value using the image reconstruction unit and the output of the frame memory, and outputs the PSNR value to the bit allocation calculator to calculate the bit allocation of the next image. Even picture quality by using Create a recovery image.

Description

균일한 첨두신호 대 잡음비(PSNR)를 유지하기 위한 비트할당회로Bit allocation circuitry to maintain uniform peak-to-noise ratio (PSNR)

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 종래의 비트할당회로를 나타낸 블럭도.1 is a block diagram showing a conventional bit allocation circuit.

제2도는 본 발명에 따른 균일한 PSNR을 유지하기 위한 비트할당회로의 블럭도이다.2 is a block diagram of a bit allocation circuit for maintaining a uniform PSNR in accordance with the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

101 : 엔코더 102 : 양자화 파라미터 카운터101: encoder 102: quantization parameter counter

103 : 비트 카운터 104 : 비트 할당량 계산부103: bit counter 104: bit quota calculation unit

106 : 영상 복원부 107 : 프레임 메모리106: image restoration unit 107: frame memory

108 : PSNR 측정부108: PSNR measuring unit

Claims (3)

입력되는 영상신호를 코드화하는 엔코더와 상기 엔코더로부터 출력되는 데이터를 일정한 속도로 전송하는 전송용 버퍼를 포함하는 엔코더 시스템의 비트할당회로에 있어서; 상기 전송용 버퍼의 상태에 따라 변화되는 양자화 파라미터를 카운트하는 양자화 파라미터 카운터; 상기 엔코더에서 코딩 결과 발생된 비트의 수를 카운트하는 비트 카운터; 상기 양자화 파라미터 카운터와 비트 카운터의 출력을 이용하여 비트 할당량을 계산하는 비트 할당량 계산부; 상기 엔코더에서 코딩된 영상을 복원하는 영상 복원부; 입력되는 영상을 소정 시간 지연하는 프레임 메모리; 및 상기 영상 복원부와 프레임 메모리의 출력을 이용하여 첨두신호 대 잡음비 값을 구하여 상기 비트 할당량 계산부로 출력하여 다음 영상의 비트 할당량 계산에 사용하는 첨두신호 대 잡음비 측정부를 포함하는 균일한 첨두신호 대 잡음비를 유지하기 위한 비트할당회로.A bit allocation circuit in an encoder system comprising an encoder for encoding an input video signal and a transmission buffer for transmitting data output from the encoder at a constant speed; A quantization parameter counter for counting quantization parameters that change according to the state of the transmission buffer; A bit counter for counting the number of bits generated as a result of coding in the encoder; A bit allocation calculator for calculating a bit allocation using the output of the quantization parameter counter and the bit counter; An image restoring unit for restoring an image coded by the encoder; A frame memory for delaying an input image by a predetermined time; And a peak signal-to-noise ratio measurement unit including a peak signal-to-noise ratio measurement unit for obtaining a peak signal-to-noise ratio value using the image reconstruction unit and the output of the frame memory and outputting the peak signal-to-noise ratio value to the bit allocation calculator. Bit assignment circuit to maintain. 제1항에 있어서, 상기 비트 할당량 계산부는 상기 양자화 파라미터 카운터와 상기 비트 카운터에서 출력되는 신호에 의하여 계산된 비트 할당량(Ti, Tp, Tb)에 상기 첨두신호 대 잡음비 측정부로부터 출력되는 첨두신호 대 잡음비(PSNR)를 하기 식과 같이 적용하여 계산한 비트 할당량(Ti*, Tp*, Tb*)을 출력함을 특징으로 하는 균일한 첨두신호 대 잡음비를 유지하는 비트할당회로.The peak signal to noise ratio measurement unit of claim 1, wherein the bit allocation calculator calculates a bit allocation amount Ti, Tp, Tb calculated by the quantization parameter counter and the signal output from the bit counter. A bit allocation circuit for maintaining a uniform peak signal-to-noise ratio, characterized by outputting a bit allocation amount (Ti *, Tp *, Tb *) calculated by applying a noise ratio (PSNR) as in the following equation. 제1항에 있어서, 상기 프레임 메모리의 상기 지연은 상기 엔코더와 영상 복원부의 처리시간과 동일함을 특징으로 하는 균일한 첨두신호 대 잡음비를 유지하는 비트할당회로.The bit allocation circuit of claim 1, wherein the delay of the frame memory is equal to a processing time of the encoder and the image restoring unit. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940018826A 1994-07-30 1994-07-30 Bit allocation circuit for keeping uniform peak signal noise ratio KR0124174B1 (en)

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KR1019940018826A KR0124174B1 (en) 1994-07-30 1994-07-30 Bit allocation circuit for keeping uniform peak signal noise ratio

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Application Number Priority Date Filing Date Title
KR1019940018826A KR0124174B1 (en) 1994-07-30 1994-07-30 Bit allocation circuit for keeping uniform peak signal noise ratio

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KR0124174B1 KR0124174B1 (en) 1997-11-26

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