KR960006197B1 - The structure of ccd and the manufacturing method thereof - Google Patents

The structure of ccd and the manufacturing method thereof Download PDF

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KR960006197B1
KR960006197B1 KR1019920023322A KR920023322A KR960006197B1 KR 960006197 B1 KR960006197 B1 KR 960006197B1 KR 1019920023322 A KR1019920023322 A KR 1019920023322A KR 920023322 A KR920023322 A KR 920023322A KR 960006197 B1 KR960006197 B1 KR 960006197B1
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charge
ccd
region
photoelectric conversion
metal
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KR940016854A (en
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허창우
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엘지전자주식회사
구자홍
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation

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Abstract

The structure of the charge coupled device employs: a glass substrate(21); several metal electrodes(22) for transmitting a signal charge of photoelectric conversion region(PD) to charge the transmitting region(CCD) to be arranged in a row; several photoelectric conversion regions(PD) for converting a light signal into an electric signal charge to be formed on a side of the metal electrode(22); the charge transmitting region(CCD) for transmitting the signal charge transmitted from the photoelectric conversion region(PD) to the output side; an insulation film(26a,26b) formed on the whole surface of the charge transmitting region(CCD) and the photoelectric conversion region(PD); and several upper electrodes(27) for driving a clock signal so as to shift the signal charge by electric potential change of the charge transmitting region(CCD).

Description

전하결합소자의 구조 및 제조방법Structure and Manufacturing Method of Charge Coupled Device

제1도는 종래의 전하결합소자 구조 단면도1 is a cross-sectional view of a conventional charge coupling device structure

제2도는 종래의 전하결합소자 레이 아웃도2 is a layout diagram of a conventional charge coupling device.

제3도는 종래의 전하결합소자 구동을 설명하기 위한 포텐셜 프로파일3 is a potential profile for explaining a conventional charge coupled device driving.

제4도는 본 발명의 전하결합소자 구조 단면도4 is a cross-sectional view of the structure of the charge coupling device of the present invention

제5도는 본 발명의 전하결합소자 레이 아웃도5 is a layout view of the charge coupling device of the present invention.

제6도는 본 발명의 전하결합소자 투페이즈 클럭 파형도6 is a charge coupled device two-phase clock waveform of the present invention

제7도는 본 발명의 전하결합소자 구동을 설명하기 위한 포텐셜 프로파일7 is a potential profile for explaining the driving of the charge coupled device of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

21 : 유리기판 22 : 금속21: glass substrate 22: metal

23 : 폴리-크리스탈 24 : 비정질실리콘23 poly-crystal 24 amorphous silicon

25 : 투명전극 26a,26b : 절연막25 transparent electrode 26a, 26b insulating film

27 : 상부전극.27: upper electrode.

본 발명은 전하결합소자에 관한 것으로, 특히 대면적화 및 저가격화에 적당하도록 한 다결정 실리콘을 이용한 전하결합소자소자의 구조 및 제조방법에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a charge coupled device, and more particularly, to a structure and a manufacturing method of a charge coupled device device using polycrystalline silicon suitable for large area and low cost.

종래의 전하결합소자(Charge Coupled Device, CCD)를 첨부된 도면을 참조하여 설명하면 다음과 같다.A conventional charge coupled device (CCD) is described below with reference to the accompanying drawings.

제1도는 종래의 전하결합소자(CCD) 구조 단면도로써 구조 단면도로써, 제조방법은 n형 실리콘기관(1)에 n형 에피층(2)을 성장한뒤, 그 위에 P형 웰(wel1)(3)을 형성한다. 그리고 P형웰(3)의 소정의 부위에 베리드 P형층(4)을 형성하고, 다시 P형웰(3)을 만든다.1 is a cross-sectional view showing a structure of a conventional charge coupled device (CCD), and a fabrication method includes growing an n-type epitaxial layer 2 on an n-type silicon engine 1 and then placing a P-type well 1 on the n-type silicon engine 1. ). And the buried P-type layer 4 is formed in the predetermined part of the P-type well 3, and the P-type well 3 is made again.

계속해서 전면에 절연막(13)(SiNx)를 증착하고, 포토다이오드 영역과 전하전송영역을 한정하여 포토다이오드 영역과 전하전송영역을 한전하여 포토다이오드 영역과 전하전송영역 사이에 P형 이온주입으로 채널스톱층(6) 형성하고, 전하전송영역과 포트다이오드 영역에 고농도 n형 이온주입으로 고농도 n형 불순물층(5,11)을 형성한다.Subsequently, an insulating film 13 (SiNx) is deposited on the entire surface, the photodiode region and the charge transfer region are defined, and the photodiode region and the charge transfer region are electrostatically charged by a P-type ion implantation between the photodiode region and the charge transfer region. The stop layer 6 is formed, and the high concentration n-type impurity layers 5 and 11 are formed by the high concentration n-type ion implantation in the charge transfer region and the port diode region.

여기서 포토다이오드 영역에는 고농도 n형 뷸순물층(11)을 깊게 형성하여 고농도 n형 불순물층(11)위에 고농도 P형 이온주입으로 고농도 P형 불순물층(12)을 형성하여 P/N 접합의 포토다이오드를 형성다.In the photodiode region, a high concentration n-type fluoride layer 11 is formed deep, and a high concentration P-type impurity layer 12 is formed on the high concentration n-type impurity layer 11 by a high concentration P-type ion implantation, thereby forming a photo of a P / N junction. Form a diode.

전하전송영역상에는 제1폴리실리콘(7), 절연막(8)을 증착하고 베리어장벽층(도면에는 도시되지 않음)을 형성하고 제2폴리실리콘(9)을 증착한 다음 불필요한 부분의 제1, 제2폴리실리콘(7,9)과 절연막(8)을 제거하여 복수개의 게이트를 형성한다.On the charge transfer region, the first polysilicon 7 and the insulating film 8 are deposited, the barrier barrier layer (not shown) is formed, and the second polysilicon 9 is deposited, and then the first and second portions of the unnecessary parts are deposited. 2 polysilicon (7, 9) and insulating film (8) are removed to form a plurality of gates.

제1, 제2폴리실리콘(7,9) 상측에 절연막(10)을 형성하고, 콘택에치, 제1메탈증착 및 에치, 광착층오픈, 제2메탈증착 및 에치, 보호막형성, 패드공정의 순서로 전하결합소자를 완성한다.An insulating film 10 is formed on the first and second polysilicon layers 7 and 9, and contact etch, first metal deposition and etch, deposition layer opening, second metal deposition and etch, protective film formation, pad process Complete the charge-coupled device in order.

이와같이 구성왼 종래의 전하결합소자의 동작은 다음과 같다.The operation of the conventional charge coupled device left as described above is as follows.

제2도(a)는 종래의 리니어(Linear) CCD레이 아웃도이고, 제2도(b)는 에어리어 CCD 레이 아웃도이고, 제3도는 종래 전하결합소자의 포텐셜 프로파일로써, 포트다이오드(PD)에서 생선된 전하는 CCD채널을 통해 순차적으로 출력단으로 보내져서 센싱엠프에 의해 전송된 영상신호를 검출하게 된다.FIG. 2 (a) is a conventional linear CCD layout, FIG. 2 (b) is an area CCD layout, and FIG. 3 is a potential profile of the conventional charge coupling device. The electric charges generated by the SDS are sequentially sent to the output terminal through the CCD channel to detect the image signal transmitted by the sensing amplifier.

즉, 제3도와 같이 폴리케이드(G2)에 전압을 인가할때와 폴리게이트(G1)에 전압을 인가할매 각 해당된 전하전송영역의 포텐셜 우물을 만들어 전하를 순차적으로 출력측에 이동시켜 준다.That is, as shown in FIG. 3, when a voltage is applied to the polycide G 2 and a voltage is applied to the polygate G 1 , a potential well of each corresponding charge transfer region is created to sequentially move charges to the output side. .

그러나, 이와같은 종래의 전하결합소자에 있어서는 마스크공정이 약 20개 정도 필요하고 기판위에서 구현하므로 큰 사이즈로 소자를 만들 수 없으므로 화면을 축소하는 정밀한 축소광학계와 이 광학계로 인한 실리콘의 부피가 커져서 사용상에 불편함등의 문제점이 있다.However, in such a conventional charge coupling device, about 20 mask processes are required and implemented on a substrate, it is impossible to make a device with a large size. Therefore, a precision shrinking optical system that reduces the screen and the volume of silicon due to the optical system become large. There is a problem such as discomfort.

본 발명은 이와같은 문제점을 해결하기 위하여 안출한 것으로써, 공정을 단순화하여 저가격화하고 대면적화 하는데 그 목적이 있다.The present invention has been made to solve such a problem, and the object of the present invention is to simplify the process and to lower the cost and the large area.

이와같은 목적을 달성하기 위한 본 발명은 유리기판위에 금속전극을 형성하고 금속 전극위에 비정질실리콘과 투명전극을 적층하여 광전변화영역(PD)을 형성하고 폴리크리스탈(Poly-Crystal)화된 비정질실리콘으로 전하전송영역을 형성하고, 광전변화영역과 전하전송영역에 각각 금속전극을 형성한 것이다.In order to achieve the above object, the present invention forms a metal electrode on a glass substrate, stacks amorphous silicon and a transparent electrode on the metal electrode to form a photoelectric change region (PD), and charges with poly-crystallized amorphous silicon. A transfer region is formed, and metal electrodes are formed in the photoelectric change region and the charge transfer region, respectively.

이와같은 본 발명을 첨부된 도면을 참조하여 보다 상세히 설명하면 다음과 같다.This invention is described in more detail with reference to the accompanying drawings as follows.

제5도는 본 발명의 전하결합소자 레이 아웃도이고, 제4도는 제5도의 A-A' 선상 구조 단면도이고, 제7도(a)는 제5도의 B-B' 선상의 단면도로써, 본 발명의 전하결합소자 제조방법은 유리기판(21)위에 크롬(Cr)등의 금속(22)을 증착하여 광전변환영역(PD)과 전하전송영역(CCD)을 연결하도록 일정간격을 갖고 일방향으로 복수개의 금속(22) 전극을 패터닝한다.FIG. 5 is a layout view of the charge coupling device of the present invention, FIG. 4 is a sectional view taken along the line AA ′ of FIG. 5, and FIG. 7 (a) is a sectional view taken along the line BB ′ of FIG. 5, showing the charge coupling device of the present invention. The method of manufacturing a plurality of metals 22 in one direction with a predetermined interval so as to connect the photoelectric conversion region PD and the charge transfer region CCD by depositing a metal 22 such as chromium (Cr) on the glass substrate 21. Pattern the electrode.

즉, 제5도에서, 각 복수개의 광전변환영역(PD)과 전하전송영역(CCD)이 연결되도록 금속(22) 전극을 패터닝한다.That is, in FIG. 5, the metal 22 electrode is patterned such that each of the photoelectric conversion regions PD and the charge transfer regions CCD is connected to each other.

그리고 전면에 비정질실리큰(a-Si : H)(24)을 PECVD(Plasma Enhanced Chemical Vapour Deposition)법으로 약 8000Å전도 증착하고 금속(22)전극위와 전하전송영역에만 남도록 패터닝한뒤 XeCl 액사이머 레이저(excimer Laser)로 150-200mJ/㎠ 정도로 전하전송영역(CCD)에만 주사하여 폴리-크리스탈(Poly-Crystal)(23)화 시킨다.Then, an amorphous silicon (a-Si: H) 24 on the front surface was deposited by PECVD (Plasma Enhanced Chemical Vapor Deposition) at about 8000Å and patterned so as to remain only on the metal (22) electrode and in the charge transfer region. (Excimer Laser) by scanning only 150-200mJ / ㎠ to the charge transfer region (CCD) to poly-crystal (Poly-Crystal) (23).

그리고 투명전극(25)을 스퍼터장비로 두께 1000Å 이내로 증착한 후 광전변환영역(PD)영역에만 남도록 투명전극(25)을 선택적으로 제거하고 광전변환영역과 전하전송영역(CCD) 계면의 비정질실리콘(24)을 식각 제거한다.After the transparent electrode 25 is deposited within a thickness of 1000 로 with a sputtering device, the transparent electrode 25 is selectively removed so as to remain only in the photoelectric conversion region PD, and the amorphous silicon of the photoelectric conversion region and the charge transfer region (CCD) interface is removed. 24) is etched away.

계속해서 제7도 및 제5도에서 전면에 SiN등의 절연막(26a)을 수천 Å정도로 층착하고 그 위에 감광막을 증착한 다음 유리기판(21)속에서 배면노광한다.Subsequently, in FIGS. 7 and 5, an insulating film 26a, such as SiN, is deposited on the front surface of the film by thousands of microseconds, and a photosensitive film is deposited thereon, and then back exposed in the glass substrate 21. FIG.

배면노광하면, 제5도에서 금속(22) 전극이 형성된 부위는 차광되고 금속(22) 전극이 형성되지 않는 부위에는 노광되어 감광막이 제거된다.In back exposure, the portion where the metal 22 electrode is formed in FIG. 5 is shielded and the portion where the metal 22 electrode is not formed is exposed to remove the photoresist film.

따라서, 감광막을 마스크로 이용하여 금속(22) 전극이 형성되지 않은 부위의 절연막(26a)을 제거하고 감광막을 제거한 다음 다시 절연막(26b)을 증착한다. 그러면 한화소에 전극을 형성하여 폰텐셜 단차를 갖게 된다.Therefore, using the photoresist film as a mask, the insulating film 26a in the portion where the metal 22 electrode is not formed is removed, the photoresist film is removed, and the insulating film 26b is deposited again. Then, an electrode is formed on one pixel to have a potential step.

그리고 제4도와 같이 광전변환영역의 투명전극(25)상에 쓰루-홀(Through-hole)을 형성하고, 금속(Al)을 증착하고 패터닝하여 투명전극(25)에 전압을 인가하기 위한 전극과, 클럭신호를 인가하기 위한 복수개의 상부전극(27)을 형성한다.As shown in FIG. 4, an electrode for applying a voltage to the transparent electrode 25 is formed by forming a through-hole on the transparent electrode 25 of the photoelectric conversion region, depositing and patterning metal (Al); A plurality of upper electrodes 27 for applying a clock signal are formed.

이와같이 구성된 본 발명의 전하결합소자의 동작은 다음과 같다.The operation of the charge coupling device of the present invention configured as described above is as follows.

제6도는 본 발명의 전하결합소자의 클럭파형도이고, 제7도(b) 내지 (e)는 제7도(a)의 구조에 대한 본 발명의 전하결합소자 구동을 설명하기 위한 포텐셜 프로파일을 나타낸 것으로써, 광전변환영역(PD)에서 형성된 광전하는 투명전극(25)에 -5V의 역 바이어스를 인가하면 금속(22) 전극을 통해 폴리-크리스탈(23)영역의 전하전송영역(CCD)으로 이동된다.FIG. 6 is a clock waveform diagram of the charge coupling device of the present invention, and FIGS. 7 (b) to (e) show the potential profile for explaining the driving of the charge coupling device of the present invention with respect to the structure of FIG. As shown, the photoelectric charge formed in the photoelectric conversion region PD applies a reverse bias of -5V to the transparent electrode 25 to the charge transfer region CCD of the poly-crystal 23 region through the metal 22 electrode. Is moved.

즉, 전체 광전변환영역에 형성된 광전하가 일률적으로 동시에 전하전송영역으로 이동하여 전하전송영역의 우물에 갖혀있게 된다.That is, the photocharges formed in the entire photoelectric conversion region simultaneously move to the charge transfer region and are held in the well of the charge transfer region.

이때 각 전극( )에 제6도와 같이 투페이즈 클럭신호가 인가되면 제7도(b) 내지 (e)와 같이 순차적으로 전하가 출력측으로 이동된다.At this time, when the two-phase clock signal is applied to each electrode as shown in FIG. 6, the charge is sequentially moved to the output side as shown in FIGS. 7 (b) to (e).

이상에서 설명한 바와같이, 본 발명의 전자결합소자에 있어서는 유리기판에 전하결합소자를 형성함으로 저렴한 가격의 소자를 제공할 수 있고, 폴리실리콘 기술을 사용하여 속도면에서도 뒤떨어지지 않고 대면적의 소자를 구현할 수 있으며 대면적의 소자를 구현할 수 있으며 광학계가 필요없으므로 시스템을 가볍고, 얇고, 짧고, 작게 만들 수 있는 등의 효과가 있다.As described above, in the electronic coupling device of the present invention, a low-cost device can be provided by forming a charge coupling device on a glass substrate, and a polysilicon technology is used to provide a large-area device without being inferior in speed. It can be realized, large-area devices can be implemented, and the optical system is not required, so the system can be made light, thin, short and small.

Claims (6)

유리기판(21)과, 유리기판(21)위에 일정한 간격을 일렬로 배열되어 광전변환영역(PD)의 신호전하를 전하전송영역(CCD)으로 전송하기 위한 복수개의 금속(22)전극과, 상기 각 금속(22)전극의 일측 상부에 형성되어 빛의 신호를 전기적인 신호전하로 변환하는 복수개의 광전변환영역(PD)과, 상기 각 금속(22)전극의다른 일측상부에 걸쳐 일체형으로 형성되고 광전변환영역(PD)과 격리되어 광전변환영역(PD)에서 전송된 신호전하를 출력측으로 전송하기 위한 전하전송영역(CCD)과, 전하전송영역(CCD) 밋 광전변환영역(PD)의 전면에 형성되는 절연막(26a,26b)과, 전하전송영역(CCD) 상부의 절연막(26a,26b)이 형성되고 전하전송영역(CCD)의 전위를 변화시켜 신호전하가 이동되도록 클럭신호를 인가하기 위한 복수개의 상부전극(27)을 포함하여 이루어짐을 특징으로 하는 전하결합소자의 구조.A plurality of metal 22 electrodes arranged at a predetermined interval on the glass substrate 21 and the glass substrate 21 to transfer signal charges of the photoelectric conversion region PD to the charge transfer region CCD; A plurality of photoelectric conversion regions PD formed on an upper side of each metal 22 electrode and converting a signal of light into electrical signal charges, and integrally formed on an upper side of the other side of each of the metal 22 electrodes; Charge transfer region CCD, which is isolated from the photoelectric conversion region PD, to transfer the signal charges transmitted from the photoelectric conversion region PD to the output side, and the charge transfer region CCD in front of the photoelectric conversion region PD. A plurality of insulating films 26a and 26b formed therein and insulating films 26a and 26b above the charge transfer region CCD are formed and a clock signal is applied to change the potential of the charge transfer region CCD to move the signal charges. Charge characterized in that it comprises two upper electrodes (27) Structure of the device. 제l항에 있어서, 광전변환영역은 금속(22)전극위에 비정질실리콘(24)과 투명전극(25)이 적층되어 형성됨을 특징으로 하는 전하결합소자의 구조.12. The structure of claim 1, wherein the photoelectric conversion region is formed by stacking amorphous silicon (24) and transparent electrode (25) on a metal (22) electrode. 제1항에 있어서, 전하전송영역은 폴리크리스탈(23)화된 실리콘으로 형성됨을 특징으로 하는 전하결합소자의 구조.The structure of a charge coupled device according to claim 1, wherein the charge transfer region is formed of polycrystal (23) siliconized. 유리기간(21)위에 일방향으로 일정한 간격을 갖도록 복수개의 금속(22) 전극을 형성하는 제1공정과, 전면에 비정질실리콘(24)을 증착하여 금속(22)전극위와 전하전송영역(CCD)이 될 부분에만 남도록 패터닝하는 제2공정과, 상기 비정실실리콘(24)중 전하전송영역을 폴리-크리스탈(23)화 하는 제3공정과, 상기폴리-크리스탈(23)화 되지 않는 비정질실리콘(24)위에 투명전극(25)을 증착하여 광전변환영역을 형성하는제4공정과, 상기 비정실실리콘(24)과 폴리-크리스탈(23)화된 부분의 계면을 제거하는 제5공정과, 전면에제1절연막(26a)을 증착하여 상기 금속(22)전극 상측부위에만 남도록 패터닝하는 제6공정과, 전면에 제2절연막을 증착하여 쓰루-홀을 형성하는 제7공정과, 상기 투명전극(25)의 전압인가용 금속라인과 전하전송영역(CCD)상부의 클럭신호인가용 상부전극(27)을 형셩하는 제8공정을 포함하여 이루어짐을 특징으로 하는 전하결합소자의 제조방법.The first process of forming a plurality of metal 22 electrodes on the glass period 21 to have a predetermined distance in one direction, and by depositing amorphous silicon 24 on the front surface of the metal 22 electrode and the charge transfer region (CCD) A second process of patterning only the portion to be left, a third process of converting the charge transfer region of the amorphous silicon 24 into a poly-crystal 23, and an amorphous silicon 24 that is not converted into the poly-crystal 23. A fourth process of forming a photoelectric conversion region by depositing a transparent electrode 25 on the top surface; a fifth process of removing an interface between the amorphous silicon 24 and the poly-crystal 23ized portion; A sixth process of depositing an insulating layer 26a and patterning the patterned layer so that only the upper portion of the metal 22 electrode remains; a seventh process of depositing a second insulating layer on the entire surface to form a through-hole; and the transparent electrode 25 The upper electrode 27 for applying a clock signal on the metal line for voltage application and the charge transfer region CCD A method of manufacturing a charge-coupled device comprising the eighth step of forming a). 제4항에 있어서, 폴리-크리스탈(23)화는 XeCl 엑사이어 레이저로 150-200mJ/㎠ 주사하여 형성함을 특징으로 하는 전하결합소자의 제조방법.5. The method of claim 4, wherein the poly-crystal (23) is formed by scanning 150-200 mJ / cm 2 with an XeCl excimer laser. 제4항에 있어서, 제6공정의 패터닝방법은 제1절연막(26a)위에 감광막을 증착하고 유리기판(21)쪽에서 배면노광하여 패터닝함을 특징으로 하는 전하결합소자의 제조방법.5. The method of manufacturing a charge coupling device according to claim 4, wherein the patterning method of the sixth step is performed by depositing a photosensitive film on the first insulating film (26a) and back patterning the glass substrate (21).
KR1019920023322A 1992-12-04 1992-12-04 The structure of ccd and the manufacturing method thereof KR960006197B1 (en)

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