KR960003979B1 - Dtmf receiver - Google Patents

Abstract

The dual tone multi frequency (DTMF) tone signal receiver is for detecting a DTMF tone signal from an input audio signal by using a digital signal processor core. The receiver includes a PCM codec(10) for sampling DTMF signal, a serial to parallel converter(20) for converting serial PCM data into parallel data, a TSAC(30) for generating number of time slots, a memory(80) for storing assembly algorithm, a DSP core(70) for detecting DTMF signal from the PCM data by using Goertzl algorithm stored in the memory(80), an interrupt controller(40) for sending time slot data generated by the TSA(130) to the DSP core(70), and an I/O decoder(50) for interfacing the DSP core and peripheral equipments.

Description

DTMF receiver using digital signal processor core

1 is a block diagram of a DTMF receiver using a conventional analog filter.

2 is a block diagram of a DTMF receiver using the DSP core of the present invention.

3 is a flow chart of the algorithm according to the invention.

* Explanation of symbols for main parts of the drawings

10: PCM Codec 20: Serial / Parallel Exchange

30: TSAC 40: interrupt control unit

50: I / O decoder 60: register

70: DSP core 80: memory

The present invention relates to a DTMF (Dual Tone Multi Friquency) receiver in an exchange system, and more particularly, to a DTMF receiver that detects DTMF tones from a voice signal using a DSP core (Digital Signal Prossor Core).

1 is a configuration diagram of a DTMF receiver using a conventional analog filter, which is composed of a DTMF filter 14 and a DTMF decoder 13, and the DTMF filter 14 includes a high group filter 11 and a low group filter 12. It consists of).

The algorithm algorithm 14 is a one-chip MT8865 of MITLE, USA, the DTMF decoder 13 may be implemented as a one-chip MT8860.

The high group filter 11, which inputs a high-algorithm signal from a PCM codec (not shown), filters and outputs a high frequency frequency. In addition, the row group filter 12 for inputting the DTMF signal from the PCM codec outputs the low frequency filter. The DTMF decoder 13 which inputs the separated signal filtered by the high group filter 11 and the low group filter 912, respectively, decodes and detects a valid DTMF tone.

The conventional DTMF receiver as described above has a problem in that the circuit is complicated and implemented using a plurality of general purpose chips, which is expensive and multiplexing cannot be realized.

Accordingly, an object of the present invention is to provide a DTMF receiver for detecting DTMF tones in a speech signal using a DSP core to solve the above problems.

Another object of the present invention to provide a DTMF receiver that can reduce the volume by implementing a single chip using a DSP core.

Another object of the present invention is to provide a DTMF receiver for processing multiple channels.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of a DTMF receiver using a DSP core according to the present invention, wherein the PCM codec 10 samples the DTMF signal with 8 KHZ to generate 8 bit data for each sample. The serial / parallel converter 20 converts serial PCM data input from the PCM codec 10 into parallel data. Time slot assignment circuit (TSAC) 30 generates a plurality of time slots to process a plurality of channels, each time slot is obtained by oring a basic clock determined by the transmission time of 8-bit data. The memory 80 is connected to the DSP core 70 to store an assembler program of the Goertzel algorithm. The DSP core 70 has PCM data and detects and outputs a valid DTMF signal in accordance with a high-altitude algorithm stored in the memory 80. The interrupt controller 40 notifies the DSP core 70 of the channel assigned to the timeslot after the interrupt is generated. The register 60 stores the DTMF signal detected by the DSP core 70. The input / output decoder 50 is connected to the DSP core 70 and the interlock controller 40 to perform external input / output interfacing with the DSP core 70 to directly select the selection signal of the register 60 and the corresponding channel. Generates a signal to select the parallel converter.

3 is a flowchart of the algorithm according to the present invention.

Based on the above configuration, a preferred embodiment of the present invention will be described in detail with reference to FIGS.

The PCM codec 10 inputting DTMF signals corresponding to the N channels converts and outputs the DTMF signal selected by the timeslot allocation signal applied through the line 31 output from the TSAC 30 into PCM data. At this time, the TSAC 30 generates an interrupt signal and applies it to the DSP core 70 through the line 37, and applies the timeslot allocation signal to the interrupt controller 40 through the line 34. Then, the interrupt controller 40 inputs the signal generated from the input / output decoder 50 through the line 54 when a signal is applied from the DSP core 70 to the input / output decoder 50 through the line 48. The channel utilization state of the timeslot is applied to the DSP core 70. Accordingly, the DSP core 70 receiving the interrupt signal from the TSAC 30 analyzes the channel of the input timeslot from the interrupt controller 40 to detect the channel of the current timeslot and reads the read control signal through the line 48. Outputs The input / output decoder 50 receiving the read control signal from the DSP core 70 decodes and applies the corresponding channel selection signal to the serial / parallel converter 10 through the line 49, and then outputs it from the PCM codec 20. The serial / parallel converter 20 for inputting the PCM data is converted and outputted as parallel data.

The DSP core 70 then reads PCM data converted in parallel in the corresponding channel from the serial / parallel converter 20. Therefore, the DSP core 70 detects the DTMF signal from the input PCM data by a high-altitude algorithm stored in the memory 80. When the DSP core 70 applies the data output control signal to the input / output decoder 50 through the line 48, the input / output decoder 50 outputs the selection signal of the register 60. As a result, the register 60 for inputting the DTMF signal output from the DSP core 70 latches the DTMF signal of the corresponding channel by the selection signal output from the input / output decoder 50. The DTMF signal stored in the register 60 is processed by an external processor. Referring to FIG. 3, the DSP core 70 detects the DTMF signal by the high-pressure algorithm stored in the memory 80. In step 31, the PCM parallel output from the serial / parallel converter 20 is output. The data is detected at four low and high group frequencies and the process proceeds to step 32. In step 32, the largest low band frequency in the low group frequency and the largest high band frequency in the high group frequency are detected. In step 33, the detected low band frequency and the high band frequency between -4db and + 8db are determined as valid frequencies for DTMF signal detection. In step 34, the largest frequency in each band is compared with other frequencies in the vicinity, and the difference is greater than the threshold value of each band. In step 35, the DTMF signal is detected by comparing the frequency detected in step 35 with the frequency of the second harmonic.

As described above, DSP chip, high-algorithm and peripheral circuit are made into one chip in DTMF receiver using DSP, which improves the processing speed, reduces hardware volume, reduces the cost, and improves reliability by simplifying the product.

Claims (1)

In a DTMF receiver using a DSP core, a PCM codec 10 for generating 8-bit data for each sample by sampling a DTMF signal at 8 KHZ and serial PCM data input from the PCM codec 10 are converted into parallel data. A serial / parallel converter 20 and a plurality of timeslots for processing a plurality of channels, each timeslot being obtained by ringing a basic clock determined by the transmission time of 8-bit data; A DSP 80 connected to the DSP 70 for storing an assembler program of a Goertzel algorithm, and a DSP for detecting and outputting a valid DTMF signal in accordance with a Go algorithm, stored in the memory 80, with PCM data. An interrupt control unit 40 for informing the DSP core 70 of the core 70, a channel allocated to the timeslot output from the TSA 130 after the interrupt is generated, and a DTMF detected by the DSP core 70; Regulate the signal And an input / output decoder connected to the DSP core 70 and the interrupt controller 40 to perform external input / output interfacing with the DSP core 70 to generate a selection signal of the register 60. DTMF receiver using a DSP core characterized in that consisting of 50).