KR960003355A

KR960003355A - Method and circuit of cialiti protection in a projection television receiver

Info

Publication number: KR960003355A
Application number: KR1019940012434A
Authority: KR
Inventors: 이재경
Original assignee: 이헌조; 엘지전자 주식회사
Priority date: 1994-06-02
Filing date: 1994-06-02
Publication date: 1996-01-26

Abstract

본 발명은 프로젝션 텔레비젼수상기의 씨알티 보호기술에 관한 것으로, 종래의 프로섹션 텔레비젼수상기에 있어서는 적은 씨알티로 큰 형광막을 구동하기 위하여 씨알티 고전압이 걸리게 되어 있어 동화상의 경우에는 별다른 문제점이 없으나 정지화상인 경우 씨알티의 특정 부분에 과다한 빔전류가 계속 흐르게 되어 장시간에 걸쳐 정지화상을 디스플레이하는 경우 씨알티가 손상되는 문제점이 있었는 바, 본 발명은 이를 해결하기 위해 수직동기신호를 이용하여 한 화면단위로 D/A변환기의 출력신호를 적분하여 동화상과 정지화상을 구분하고, 정지화상일 경우 온스크린 블랭킹신호를 이용하여 색신호 출력을 차단하고 정지화상에 대한 경고메세지를 출력하도록 하였다.The present invention relates to a technology for protecting a television of a projection television receiver. In a conventional projection television receiver, a high voltage is applied to drive a large fluorescent film with a small number of seconds, so that there is no problem in the case of a moving image. In the case of the present invention, excessive beam current continues to flow to a specific part of the CTI, so that when the still image is displayed for a long time, there is a problem that the CRT is damaged. The present invention uses a vertical synchronization signal to solve this problem. By integrating the output signal of the D / A converter, the moving picture and the still picture are distinguished. In the case of the still picture, the on-screen blanking signal is used to block the color signal output and output a warning message for the still picture.

Description

Method and circuit of cialiti protection in a projection television receiver

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명 프로젝션 텔레비젼수상기의 씨알티 보호 블록도.2 is a cial protection block diagram of a projection television receiver of the present invention.

제3도는 본 발명의 씨알티 보호방법에 대한 신호 흐름도.Figure 3 is a signal flow diagram for a CALTI protection method of the present invention.

제4도는 본 발명에서 ADC체크타이머의 동작 신호 흐름도.4 is an operation signal flow chart of the ADC check timer in the present invention.

제5도의 (가)는 수직동기신호의 파형도, (나)는 ADC체크타이머의 타이밍도.5A is a waveform diagram of a vertical synchronization signal, and B is a timing diagram of an ADC check timer.

Claims

A first step of integrating and adding the red, green, and blue signals supplied to the CT in each screen unit by using the vertical synchronization signal; and comparing the sum of the first step with the sum of the previous screens, respectively; And a third step of counting a stop time by determining the current picture as a still picture if the sum of the current screen and the sum of the previous screen are equal to each other as a result of the comparison in the second step; and the count of the third step. And a fourth process of outputting a warning message as well as blocking a red, green, and blue signal supplied to CALTI when the value is more than a predetermined time.

Detects the red signal R, the green signal G, and the blue signal B output from the intermediate frequency processor 2 and outputs the signals to CRT _R , CRT _G , and CRT _B. A / D converter 15A-15C for converting the analog red, green, and blue signals R, G, and B output from the chroma unit 14 into digital signals, While the screen is displayed, the red, green, and blue signals (R), (G), and (B) output from the A / D converters 15A-15C are respectively calculated and then compared with the output values of the previous screen. And a microcomputer 16 for judging still images when they are equal to each other, blocking output of color signals using an on-screen blanking signal, and outputting a warning message for still images. Protection circuit.

※ Note: The disclosure is based on the initial application.