KR960002558Y1 - Gate pulse generating circuit of auto white balance - Google Patents

Abstract

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Description

Gate pulse generator circuit with auto white balance

1 is a gate pulse generation circuit diagram of the present invention

2 is a graph of the gate range and color temperature trajectory of the circuit shown in FIG.

* Explanation of symbols for main parts of the drawings

1 to 6: 1 to 6 adders 7 to 11: 1 to 5 comparators

12: Andgate

The present invention relates to a gate pulse generation circuit of auto white balance in a video tape recorder (hereinafter referred to as VTR).

Conventionally, when performing white balance in the VTR, there is a problem that stable auto white balance cannot be performed due to the influence of luminance.

Accordingly, an object of the present invention is to provide a gate pulse generation circuit of an auto white balance that can generate a gate pulse because the high brightness and low chroma parts are sensed using a comparator to perform a stable auto white balance.

The present invention for achieving the above object is the first to sixth adder and the first to sixth adder and the reference signal and the luminance signal and-(RY) and-(BY) signal input and the reference signal and- A first to fifth comparators for comparative output by (RY) and-(BY) signal inputs. And an AND gate generating gate pulses by satisfying a condition only within a range that satisfies the color temperature trajectory by receiving the output signals of the first to fifth comparators.

Hereinafter, with reference to the accompanying drawings the present invention will be described in detail.

1 is a gate pulse generation circuit according to the present invention, and includes a first trailing device 1 that sums the luminance signal Y and the reference signal ref, and a second sum that adds the luminance signal Y and the reference signal ref. An adder 2, a third adder 3 that sums the excitation signal Y and a-(BY) signal, and a fourth adds the luminance signal Y, the-(BY) signal, and the-(RY) signal An adder 4, a fifth adder 5 for adding the luminance signal Y and a reference signal ref, and a sixth adder 6 for adding the-(RY) signal and the-(BY) signal,

A first comparator 7 for comparing and outputting the output signal of the first adder 1 and a-(RY) signal, and outputting a comparison of the output signal of the second adder 2 and the-(BY) signal; With a second comparator (8). A third comparator 9 for comparing and outputting the output signal of the third adder 3 and the reference signal ref, and comparing and outputting the output signal of the fourth adder 4 and the reference signal ref With a fourth comparator (10). A fifth comparator 11 configured to compare and output the output signals of the fifth adder 5 and the sixth adder,

The AND gate 12 generates a gate pulse by performing a logical multiplication on the output signals of the first to fifth comparators 7 to 11.

2 is a graph of the gate range and the color temperature trajectory of the circuit shown in FIG. 1, where T is the color temperature trajectory, ① is a graph of (RY) / Y> -a (a is a constant), and ② is (RY). ) / Y> -b (b is a constant), ③ is a graph of (BY) / Y <c (c is a constant), and ④ is (RY) / Y + (BY) / Y <d ( d is a graph of constant), and ⑤ is a graph of (RY) / Y + (BY) / Y> -e (e is a constant).

Based on the above-described configuration will be described in detail with reference to the first and second attached to the present invention.

First, as shown in FIG. 2, R-Y and B-Y color difference signals are represented as (R-Y) / Y and (B-Y) / Y so as not to be affected by the luminance Y. FIG.

The operation will be described based on FIG. 1, and the reference signal ref is a clamp voltage of each of the signals R-Y, B-Y, and Y, and is calculated as 0 at the input terminals of the comparators 7-11. That is, it is excluded from the comparison level.

First, in the first comparator 7, a signal obtained by adding the luminance signal (Y) and the reference signal (ref) from the first adder (1) to the non-inverting (+) input terminal is input, and the inverting (-) input terminal. The-(RY) signal is input to. Therefore, the condition under which the output of the first comparator 7 becomes high is as follows.

aY〉-(R-Y) ... (1)

Dividing both sides of Equation (1) by Y results in (R-Y) / Y> -a, as shown in the graph of ① in FIG.

On the other hand, in the second comparator 8, a signal obtained by adding the luminance signal Y and the reference signal ref from the second adder 2 is input to the non-inverting (+) input terminal, while inverting (-) input is input. -(BY) signal is input to the terminal. Therefore, the condition under which the output of the second comparator 8 becomes high is as follows.

bY〉-(B-Y) ... (2)

Dividing both sides of Equation (2) by Y results in (R-Y) / Y &gt; b, which is represented by the graph 2 in FIG.

On the other hand, in the third comparator 9, a signal obtained by adding the luminance signal Y and the-(BY) signal from the third adder 3 is input to the non-inverting (+) input terminal, while inverting (-) input is input. The reference signal ref is input to the terminal. Therefore, the condition under which the output of the third comparator 9 becomes high is as follows.

-(B-Y) + cY> 0 ... (3)

Dividing both sides of Equation (3) by Y results in (R-Y) / Y &lt;

In the Hanfun and the fourth comparators 10, a signal obtained by adding the luminance signals (Y),-(RY) signals, and-(BY) signals from the fourth adder 4 to the non-inverting (+) input terminal is input. The reference signal ref is input to the inverting (−) input terminal. Therefore, the condition that the output of the fourth comparator 10 becomes high is as follows.

-(R-Y)-(B-Y) + dY> 0 ... (4)

Dividing both sides of Equation (4) by Y results in (R-Y) / Y + (B-Y) / Y <d, as shown in the ④ graph of FIG.

On the other hand, in the fifth comparator 11, a signal obtained by adding the luminance signal Y and the reference signal ref is input from the fifth adder 5 to the non-inverting (+) input terminal, while inverting (-) input is input. As a terminal, a signal obtained by adding a-(BY) signal and a-(RY) signal is input from the sixth adder 6. Therefore, the condition under which the output of the fifth comparator 11 becomes high is as follows.

eY〉-(R-Y)-(B-Y) ... (5)

Dividing both sides of Eq. (5) by Y results in (R-Y) / Y + (B-Y) / Y> -e, as shown by the graph 5 in FIG.

Since it is input to the AND gate 12 including the wired And outputs of the first to fifth comparators 7 to 11, gate pulses satisfying the condition are generated only in a range where all are satisfied. High is output at this time.

Therefore, as shown in FIG. 2, when the (RY) signal and the (BY) signal are input to be 0 at 4500 DEG K to obtain a range of gate pulses satisfying the color temperature trace T, high luminance and low chroma parts are obtained. You can get it.

As described above, when the white balance is performed in the VTR, the high brightness and the low saturation are sensed to generate a gate pulse, thereby achieving stable auto white balance.

Claims (1)

(Correction) For an automatic white balance compensation circuit at VTR. First to sixth adders mixed by a reference signal, a luminance signal, and a-(R-Y) and-(B-Y) signal input; A first to fifth comparators for comparatively outputting the output signals and the reference signals of the first to sixth adders and-(R-Y) and-(B-Y) signals; The gate pulse generation circuit of the auto white balance, characterized in that it comprises an end gate that generates a gate pulse by satisfying a condition only within a range that satisfies the color temperature trajectory by receiving the output signals of the first to fifth comparators.