KR960002477A

KR960002477A - Interlayer contact method of semiconductor device

Info

Publication number: KR960002477A
Application number: KR1019940012898A
Authority: KR
Inventors: 김창남; 임재문; 백동원; 오춘식; 김세정
Original assignee: 김주용; 현대전자산업 주식회사
Priority date: 1994-06-08
Filing date: 1994-06-08
Publication date: 1996-01-26

Abstract

본 발명은 반도체 소자 제조시 반도체 기판(200)의 활성영역(204) 및 층간 콘택(contact)이 필요한 다층 전도막(205,220,210)의 층간 콘택방법에 있어서, 콘택을 요하는 최상층에 존재하는 전도막(210)이 반도체 기판(200)의 활성영역(204) 및 하부 다수의 전도막(205,220) 중 예정된 적어도 어느 하나(220)와 동시에 콘택되는 것을 특징으로 하는 반도체 소자의 층간 콘택 방법에 관한 것으로, 하나의 콘택공정으로 두개 이상의 층(210,220) 및 활성영역(204)을 용이하게 콘택함으로써 콘택공정을 단순화시킬 수 있으며, 콘택의 수를 최소화시켜 오버랩 마진의 크기를 감소시킴으로써 넓은 능동영역을 확보할 수 있기 때문에 반도체 소자의 축소가 가능하여 수율을 향상시킬 수 있고 대량생산이 용이하고, 또한, 매립형 콘택을 사용하지 않음으로써 결함발생의 제어가 용이하며, 매립형 콘택의 부산물인 트랜치가 형성되지 않아 정전 유기 불량을 감소시킬 수 있는 반도체 소자의 층간 콘택 방법에 관한 것이다.According to the present invention, in the interlayer contact method of the multi-layer conductive films 205, 220, and 210 which require the active region 204 and the interlayer contact of the semiconductor substrate 200 in the manufacture of a semiconductor device, A method of interlayer contact of a semiconductor device, characterized in that 210 is simultaneously contacted with at least one of the predetermined regions 220 of the active region 204 of the semiconductor substrate 200 and a plurality of lower conductive films 205 and 220. It is possible to simplify the contact process by easily contacting two or more layers 210 and 220 and the active region 204 with a contact process of the present invention, and to secure a wide active region by minimizing the number of contacts and reducing the size of the overlap margin. As a result, semiconductor devices can be reduced in size, yield can be improved, mass production can be easily performed, and defect control can be easily controlled by not using buried contacts. In addition, the present invention relates to an interlayer contact method of a semiconductor device capable of reducing electrostatic organic defects because trenches which are by-products of buried contacts are not formed.

Description

Interlayer contact method of semiconductor device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2A도는 에스램(SRAM) 내의 층간 콘택을 나타내는 회로도,2A is a circuit diagram illustrating interlayer contacts in an SRAM;

제2B도는 본 발명의 일실시예에 따른 층간 콘택의 단면도.2B is a cross-sectional view of an interlayer contact in accordance with an embodiment of the present invention.

Claims

In the interlayer contact method of the multilayer conductive films 205, 220, and 210, which require an active region 204 and an interlayer contact of the semiconductor substrate 200 in the manufacture of a semiconductor device, the conductive film 210 present in the uppermost layer requiring the contact is A method for interlayer contact of a semiconductor device, characterized in that a contact is made simultaneously with at least one of an active region (204) of the semiconductor substrate (200) and a plurality of lower conductive films (205, 220, 221).

The method of claim 1, wherein the multilayer conductive film (205, 220, 221, 210) is a two-layer or three-layer conductive film.

The semiconductor of claim 1, wherein the conductive film 210 present in the uppermost layer requiring the contact directly contacts the active region 204 of the semiconductor substrate 200 without using a buried contact. Interlayer contact method of devices.

※ Note: The disclosure is based on the initial application.