KR960001606B1 - Semiconductor device - Google Patents

Abstract

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Description

Semiconductor device

1 is a circuit diagram of an inverter suitable for applying the present invention.

2 is a conventional connection diagram of one phase of the inverter of FIG.

3 is a cross-sectional view of an example of a conventional semiconductor device.

4A and 4B show thermal load characteristics when an inverter is used for electric motor control.

5 is a cross-sectional view of a semiconductor device which is an embodiment in which the present invention is applied to the inverter of FIG.

6 is a lamination order display diagram of each semiconductor device of FIG.

FIG. 7 is a sectional view showing a modification of the embodiment of FIG.

8 is a display diagram of another modification of the embodiment of FIG.

9 is a cross-sectional view of a semiconductor device according to an embodiment in which the present invention is applied to the inverter of FIG.

FIG. 10 is a display diagram showing the stacking order of respective semiconductor elements in the embodiment of FIG.

FIG. 11 is a flowchart showing the stacking order of the semiconductor elements in the modification of the embodiment shown in FIG. 9 and FIG.

12 is a circuit diagram showing another example of an inverter circuit to be applied to the present invention.

FIG. 13 is a flowchart showing the stacking order of semiconductor devices in the case where the present invention is applied to the inverter circuit of FIG.

14 is a representative circuit diagram of a chopper circuit to which the present invention is to be applied.

FIG. 15 is a lamination order display diagram of each semiconductor element when the present invention is applied to the chopper circuit of FIG.

FIG. 16 is a sectional view of a semiconductor device according to the embodiment of FIG.

17 is a circuit diagram showing a semiconductor device to which the present invention is to be applied.

18 is a lamination order display diagram when the present invention is to be applied to FIG. 17. FIG.

* Explanation of symbols for main parts of the drawings

1: condenser 4: reactor

5: diode 9: condenser

5, 21, 22, 31, 32: U-phase semiconductor elements 61-65: pin

81 ~ 85: Insulation tube l ₁ , l ₂ : Thermal load characteristics of GTO

The present invention relates to a semiconductor device particularly suitable for miniaturization in a semiconductor device.

As one example of a semiconductor device, it has conventionally been known to possess a circuit by connecting two kinds of semiconductor elements in reverse polarity and connecting a plurality of these anti-parallel bodies in series.

Inverters using gate turn-off thyristors (hereinafter referred to as GTO) as one example of this type of circuit are known and are described, for example, in Japanese Patent Application Laid-Open No. 58-9349.

Although widely known in the above publications, cooling of semiconductors is an important problem in semiconductor devices, and various proposals have been made.

The above application describes a case where two GTOs are connected in parallel in each anti-parallel. However, since a large capacity of the GTO has been developed, one GTO has been used in recent years.

However, with the increase in the capacity of GTO, the amount of heat generated per GTO is increased, and the cooling of the GTO has become a major problem.

1 shows a schematic connection diagram of a three-phase inverter, which is an example of an inverter using a GTO, and each anti-parallel owns one GTO. In each phase of the inverter circuit, for example, the U phase 16, the GTO 21 and the reverse parallel diodes 31 are connected, and further, the GTO 22 and the diode 32 are connected in series with the reverse parallel body. The antiparallel is connected.

The other V phase 17 and W phase 18 are also comprised in the same shape, and each phase is connected to the load 19, for example, the motor 19. As shown in FIG.

In the figure, 1 is a condenser, 4 is a reactor, 5 is a diode, and 12 and 13 are inlet terminals connected to a power source (not shown). Now, this one-phase, for example, U-phase semiconductor devices 5, 21, 22, 31, and 32 are pulled out and their stacking order connection relationship is shown in FIG. As shown in FIG. 3, it is put in a cooling apparatus. The cooling apparatus shown in FIG. 3 is a typical example known in the art, and cools a semiconductor using the evaporation of a cooling medium, for example, disclosed in Japanese Patent Application Laid-Open No. 50-123277.

In the figures, each of 61 to 65 is a cooling medium capable of evaporating inside, for example, a cooling fin having a content of a fron. The refrigerant evaporates and vaporizes due to the heat generated by the adjacent semiconductor elements. It is configured to take away.

The steam generated here is led to the condenser 9 through the insulated pipes 81 to 85 to heat exchange with the outside air.

In Fig. 3, each of the fins 61 to 65 is heated by semiconductors adjacent to both sides, so that sufficient cooling capacity is required to cool the semiconductors on both sides, so that the cooling fins must be enlarged.

In an inverter for controlling a drive motor mounted on the floor of one tank, the size of the device is severely limited, so the size of the cooling fin is limited, and improvement is desired.

It is an object of the present invention to provide a semiconductor device suitable for miniaturization by eliminating the drawbacks of conventional devices.

SUMMARY OF THE INVENTION In order to achieve the above object, the present invention is directed to a semiconductor device having a circuit in which at least one first semiconductor element and a second semiconductor element are connected in anti-parallel and have a circuit in which the anti-parallel is connected to a plurality of series forces. By alternately stacking semiconductor elements, each cooling fin is disposed between adjacent first and second semiconductor elements to cool adjacent semiconductor elements therefrom, and at the same time electrically connected to each other by at least one connection conductor. Two cooling fins are electrically connected to each other so that a plurality of anti-parallel bodies of the first and second semiconductor elements can be connected in series.

MEANS TO SOLVE THE PROBLEM The present inventors pay attention to the fact that in the circuit which connected several antiparallel bodies of a 1st, 2nd semiconductor element in series, the 1st, 2nd semiconductor element has a different load maximum time point in principle. By alternately stacking two semiconductor elements with cooling fins, it has been found that the cooling fins can be prevented from being enlarged.

In other words, when the first and second semiconductor elements with the cooling fins are loaded at maximum, one of them is not the maximum load in principle, so that the cooling capacity of each cooling fin can be equalized, thereby miniaturizing the semiconductor device. .

For example, when the inverter of FIG. 1 is used for controlling an induction motor for an electric vehicle, a representative example of the relationship between the heat load of the GTO and the diode and the driving mode of the electric vehicle is shown in FIGS. 4A and 4B.

In these figures, l ₁ , l ₂ are the heat load characteristics of the GTO, l ₃ is the curve indicating the thermal load characteristics of the diode, and l ₄ is the heat load characteristic of the sum of the GTO and the diode (ie, the total heat load of l ₁ and l ₃ ). Are displayed respectively. Sections A ₁ and A ₂ indicate the reversal period (starting period) of the electric vehicle against the distribution curves l ₁ and l ₂ , section B the other driving period and section C the regenerative braking period.

In addition, the dashed line l ₂ indicates the case where a coasting operation is performed after starting.

As apparent from the figure, during normal startup, the heat load of the GTO, that is, the heat generation amount, becomes maximum, while the heat load of the diode is not the maximum, and the value thereof is smaller than the heat load of the GTO.

In addition, during regenerative braking, the heat load of the GTO is small while the heat load of the diode is maximized and is larger than the heat load of the GTO.

On the other hand, the heat time constant of the cooling fins cooled by evaporation is short, 5-10 seconds, and shorter than the retrograde time or braking time.

Considering this load condition in the third road shown as a conventional example, since the cooling fins 62 receive heat from both the GTOs 21 and 22 at the same time, the heat fins receive the maximum heat load from both sides at the time of backing. .

Therefore, as the cooling fins 62, it is necessary to be a large cooling fin of low heat resistance compared to the other cooling fins 61 (63 to 65).

In addition, it was found that during the regenerative brake, the thermal load of the cooling fins 64 sandwiched between both diodes 31 and 32 is large and the cooling fins 64 must be enlarged.

The inventors have found that the diode is the maximum load when the GTO is not at maximum load and the GTO is not at maximum load. Thus, the fact is that this is generally the antiparallel of the first and second semiconductor devices. The first and second semiconductor elements are stacked alternately with each other, considering that they correspond to a circuit connected to a plurality of circuits, for example, a chopper circuit.

In other words, the first and second semiconductor elements are alternately inserted by inserting cooling fins so that one side of the semiconductor element is at maximum load and the other is not at maximum load, thereby reducing the heat burden of the cooling fins and miniaturizing the cooling fins. In addition, further attempts are made to miniaturize the device.

FIG. 5 shows a cross-sectional view of the semiconductor device in the case where the present invention is applied to the inverter shown in FIG.

The arrangement of the GTO 21, 22 and the diodes 5, 31, and 32 of the U phase 16 portion of the inverter of FIG. 1 is shown, and the other V and W phases have the same structure.

In the drawings, the same reference numerals are assigned to those having the same functions as those in FIG.

6 is a diagram showing the stacking order of the semiconductor elements 5, 21, 22, 31, and 32. FIG.

As is clear from FIG. 5 and FIG. 6, the diodes and the GTO are alternately stacked with each other, and the GTO and the diode which are adjacent to each other through the cooling fin are interposed therebetween.

More specifically, since each of the cooling fins 101 to 104 is in contact with the GTO and the other is in contact with the diode, the adjacent two elements do not have the maximum thermal load at the same time.

The cooling fin is preferably cooled by the evaporation of the refrigerant, which may be the same as that of FIG.

In this case, since the thermal time constant of the cooling fin is short with respect to the load time of the GTO and the diode (compared with a large load duration), the thermal resistance corresponding to the maximum value of the load is required, but since both sides are not at the same time, the cooling fin is Even small size can satisfy required thermal conditions.

41 and 42 in FIG. 5 and FIG. 6 are connection conductors respectively connecting two cooling fins, and two anti-parallel groups of GTO and diode are formed in series.

That is, the connection conductor 41 was electrically connected with the cooling fins 101 and 105, and the connection conductor 42 was electrically connected with the cooling fins 102 and 104. As shown in FIG.

In FIG. 5, the cooling fins are not placed on the left side of the diode 5, but the cooling fins on the other side are omitted since the heat generation amount of the diodes 5 is smaller than that of other semiconductor elements and only one surface of the cooling element is sufficient.

FIG. 7 shows a modification of the embodiment of FIG. 5 and shows a case where the heat transfer amount of the GTOs 21, 22, diodes 31 and 32 is small.

The cooling fin 101 on one side of the GTO 21 and the cooling fin 105 on one side of the diode 31 shown in FIG. 5 are omitted.

This is the case where the diode 31 and the GTO 21 can be sufficiently cooled by only the cooling fins 102 and 104, respectively, and the same effects as in the first embodiment can be obtained.

Furthermore, since the heat generation amount of the diode 5 is small, the diode 5 is connected to the electrode of the GTO 21.

In this embodiment, the semiconductor device can be further miniaturized in the embodiment of FIG.

FIG. 8 shows a modification of the embodiment of FIG. 5 and changes the connection order of the semiconductor elements. That is, the diode 5 of FIG. 5 is disposed beside the cooling fin 105.

The connecting conductors 47 and 48 correspond to the connecting conductors 41 and 42 of FIG. 5, respectively.

In each of the above embodiments, the configuration shown in FIG. 5 or FIG. 7 is provided separately on each top surface, or the embodiment in which the inverter is miniaturized by integrally configuring the U phase, V phase, and W phase. It is shown at 9 degrees.

The configuration shown in FIG. 9 and each phase is approximately the same as the embodiment of FIG. 5, and the GTO 22 of the V phase 17 is arranged adjacent to the cooling fin 105 of the U phase 16. As shown in FIG.

Further, the G phase 222 of the W phase is disposed adjacent to the cooling fin 109 of the V phase.

In the drawings, other configurations of the W phase other than the G phase 222 of the W phase and the cooling fin 110 are omitted.

The diodes 5, 15, and 25 in each phase may be connected to the cooling fins 103, 107, and 111, respectively.

In this embodiment, the boundary of each phase is arranged so that the GTO and the diode may be adjacent to each other via the cooling fins 105 and 109, respectively.

Therefore, as in the embodiment of FIG. 5, since all cooling fins do not have both sides adjacent to the GTO, the cooling fins can be miniaturized by reducing the heat burden of the cooling fins.

That is, by laminating | stacking three phases GTO and a diode alternately, it is possible to arrange | position each phase adjacently.

It can be made much smaller than the conventional apparatus.

In addition, when the U, V, and W phases are configured independently, electrical insulation is required between phases, which is why a space is necessary. However, in FIG. In other words, in the drawings, 101 to 113 are cooling fins, 41 to 46 are connection conductors, and 87 to 93 are insulated pipes.

Fig. 10 shows the lamination order of each semiconductor element in the embodiment of Fig. 10.

FIG. 11 is a diagram showing the stacking order of the semiconductor elements in the modification of the embodiment shown in FIG. 9 and FIG.

In FIG. 11, the stacking order of the embodiment of FIG. 10 and the semiconductor element is slightly changed.

That is, the GTO 21, the diode 32, the GTO 22, the diode 31, the GTO 121, the diode 132, the GTO 122, the diode 131, the GTO 221, the diode 232 , The GTO 222, the diode 231, and the diodes 5, 15, and 25 are respectively connected to the GTO 22, 121 through the cooling fins between the adjacent GTO and the diode. It is attached to the cooling fin of the cathode side of (222).

In the drawing, dotted lines 51 to 56 are connection conductors.

12 is a circuit diagram showing one phase of another example of an inverter circuit to which the present invention is to be applied.

The inverter circuit 161 in FIG. 12 has a configuration in which two circuits of the GTOs 21, 22, the diodes 31, and 32 in FIG. 1 are connected in series.

13 shows the stacking order of the semiconductor elements (diodes 5, 311, 312, 321, 322) and GTOs 411, 412, 421, and 422 when the present invention is applied to the inverter circuit of FIG.

In Fig. 13, the connecting conductor is omitted.

Fig. 14 shows the main parts of a typical example of a chopper circuit for controlling the current of a DC motor, but in this case as well, the same effect as described above can be obtained by applying the present invention.

In the chopper circuit shown in the drawing, a direct current voltage is applied to the armature 201 and the starter 202 and the chopper 100 of the DC motor 20 through the filter capacitor 1 in a DC power supply not shown. .

The chopper 100 has a series of GTO thyristors 521 and 522, and diodes 531 and 532 which are connected in anti-parallel to these thyristors as main components.

Freewheel diodes 57 and 58 are connected to the DC series motor 20 in parallel.

The lamination order of each semiconductor element in the case where the present invention is applied to the chopper circuit of FIG. 14 is shown in FIG.

As apparent from Fig. 15, the stacking is performed in the following order: diodes 57, 58, GTO 521, diodes 532, GTO 522, and diodes 531. Is interposed.

In the present embodiment, when a large current flows through the diodes 57 and 58 when the GTOs 521 and 522 are turned off, the cooling fins are preferably interposed between the diodes 57 and 58.

In the figure, 541 and 542 are connection conductors.

16 is a cross-sectional view of the semiconductor device of the present embodiment, and the cooling fins 105 may be omitted.

As described above, in a semiconductor device having a circuit in which the thyristors and the diodes are connected to each other in reverse polarity and connected in parallel with each other, the thyristors and the diodes are alternately stacked with each other so that the boiling effect of the refrigerant is preferably used. It is configured to interpose the cooling fins.

As a result, thyristors and diodes having different load conditions in time share the cooling fins, and the cooling fins can be miniaturized as long as the cooling fins have a balanced cooling capacity with approximately the maximum load condition of one element.

In addition, the use of conductive cooling fins allows the thyristor and diode to be approached to each other so that there is no need to install an insulating layer in the middle, which contributes to miniaturization.

As described above, according to the present invention, the semiconductor device can be miniaturized by miniaturization of the cooling fins.

In the above embodiment, the present invention has been described in the case where the present invention is applied to an inverter circuit and a chopper circuit, but the present invention is not limited to these circuits, but the so-called first and second semiconductor elements are connected in reverse parallel to connect a plurality of inverse parallel bodies. This circuit is connected to the circuit board, and is applicable to a circuit in which the maximum load time point of the first and second semiconductor elements is different.

In addition, in the above embodiments, the case where the circuit in which two elements are connected in reverse parallel is connected to a plurality of series has been described. However, the circuit in which three or more elements in parallel are connected to a plurality of series is also applicable. It is not necessary to mention.

FIG. 17 is a circuit diagram when two diodes of two GTOs are connected in series.

FIG. 18 shows the order in which the individual semiconductor elements of FIG. 17 are stacked.

Claims (11)

The first and second semiconductor devices 31, 22, and the first cooling fin member 104 composed of the first laminated member (31, 22, 104) comprising a first semiconductor device, respectively, It has an anode side and a cathode side, and the anode side of the first semiconductor element 32 and the anode side of the second semiconductor element 22 are opposed to each other through the first cooling fin member, and another pair of first and second And a second stacked member (32, 21, 102) composed of semiconductor elements (32, 21) and a second cooling fin member (102), each of said another pair of first and second semiconductor elements being an anode side And the cathode side, and the anode side of another first semiconductor element and the cathode side of another second semiconductor element are opposed to each other through the second cooling fin portion, and that of the second laminated members 32, 21, 102 The anode side of the first semiconductor element 32 and the cathode side of the second semiconductor element 22 of the first laminated member 31, 22, 104 are opposed to each other through the third cooling fin member 103. Third cooling A stacking block (31, 22, 104; 32, 21, 102; 103) constituted by a member and the first and second stacking members, and electrical terminals (101, 105) provided at both ends of the stacking block; A connecting conductor 41 electrically connecting the electrical terminals of the stacked block to form a circuit in which two anti-parallel connections each having a pair of first and second semiconductor elements are connected in series, and the stacked block And a connecting conductor (42) for electrically connecting said first and second cooling fin members (104, 102). The semiconductor device according to claim 1, wherein each of the electrical terminals (101, 105) provided at both ends of the stacked block is a cooling fin member. The device of claim 1, wherein each of the first, second, and third cooling fin members (104, 102, 103) has a coolant therein, and the coolant is boiled and vaporized by heat generation from an adjacent semiconductor device. Semiconductor device for cooling the. 2. The semiconductor device according to claim 1, wherein said semiconductor device is an inverter circuit each of said second and first semiconductor elements comprising a diode gate turn off thyristor. The anode side of the first semiconductor elements 311 and 321 is opposed to the anode side of the second semiconductor elements 412 and 422 through the first cooling fin member and the pair of first and second cooling fin members. The cathode side of each of the first and second laminated members and the first semiconductor elements 312 and 322 composed of semiconductor elements is opposed to the cathode side of the second semiconductor elements 411 and 421 through the second cooling fin member. For example, each of the third and fourth laminated members including the second cooling fin member, the pair of first and second semiconductor elements, and the cathode side of the second semiconductor element 412 of the first laminated member may be the third cooling member. A first stacking block comprising a third cooling fin member and the first and second stacking members in a manner opposite to the cathode side of the first semiconductor element 321 of the second stacking member through a fin member; The anode side of the second semiconductor element 421 of the third laminated member is the anode of the first semiconductor element 312 of the fourth laminated member through the fourth cooling fin member. The cathode side of the second semiconductor element 422 is formed at an end portion of the second stacked block and the first stacked block including the fourth cooling fin member, the third and fourth stacked members in a manner opposite to the side. A stacked block comprising a fifth cooling fin member and the first and second stacked blocks in a manner opposite to the anode side of the first semiconductor element 322 at an end portion of the second stacked block through a cooling fin member; A unit, an electrical terminal provided at both ends of the laminated block unit, a connection conductor electrically connecting the second cooling fin member of the third laminated member and the first cooling fin member of the second laminated member; A connecting conductor electrically connecting the second cooling fin member of the fourth laminated member and the first cooling fin member of the first laminated member, and a connecting member electrically connecting the third and fourth cooling fin members. And each of the four plagues that owns a pair of first and second semiconductor devices. To form a circuit connected in series connection a semiconductor device consisting of a connection conductor for electrically connecting the electrical terminals are installed in the two end portions of the laminated block. 6. The semiconductor device according to claim 5, wherein each of the first to fifth cooling fin members has a refrigerant therein, the refrigerant boils and vaporizes by heating of adjacent semiconductor elements to cool the elements. 6. The semiconductor device according to claim 5, wherein said semiconductor device is an inverter circuit in which said first and second semiconductor elements each comprise a gate turn-off thyristor and a diode. The stacking block has a plurality of stacking blocks 16, 17, and 18, each of which is composed of first and second stacking members, and the anode side of the first semiconductor element 31 is connected to the second semiconductor through the first cooling fin member. The first laminated member composed of the first cooling fin member 104 and the pair of first and second semiconductor elements 31 and 22 in a manner opposite to the anode side of the element 22, and another first semiconductor. The cathode side of the element 32 is opposed to the cathode side of another second semiconductor element 21 via the second cooling fin member 102 and the pair of first and second cooling fin members 102. The second laminate member composed of the second semiconductor elements 32 and 21 and the cathode side of the second semiconductor element of the first laminate member are connected to the second laminate member through a third cooling fin member 103. And a third cooling fin member 103 in a manner opposite to the anode side of the first semiconductor element, wherein the cathode side of the first semiconductor element of the stack member of one of the stack blocks The plurality of laminated semiconductors 16, 17, and 18 are connected to the anode side of the second semiconductor element of the second laminated member of the other one of the laminated blocks through the fourth cooling fin members 105 and 109. And a stacked block unit comprising at least fourth cooling fin members 105 and 109, electrical terminals provided at both ends of the stacked block unit, and first and second member cooling fin members respectively disposed in each of the stacked blocks. And a connecting conductor (41, 43, 45) for electrically connecting each of the fourth cooling fin members to the electrical terminal. The semiconductor device of claim 8, wherein the first, second, third, and fourth cooling fin members have a refrigerant therein, and the refrigerant boils and vaporizes by heating of an adjacent semiconductor element to cool the element. . 9. The semiconductor device according to claim 8, wherein the semiconductor device is an inverter circuit in which the first and first semiconductor elements are each composed of a gate turn-off thyristor (21, 22) and a diode (31, 32). The semiconductor device according to claim 8, wherein each of the electrical terminals provided at both ends of the stacked block unit is a cooling fin member (101, 105).

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