KR960001181B1 - Manufacturing method of ccd image pick-up device - Google Patents
Manufacturing method of ccd image pick-up device Download PDFInfo
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- KR960001181B1 KR960001181B1 KR1019920006441A KR920006441A KR960001181B1 KR 960001181 B1 KR960001181 B1 KR 960001181B1 KR 1019920006441 A KR1019920006441 A KR 1019920006441A KR 920006441 A KR920006441 A KR 920006441A KR 960001181 B1 KR960001181 B1 KR 960001181B1
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- 238000004519 manufacturing process Methods 0.000 title claims description 12
- 238000000034 method Methods 0.000 claims abstract description 34
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 19
- 238000005229 chemical vapour deposition Methods 0.000 claims abstract description 9
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- 238000005289 physical deposition Methods 0.000 claims description 6
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- 239000005380 borophosphosilicate glass Substances 0.000 claims description 4
- 239000005360 phosphosilicate glass Substances 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
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- 230000003647 oxidation Effects 0.000 abstract description 7
- 238000007254 oxidation reaction Methods 0.000 abstract description 7
- 230000003287 optical effect Effects 0.000 abstract 2
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- 239000010410 layer Substances 0.000 description 47
- 229920002120 photoresistant polymer Polymers 0.000 description 18
- 239000012535 impurity Substances 0.000 description 12
- 238000011109 contamination Methods 0.000 description 9
- 238000005530 etching Methods 0.000 description 9
- 229910052751 metal Inorganic materials 0.000 description 8
- 239000002184 metal Substances 0.000 description 8
- 238000001312 dry etching Methods 0.000 description 7
- 238000005468 ion implantation Methods 0.000 description 6
- 108091006146 Channels Proteins 0.000 description 5
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- 150000002500 ions Chemical class 0.000 description 5
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- 238000010438 heat treatment Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
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- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
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- H01L29/808—Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a PN junction gate, e.g. PN homojunction gate
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/823487—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of vertical transistor structures, i.e. with channel vertical to the substrate surface
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
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- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66666—Vertical transistors
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Abstract
Description
제1도의 (a)∼(f)는 종래의 CCD 이미지 센서의 제조공정 순서도.(A)-(f) is a flowchart of the manufacturing process of the conventional CCD image sensor.
제2도의 (a)∼(f)는 이발명의 일실시예에 의한 CCD이미지 센서의 제조공정 순서도이다.2 (a) to 2 (f) are flowcharts of a manufacturing process of a CCD image sensor according to an embodiment of the present invention.
이 발명은 CCD이미지 센서의 제조방법에 관한 것으로, 특히 광다이오드위에 보호층을 형성하여 식각손상 및 불순물 오염으로부터 광다이오드를 보호하여 백점불량 및 암전류 발생을 감소시킬 수 있는 CCD 이미지 센서의 제조방법에 관한 것이다.The present invention relates to a method of manufacturing a CCD image sensor, and more particularly, to a method of manufacturing a CCD image sensor capable of reducing white spot defects and dark currents by protecting a photodiode from etching damage and impurity contamination by forming a protective layer on the photodiode. It is about.
일반적으로 CCD 이미지 센서는 다수개의 광다이오드들로 이루어져 입사되는 빛을 전기적 신호량으로 바꾸어주는 수광부와, 상기 전기적 신로량들을 전송하여 주는 수직 및 수평전송단인 전송부와, 이와같이 전송된 신호를 외부로 출력하는 출력버퍼부로 구성되어 있다.In general, a CCD image sensor is composed of a plurality of photodiodes, the light receiving unit for converting the incident light into the amount of electrical signal, the transmission unit which is a vertical and horizontal transmission terminal for transmitting the electrical path amount, and the signal transmitted in this way It is composed of an output buffer section to output the
이와같은 구성된 이미지 센서의 화질은 수광부인 광다이오드에서 주로 결정되므로 수광부의 구조형태는 이미지 센서의 화질에 큰 영향을 미친다. 따라서 수광부인 광다이오드의 결함은 그대로 화상결함으로 나타난다.Since the image quality of the configured image sensor is mainly determined by the photodiode as the light receiving unit, the structure of the light receiving unit greatly affects the image quality of the image sensor. Therefore, the defect of the photodiode which is a light receiving part appears as an image defect as it is.
이러한 결함 발생 요인으로는 이온 주입시 계면산화층으로부터 흡착되는 중금속 이온과, 웨이퍼내부의 금속이온, 그리고 건식식각에 사용하는 가스이온의 영향으로 생기는 이온성 오염과 화소인 포토다이오드의 불균일등이다.These defects are caused by ionic contamination caused by the influence of heavy metal ions adsorbed from the interfacial oxide layer during ion implantation, metal ions in the wafer, and gas ions used in dry etching, and unevenness of the photodiode as a pixel.
따라서 수광부 상부층은 무결점층이 이상적이나, 이는 공정상 이온주입 및 이온등을 이용한 건식식각등에 의해 오염되고, 이 오염층을 빛이 투과하면서 화질저하가 발생한다.Therefore, the light-receiving part upper layer is ideally a non-defective layer, which is contaminated by dry etching using ion implantation and ions in the process, and the image quality deteriorates as light passes through the contaminated layer.
CCD 이미지 센서의 일반적인 제조방법은 제1도의 (a)∼(d)에 도시한 바와 같다.The general manufacturing method of a CCD image sensor is as shown to Fig.1 (a)-(d).
제1도의 (a)에 도시한 바와같이, N형 실리콘 반도체 기판(10)의 표면에 붕소로 p형 불순물 이온을 이용하여 제1전위우물층(12)과 제2전위우물층(14)을 선택적으로 이온주입한 후 열처리 공정을 통하여 깊게 형성한다. 그리고 상기 제1 및 제2전위우물층(12),(14)에는 광다이오드인 화소와 화소 사이를 분리하기 위한 고농도의 p형 채널스통영역(16)이 형성되고, 상기 제2전위우물층(14)에는 전송채널인 n형 BCCD (Burird channel CCD)(18)가 형성되어 있다. 또한 상기 제1전위우물층(12)에는 광다이오드(20)가 형성되어 있다.As shown in FIG. 1A, the first potential well layer 12 and the second potential well layer 14 are formed by using p-type impurity ions with boron on the surface of the N-type silicon semiconductor substrate 10. After ion implantation is selectively formed deep through the heat treatment process. The first and second potential well layers 12 and 14 are provided with a high concentration p-type channel through region 16 for separating the pixel from the photodiode and the second potential well layer ( 14, n-type BCCD (Burird channel CCD) 18, which is a transmission channel, is formed. In addition, a photodiode 20 is formed in the first potential well layer 12.
이와같이 구성된 화소 구조의 상부에 열산화 및 물리중착 및 화학기상중착등의 방법으로 얇은 산화막층인 게이트 산화막(22) 및 N형 불순물이 동우핑된 다결정 실리콘층(24)을 순차적으로 형성한다.The gate oxide film 22, which is a thin oxide film layer, and the polycrystalline silicon layer 24 doped with N-type impurities are sequentially formed on the pixel structure having the above structure by thermal oxidation, physical deposition, and chemical vapor deposition. .
이때 상기 게이트 산화막(22)은 산화막-질화막-산화막(ONO)의 구조로 형성한다.In this case, the gate oxide film 22 is formed in a structure of an oxide film-nitride film-oxide film (ONO).
제1도의 (b)에 도시한 바와같이, 상기 다결정 실리콘층(24)의 상부에 포토레지스트를 도포한 후 통상의 라소그래피공정에 의해 패턴을 형성한 후 포토레지스트 패턴(26)을 마스크로하여 건식식각 공정으로 다결정실리콘층(24)을 제거한다.As shown in FIG. 1B, after the photoresist is applied on the polycrystalline silicon layer 24, a pattern is formed by a conventional lathography process, and then the photoresist pattern 26 is used as a mask. The polycrystalline silicon layer 24 is removed by a dry etching process.
제1도의 (c)에 도시한 바와같이, 상기 다결정 실리콘층(24)의 포토레지스트 패토레지스트 패턴(26)을 제거하여 제1 전송전극(28)을 형성한다. 그 다음 상기 전극(28)을 열산화하여 전극(28)의 상부 표면 및 측면부에 제1절연막(30)을 형성한다. 그 다음 물리중착 또는 화학기상 중착등의 방법에 의해 상기 제1절연막(30)과 광다이오드(20) 상부에 형성된 게이트 산화막(22) 상부의 전표면에 N형의 불순물이 도우핑된 다결정 실리콘층(32)을 형성한다.As shown in FIG. 1C, the photoresist patoresist pattern 26 of the polycrystalline silicon layer 24 is removed to form the first transfer electrode 28. Then, the electrode 28 is thermally oxidized to form a first insulating layer 30 on the upper surface and side surfaces of the electrode 28. Then, polycrystalline silicon doped with N-type impurities on the entire surface of the gate oxide film 22 formed on the first insulating film 30 and the photodiode 20 by physical deposition or chemical vapor deposition. Layer 32 is formed.
그후 상기 다결정 실리콘층(32)의 상부에 포토레지스트를 도포한 후 통상의 리소그래피 공정에 의해 패턴을 형성한 후 포토레지스트 패턴(34)을 마스크로하여 건식식각 공정으로 다결정 실리콘층(32)을 제거한다.After that, after the photoresist is applied on the polycrystalline silicon layer 32, a pattern is formed by a conventional lithography process, and then the polycrystalline silicon layer 32 is removed by a dry etching process using the photoresist pattern 34 as a mask. do.
제1도의 (d)에 도시한 바와같이, 상기 다결정 실리콘층(32)의 포토레지스트 패턴(34)을 제거하여 제2 전송전극(38)을 형성한다. 그후 상기 전극(38)을 열산화하여 전극(38)의 상부표면에 제2 절연막(40)을 형성한다.As shown in FIG. 1D, the photoresist pattern 34 of the polycrystalline silicon layer 32 is removed to form the second transfer electrode 38. Thereafter, the electrode 38 is thermally oxidized to form a second insulating film 40 on the upper surface of the electrode 38.
제1도의 (e)에 도시한 바와같이, 그 다음 물리중착 또는 화학기상 중착방법에 의해 상기 제2절연막(40)과 광다이오드(20) 상부의 게이트 산화막(22)의 전표면에 알루미늄(Al) 또는 텅스텐(W) 합금을 이용하여 광차폐용 금속층(42)을 형성한다. 그후 상기 금속층(2)의 상부에 포토레지스트를 도포한 후 통상의 리소그래피공정에 의해 패턴을 형성한 후 포토레지스트 패턴(44)을 마스크로 하여 건식식각 공정으로 광다이오드 (20) 상붕의 금속층(42)을 제거한다.As shown in (e) of FIG. 1, aluminum (on the second surface of the second insulating film 40 and the gate oxide film 22 on the photodiode 20) is formed by physical or chemical vapor deposition. Al) or tungsten (W) alloy is used to form the light shielding metal layer 42. Then, after the photoresist is applied on the metal layer 2, a pattern is formed by a conventional lithography process, and then the metal layer 42 of the upper layer of the photodiode 20 is subjected to a dry etching process using the photoresist pattern 44 as a mask. ).
제1도의 (f)에 도시한 바와같이, 상기 금속층(42)의 포토레지스트 패턴(44)을 제거하여 차광막(46)을 형성한다.As shown in FIG. 1F, the photoresist pattern 44 of the metal layer 42 is removed to form the light shielding film 46.
이와같은 CCD 이미지 센서의 일반적인 제조공정은 사진공정을 통한 선택적 이온주입 및 산화, 확산공정을 통한 PN 접합 형성, 전송단의 전송전극 및 광차폐용의 차광막의 형성 후 사진공정을 통한 패턴형성 후 식각공정 진행이나 이온주입공정 진행, 산화 및 중착을 통한 절연층 형성등이 반복된다. 이와같이 상기 공정이 진행되는 동안 빛을 전자로 변환하는 부분인 광다이오드는 지속적으로 노출이 되어 있어 식각에 의한 손상에 취약하다. 또한 이러한 식각공정이 반복되는 동안 게이트 산화막은 더욱 얇아진다. 그러므로 후공정 진행과정에서 광다이오드의 오염가능성은 제1 및 제2전송전극으로 보호되는 전송단보다 높다고 할 수 있다.The general manufacturing process of such CCD image sensor is selective ion implantation and oxidation through photo process, PN junction through photolithography process, formation of transfer electrode and light shielding film for light shielding, and then pattern formation through photo process. The process proceeds, the ion implantation process proceeds, and the formation of an insulating layer through oxidation and deposition is repeated. As such, the photodiode, which is a part of converting light into electrons during the process, is continuously exposed and thus vulnerable to damage due to etching. In addition, the gate oxide film becomes thinner during the etching process. Therefore, the possibility of contamination of the photodiode during the post process is higher than that of the transmission stage protected by the first and second transfer electrodes.
이와같이 구성된 CCD 이미지 센서에서 광다오이드에 축적된 신호전하는 필드쉬프트(field shift) 기간동안에 전송단인 BCCD에 전송된다. 이 신호전하는 전송전극의 쉬프트 레지스트의 동작에 의해서 출력부로 전송된다. 따라서 광다이오드의 전하 축적 기간동안에 순수한 빛에 의해서 발생한 신호전하 이외에 광다이오드의 오염 및 손상에 의해 열적 생성된 전자가 신호전하에 포함되어 출력부로 이동된다. 이 늘어난 신호전하가 CCD 이미지 센서에서 암전류 및 백점의 원인으로 작용하는 문제점이 있었다.In the CCD image sensor configured as described above, the signal charge accumulated in the photodiode is transmitted to the BCCD, which is the transmission end, during the field shift period. This signal charge is transferred to the output part by the operation of the shift resist of the transfer electrode. Therefore, in addition to the signal charge generated by pure light during the charge accumulation period of the photodiode, electrons thermally generated by contamination and damage of the photodiode are included in the signal charge and moved to the output unit. This increased signal charge has a problem of causing a dark current and a white point in the CCD image sensor.
이 발명의 목적은 이와같은 종래의 CCD 이미지 센서에서 발생되는 문제점을 해결하기 위한 것으로 광다이오드위에 보호막을 형성하는 CCD 이미지 센서의 제조방법을 제공하는 것이다.SUMMARY OF THE INVENTION An object of the present invention is to provide a method of manufacturing a CCD image sensor in which a protective film is formed on a photodiode to solve the problems occurring in the conventional CCD image sensor.
이 발명의 다른 목적은 광다이오드의 식각 손상 및 불순물 오염을 최소로 하여 암전류 및 백점등을 저감할 수 있는 CCD 이미지 센서의 제조방법을 제공하는 것이다.Another object of the present invention is to provide a method of manufacturing a CCD image sensor capable of reducing dark current and white light by minimizing etching damage and impurity contamination of a photodiode.
상기한 목적을 당성하기 위하여 이 발명에 따른 방법은 실리콘 기판에 전위우물층과 광다이오드, 신호전송단인 수직전하 전송소자와 공농도의 채널분리층이 형성되고, 그 상부에 게이트 산화막과 상기 게이트 산화막 상부에 수광부가 오픈된 다결정 실리콘층으로 이루어진 전송전극과 절연막 및 광차폐용 차광막이 차례로 형성되는 CCD 이미지 센서의 제조방법에 있어서, 상기 광다이오드 상부층에 물리중착이나 화학기상 중착 또는 선택적 산화공정에 의해 보호막을 형성하는 단계를 포함한다.In order to achieve the above object, in the method according to the present invention, a potential well layer, a photodiode, a vertical charge transfer element serving as a signal transmission stage, and a channel concentration layer having co-concentration are formed on a silicon substrate, and a gate oxide film and the gate are formed thereon. A method of manufacturing a CCD image sensor in which a transfer electrode made of a polycrystalline silicon layer having a light receiving portion open on an oxide film, an insulating film, and a light shielding film are sequentially formed, wherein the physical deposition, chemical vapor deposition or selective oxidation of the photodiode upper layer is performed. Forming a protective film.
이와같은 방법에 의해 형성된 이 발명의 일 실시예에 의한 CCD 이미지 센서를 첨부한 도면을 참고로하여 상세히 설명하면 다음과 같다.When described in detail with reference to the accompanying drawings, a CCD image sensor according to an embodiment of the present invention formed by such a method as follows.
제2도의 (a)에 도시한 바와같이, N형 실리콘 반도체 기판(50)의 표면에 붕소로 P형 불순물 이온을 이용하여 제1전위우물층(52) 및 제2전위우물층(54)을 선택적으로 이온주입한 후 열처리 공정을 통하여 깊게 형성한다. 그리고 상기 제1 및 제2전위우물층(52),(54)에는 광다이오드인 화소와 화소 사이를 분리하기 위한 고농도의 P형 채널스톱영역(56)이 형성되고, 상기 제2전위우물층(54)에는 전송채널인 n형 BCCD (Buried channel CCD)(58)가 형성되어 있다. 또한 상기 제1전위우물층(52)에는 광다이오드(60)가 형성되어 있다.As shown in FIG. 2A, the first potential well layer 52 and the second potential well layer 54 are formed by using P-type impurity ions with boron on the surface of the N-type silicon semiconductor substrate 50. After ion implantation is selectively formed deep through the heat treatment process. The first and second potential well layers 52 and 54 are provided with a high concentration P-type channel stop region 56 for separating between the pixel as a photodiode and the second potential well layer. 54, n-type BCCD (Buried channel CCD) 58, which is a transmission channel, is formed. In addition, a photodiode 60 is formed in the first potential well layer 52.
이와같이 구성된 화소구조의 상부에 BPSG(Boro-Phospho Silicate Glass) 또는 PSG(Phospho Silicate Glass)등의 유리재질 절연물을 형성한 후 통상의 사진식각 공정에 의해 광다이오드 상부에 두꺼운 보호막(100)을 형성한 후 상기 보호막(100)과 화소구조의 상부에 열산화 및 물리중착 및 화학기상 중착등의 방법으로 얇은 산화층인 게이트산화막(62) 및 N형의 불순물이 도우핑된 다결정 실리콘층(64)을 순차적으로 형성한다.After forming a glass material insulator such as BPSG (Boro-Phospho Silicate Glass) or PSG (Phospho Silicate Glass) on top of the pixel structure constructed as described above, a thick protective film 100 is formed on the photodiode by a conventional photolithography process. Then, the gate oxide film 62, which is a thin oxide layer, and the polycrystalline silicon layer 64 doped with N-type impurities are formed on the passivation layer 100 and the pixel structure by thermal oxidation, physical deposition, and chemical vapor deposition. Form sequentially.
이때 상기 보호막(100)은 선택적 산화공정에 의해 형성될 수도 있다. 또, 상기 게이트 산화막(62)은 산화막-절화막(ONO)의 구조로 형성할 수 있다.In this case, the protective film 100 may be formed by a selective oxidation process. The gate oxide layer 62 may have a structure of an oxide-cut film ONO.
제2도의 (b)에 도시한 바와같이, 상기 다결정 실리콘층(64)의 상부에 포토레지스트를 도포한 후 통상의 리소그래피공정에 의해 패턴을 형성한 후 포토레지스트 패턴(66)을 마스크로하여 건식식각 공정으로 다결정 실리콘층(62)을 제거한다.As shown in FIG. 2B, after the photoresist is applied on the polycrystalline silicon layer 64, a pattern is formed by a conventional lithography process, and then dried using the photoresist pattern 66 as a mask. The polycrystalline silicon layer 62 is removed by an etching process.
제2도의 (c)에 도시한 바와같이, 상기 다결정 실리콘층(62)의 포토레지스트 패턴(64)을 제거하여 제1전송전극(68)을 형성한다. 그 다음 상기 전극(68)을 열산화하여 전극(68)의 상부 표면 및 측면부에 제1절연막(70)을 형성한다. 그 다음 물리중착 또는 화학기상 중착등의 방법에 의해 상기 제1절연막(70)과 광다이오드(60) 상부에 형성된 게이트 산화막(62) 상부의 전표면에 N형의 불순물이 도우핑된 다결정 실리콘 (72)을 형성한다.As shown in FIG. 2C, the photoresist pattern 64 of the polycrystalline silicon layer 62 is removed to form the first transfer electrode 68. Thereafter, the electrode 68 is thermally oxidized to form a first insulating layer 70 on the upper surface and side surfaces of the electrode 68. Then, polycrystalline silicon doped with N-type impurities on the entire surface of the gate oxide film 62 formed on the first insulating film 70 and the photodiode 60 by physical deposition or chemical vapor deposition. Form 72.
그후 상기 다결정 실리콘(72)의 상부에 포토레지스트를 도포한 후 통상의 리소그래피공정에 의해 패턴을 형성한 후 포토레지스트 패턴(74)을 마스크로하여 건식식각 공정으로 다결정 실리콘(72)을 제거한다.Thereafter, after the photoresist is applied on the polycrystalline silicon 72, a pattern is formed by a conventional lithography process, and then the polycrystalline silicon 72 is removed by a dry etching process using the photoresist pattern 74 as a mask.
제2도의 (d)에 도시한 바와같이, 상기 다결정 실리콘(72)의 포토레지스트 패턴(74)을 제거하여 제 2전송 전극(78)을 형성한다. 그후 상기 전극(78)을 열산화하여 전극(78)의 상부표면 및 측면부에 제2절연막(80)을 형성한다.As shown in FIG. 2D, the photoresist pattern 74 of the polycrystalline silicon 72 is removed to form the second transfer electrode 78. Thereafter, the electrode 78 is thermally oxidized to form a second insulating layer 80 on the upper surface and side surfaces of the electrode 78.
제2도의 (e)에 도시한 바와같이, 그 다음 물리중착 또는 화학기상 중착 방법에 의해 상기 제2절연막(80)과 광다이오드(60) 상부의 게이트 산화막(62)의 전표면에 알루미늄(Al) 또는 텅스텐(W) 합금을 이용하여 광차폐용 금속층(82)을 형성한다. 그후 상기 금속층(82)의 상부에 포토레지스트를 도포한 후 통상의 리소그래피공정에 의해 패턴을 형성한 후 포토레지스트 패턴(84)을 마스크로 하여 건식식간 공정으로 금속층(82)을 제거한다.As shown in (e) of FIG. 2, aluminum (on the surface of the second insulating film 80 and the gate oxide film 62 on the photodiode 60) is then formed by physical or chemical vapor deposition. Al) or a tungsten (W) alloy is used to form the light shielding metal layer 82. Thereafter, after the photoresist is applied on the metal layer 82, a pattern is formed by a conventional lithography process, and then the metal layer 82 is removed by a dry etching process using the photoresist pattern 84 as a mask.
제2도의 (f)에 도시한 바와같이, 상기 금속층(82)의 포토레지스트 패턴(84)을 제거하여 차광막(86)을 형성한다.As shown in FIG. 2F, the photoresist pattern 84 of the metal layer 82 is removed to form the light shielding film 86.
이상과 같은 이 발명은 광다이오드 상부에 두꺼운 산화막인 보호막을 형성함으로서 식각손상 및 불순물 오염등으로부터 광다이오드를 보호할 수 있다.As described above, the present invention can protect the photodiode from etching damage, impurity contamination, and the like by forming a protective film, which is a thick oxide film on the photodiode.
따라서, 이 발명은 종래 기술에서는 공정 진행 과정에서 발생하는 불순물 오염 및 식각손상 등을 열처리 및 게터링(Gettering)을 통하여 제거하는데 중점을 두었지만, 이러한 식각손상 및 불순물 오염의 발생을 처음부터 억제할 수 있으므로 이에 따른 이미지 센서의 각 특성들을 종래보다 향상시킬 수 있다.Therefore, the present invention focused on removing impurity contamination and etching damage generated during the process through heat treatment and gettering, but it is possible to suppress the occurrence of such etching damage and impurity contamination from the beginning. As a result, the respective characteristics of the image sensor may be improved.
또, 이 발명은 식각손상 및 불순물 오염을 방지할 수 있어 암전류 및 백점등을 최소로 할 수 있다.In addition, the present invention can prevent etching damage and impurity contamination, so that dark current and white light can be minimized.
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| KR1019920006441A KR960001181B1 (en) | 1992-04-17 | 1992-04-17 | Manufacturing method of ccd image pick-up device |
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