KR950703791A - OHMIC CONTACT STRUCTURE BETWEEN PLATINUM AND SILICON CARBIDE - Google Patents

OHMIC CONTACT STRUCTURE BETWEEN PLATINUM AND SILICON CARBIDE Download PDF

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KR950703791A
KR950703791A KR1019950700923A KR19950700923A KR950703791A KR 950703791 A KR950703791 A KR 950703791A KR 1019950700923 A KR1019950700923 A KR 1019950700923A KR 19950700923 A KR19950700923 A KR 19950700923A KR 950703791 A KR950703791 A KR 950703791A
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layer
silicon carbide
platinum
doped
ohmic contact
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KR100244078B1 (en
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씨. 그라스 로버트
더블유. 팔머 존
에프. 데이비스 로버트
스펠만 포터 리사
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에프. 니일 헌터
크리 리서치 인코포레이티드
찰스 지이. 모리랜드
노스 캘롤라이나 스테이트 유니버시티
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Priority claimed from PCT/US1993/008516 external-priority patent/WO1994006153A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1608—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/0445—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising crystalline silicon carbide
    • H01L21/048—Making electrodes
    • H01L21/0485—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/148—Silicon carbide

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
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  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

백금과 같은 높은 일함수 금속과 탄화규소와 같은 넓은 밴드갭 반도체 사이의 최종 옴 접촉구조와 이를 형성하는 방법이 개시되며, 여기서 금속의 일함수는 금속과 반도체 사이에 옴접촉을 형성하는데 보통 불충분이다. 이 구조는 옴 특성을 유지한채 어닐링을 견딜 수 있다. 옴 접촉구조는 단결정의 넓은 밴드갭 반도체 재료부, 반도체 재료부상에 높은 일함수 금속으로 형성된 접촉, 및 단결정부와 금속접촉 사이의 도핑된 P형 반도체 재료층으로 구성된다. 도핑된 층은 금속과 반도체 재료 사이에 옴작용을 제공하기 위해서 P형 도펀드의 충분한 농도를 가진다.A final ohmic contact structure between a high work function metal such as platinum and a wide bandgap semiconductor such as silicon carbide and a method of forming the same are disclosed, wherein the work function of the metal is usually insufficient to form an ohmic contact between the metal and the semiconductor. . This structure can withstand annealing while maintaining ohmic properties. The ohmic contact structure is composed of a wide bandgap semiconductor material portion of a single crystal, a contact formed of a high work function metal on the semiconductor material portion, and a doped P-type semiconductor material layer between the single crystal portion and the metal contact. The doped layer has a sufficient concentration of P-type dopant to provide ohmic action between the metal and the semiconductor material.

Description

백금과 탄화규소 사이의 옴접촉구조(OHMIC CONTACT STRUCTURE BETWEEN PLATINUM AND SILICON CARBIDE)OHMIC CONTACT STRUCTURE BETWEEN PLATINUM AND SILICON CARBIDE

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따르는 옴접촉구조의 개요 단면도.1 is a schematic cross-sectional view of an ohmic contact structure according to the present invention.

제5도는 본 발명에 따르는 옴접촉구조의 전류-전압 도표.5 is a current-voltage diagram of an ohmic contact structure according to the present invention.

Claims (20)

옴 특성을 유지한채 어니링에 견딜 수 있은며, 단결정 탄화규소부와 상기 탄화규소상의 백금접촉으로 구성되는 백극과 탄화규소 사이의 옴접촉구조에 있어서, 상기 단결정부와 상기 백금접촉 사이에 도핑된 P형 탄화규소층은 상기 탄화규소부와 상기 백금접촉 사이에 옴 작용을 제공하기 위해서 P형 도펀트의 충분한 농도를 가지는 것을 특징으로 하는 옴접촉.It is able to withstand annealing while maintaining ohmic characteristics, and in an ohmic contact structure between a single electrode and a silicon carbide, which is composed of a single crystal silicon carbide portion and a platinum contact on the silicon carbide, doped between the single crystal portion and the platinum contact. And the P-type silicon carbide layer has a sufficient concentration of P-type dopant to provide an ohmic action between the silicon carbide portion and the platinum contact. 제1항에 있어서, 상기 도핑된 층은 인터페이스를 통해 캐리어 터널링 전송이 가능하도록 상기 백금 접촉과 상기 탄화규소부 사이의 인터페이스에서 공핍영역의 폭을 충분히 감소시키기 위해 P형 도펀트의 충분한 농도를 가지는 것을 특징으로 하는 옴접촉.2. The method of claim 1, wherein the doped layer has a sufficient concentration of P-type dopant to sufficiently reduce the width of the depletion region at the interface between the platinum contact and the silicon carbide portion to enable carrier tunneling transmission through the interface. Ohm contact characterized. 제1항에 있어서, 상기 도핑된 층은 상기 단결정부에 이온 주입된 영역으로 구성되는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1, wherein the doped layer comprises an ion implanted region. 제1항에 있어서, 상기 도핑된 층은 에피택셜층으로 구성되며, 탄화규소의 상기 단결정부는 에피백셜층으로 구성되는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1, wherein the doped layer is formed of an epitaxial layer, and the single crystal part of silicon carbide is formed of an epitaxial layer. 제1항에 있어서, 상기 도핑된 P형 층은 알루미늄 또는 붕소로 도핑되는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1 wherein the doped P-type layer is doped with aluminum or boron. 제1항에 있어서, 상기 도핑된 P형 층은 1017㎝-3이상의 캐리어 농도를 가지는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1 wherein the doped P-type layer has a carrier concentration of at least 10 17 cm −3 . 제1항에 있어서, 상기 도핑된 P형 층은 5×1018㎝-3이상의 캐리어 농도를 가지는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1 wherein the doped P-type layer has a carrier concentration of at least 5 × 10 18 cm −3 . 제1항에 있어서, 상기 도핑된 P형 층은 1019㎝-3이상의 캐리어 농도를 가지는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1 wherein the doped P-type layer has a carrier concentration of at least 10 19 cm −3 . 제1항에 있어서, 상기 도핑된 P형 층은 상기 백금 접촉 사이의 규화백금조성물로 더 구성되는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1 wherein the doped P-type layer is further comprised of a platinum silicide composition between the platinum contacts. 제1항에 있어서, 상기 도핑된 P형 층은 약 100Å의 두께를 가지는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1 wherein the doped P-type layer has a thickness of about 100 μs. 제1항에 있어서, 상기 탄화규소는 3C, 2H, 4H, 6H, 7H 및 15R 폴리타입으로 구성된 그룹으로부터 선택되는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 1 wherein the silicon carbide is selected from the group consisting of 3C, 2H, 4H, 6H, 7H and 15R polytypes. 단결정 탄화규소부상에 도핑된 P형 탄화규소층을 형성하는 단계와 옴접촉을 탄화규소에 제공하기 위해서 도핑된 층상에 백금층을 피착하는 단계로 구성되며, 어닐링에 견딜수 있는 옴접촉을 제공하기 위해서 탄화규소와 백금 사이에 옴접촉을 형성하는 방법에 있어서, 도핑된 층을 형성하는 단계는 탄화규소와 백금 사이에 옴 작용을 제공하기 위해서 P형 도펀트의 충분한 농도를 가지는 도핑된 층을 형성하는 단계로 구성되는 것을 특징으로 하는 옴접촉.Forming a doped P-type silicon carbide layer on the single crystal silicon carbide portion and depositing a platinum layer on the doped layer to provide ohmic contact to the silicon carbide, to provide an ohmic contact that can withstand annealing. In a method of forming ohmic contact between silicon carbide and platinum, the step of forming a doped layer comprises forming a doped layer having a sufficient concentration of P-type dopant to provide an ohmic action between silicon carbide and platinum. Ohm contact, characterized in that consisting of. 제12항에 있어서, 도핑된 탄화규소층을 형성하는 단계는 백금을 피착하는 단계를 선행하는 것을 특징으로 하는 옴접촉.13. The ohmic contact of claim 12 wherein forming a doped silicon carbide layer precedes depositing platinum. 제12항에 있어서, 도핑된 탄화규소층을 형성하는 단계는 백금을 피착하는 단계를 선행하는 것을 특징으로 하는 옴접촉.13. The ohmic contact of claim 12 wherein forming a doped silicon carbide layer precedes depositing platinum. 제12항에 있어서, 도핑된 탄화규소층을 형성하는 단계는 5kV 또는 그 보다 높은 에너지, 4×1013㎝-2또는 그보다 높은 도핑량, 및 400℃ 또는 그 보다 높게 유지된 탄화규소로 이온주입하는 단계로 구성되는 것을 특징으로 하는 옴접촉.13. The method of claim 12, wherein forming the doped silicon carbide layer is ion implanted with silicon carbide maintained at 5 kV or higher, 4 x 10 13 cm -2 or higher, and 400 [deg.] C. or higher. Ohmic contact, characterized in that consisting of steps. 제15항에 있어서, 백금층을 피착하는 단계에 앞서는 이온주입된 층을 어닐링하는 단계로 더 구성되는 것을 특징으로 하는 옴접촉.16. The ohmic contact of claim 15 further comprising annealing the ion implanted layer prior to depositing the platinum layer. 제15항에 있어서, 백금층을 피착하는 단계에 후속하는 옴조접촉구조를 어닐링하는 단계로 더 구성되는 것을 특징으로 하는 옴접촉.16. The ohmic contact of claim 15 further comprising annealing an ohmzo contact structure subsequent to depositing a platinum layer. 제12항에 있어서, 도핑된 탄화규소층을 형성하는 단계는 인터페이스층을 통해 캐리어 터널링 전송이 가능하도록 백금접촉과 탄화규소부 사이의 인터페이스에 공핍영역의 폭을 충분히 감소시키기 위해서 P형 도펀트의 충분한 농도로 도핑된 층을 형성하는 단계로 구성되는 것을 특징으로 하는 옴접촉.13. The method of claim 12, wherein forming a doped silicon carbide layer comprises a sufficient amount of P-type dopant to sufficiently reduce the width of the depletion region at the interface between the platinum contact and the silicon carbide portion to enable carrier tunneling transmission through the interface layer. And forming a doped layer in concentration. 제12항에 있어서, 백금층을 피착하는 단계는 규화백금을 형성하기 위해서 백금을 어닐링하는 단계로 더 구성되는 것을 특징으로 하는 옴접촉.13. The ohmic contact of claim 12 wherein depositing the platinum layer further comprises annealing the platinum to form platinum silicide. 제12항에 있어서, 백금층을 피착하는 단계는 규화백층을 피착하는 단계로 구성되는 것을 특징으로 하는 옴접촉.The ohmic contact of claim 12, wherein depositing the platinum layer comprises depositing the platinum silicide layer. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950700923A 1992-09-10 1993-09-10 Ohm contact structure between platinum and silicon carbide KR100244078B1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP943043 1992-09-10
JP94304392 1992-09-10
PCT/US1993/008516 WO1994006153A1 (en) 1992-09-10 1993-09-10 Ohmic contact structure between platinum and silicon carbide
US943043 2001-08-29

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