KR950030245A - Misalignment measurement method between gate and contact formed on gate - Google Patents

Misalignment measurement method between gate and contact formed on gate Download PDF

Info

Publication number
KR950030245A
KR950030245A KR1019940008040A KR19940008040A KR950030245A KR 950030245 A KR950030245 A KR 950030245A KR 1019940008040 A KR1019940008040 A KR 1019940008040A KR 19940008040 A KR19940008040 A KR 19940008040A KR 950030245 A KR950030245 A KR 950030245A
Authority
KR
South Korea
Prior art keywords
gate
contact
field oxide
contact formed
misalignment
Prior art date
Application number
KR1019940008040A
Other languages
Korean (ko)
Inventor
이창혁
Original Assignee
김주용
현대전자산업 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김주용, 현대전자산업 주식회사 filed Critical 김주용
Priority to KR1019940008040A priority Critical patent/KR950030245A/en
Publication of KR950030245A publication Critical patent/KR950030245A/en

Links

Landscapes

  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

본 발명은 트랜지스터를 사용하는 반도체 집적회로 제조시 게이트와 게이트 상에 형성되는 콘택간의 오정렬 측정방법에 관한 것으로, 콘택이 게이트에서 벗어났을 경우 콘택식각시 식각되는 필드산화막 부분의 두께를 줄여 전도막(4)과 기판(1)간의 전도성을 측정할 수 있게 하기 위해 필드산화막(2)의 버즈빅 형상 부분을 게이트(3)의 가장자리에 배치함으로써 게이트와 게이트 상에 형성되는 콘택의 오정렬에 의한 불량을 정확히 감지할 수 있어 반도체 설계 및 불량분석시 유용하게 적용된다.The present invention relates to a method for measuring misalignment between a gate and a contact formed on a gate when fabricating a semiconductor integrated circuit using a transistor. When the contact is out of the gate, the present invention reduces the thickness of a portion of the field oxide layer that is etched during contact etching. 4) the defects due to misalignment of the contacts formed on the gate and the gate are disposed by arranging the burjbig-shaped portion of the field oxide film 2 at the edge of the gate 3 so that the conductivity between the substrate 1 and the substrate 1 can be measured. It can be accurately detected, which is useful for semiconductor design and defect analysis.

Description

게이트와 게이트 상에 형성되는 콘택간의 오정렬 측정방법Misalignment measurement method between gate and contact formed on gate

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 게이트와 게이트 상에 형성되는 콘택간의 오정렬 측정방법을 나타내는 단면도.2 is a cross-sectional view showing a method for measuring misalignment between a gate and a contact formed on the gate according to the present invention.

Claims (1)

트랜지스터를 사용하는 반도체 집적회로 제조시 게이트와 게이트 상에 형성되는 콘택간의 오정렬 측정방법에 있어서, 상기 콘택이 게이트에서 벗어났을 경우 콘택식각시 식각되는 필드 산화막 부분의 두께를 줄여 전도막(4)과 기판(1) 간의 전도성을 측정할 수 있게 하기 위해 필드산화막(2)의 버즈빅 형상 부분을 게이트(3)의 가장자리에 배치하는 것을 특징으로 하는 게이트와 게이트 상에 형성되는 콘택간의 오정렬 측정방법.A method for measuring misalignment between a gate and a contact formed on a gate when fabricating a semiconductor integrated circuit using a transistor, wherein the thickness of a portion of the field oxide layer that is etched when the contact is etched when the contact deviates from the gate is reduced. A method of measuring misalignment between a gate and a contact formed on a gate, characterized in that a burjbig-shaped portion of the field oxide film (2) is arranged at the edge of the gate (3) in order to be able to measure the conductivity between the substrate (1). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임※ Note: The disclosure is based on the initial application.
KR1019940008040A 1994-04-16 1994-04-16 Misalignment measurement method between gate and contact formed on gate KR950030245A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019940008040A KR950030245A (en) 1994-04-16 1994-04-16 Misalignment measurement method between gate and contact formed on gate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019940008040A KR950030245A (en) 1994-04-16 1994-04-16 Misalignment measurement method between gate and contact formed on gate

Publications (1)

Publication Number Publication Date
KR950030245A true KR950030245A (en) 1995-11-24

Family

ID=66677580

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019940008040A KR950030245A (en) 1994-04-16 1994-04-16 Misalignment measurement method between gate and contact formed on gate

Country Status (1)

Country Link
KR (1) KR950030245A (en)

Similar Documents

Publication Publication Date Title
US6368980B1 (en) Resist mark having measurement marks for measuring the accuracy of overlay of a photomask disposed on semiconductor wafer and method for manufacturing semiconductor wafer having it
KR880014651A (en) Test method of gate oxide on semiconductor
US6150669A (en) Combination test structures for in-situ measurements during fabrication of semiconductor devices
KR950030245A (en) Misalignment measurement method between gate and contact formed on gate
US20080100311A1 (en) Electrical Measurement Of The Thickness Of A Semiconductor Layer
JP2002141474A (en) Planar semiconductor chip, testing method therefor and semiconductor wafer
JPS5953702B2 (en) How to measure the specifications of field effect transistors
JPH0586858B2 (en)
JP2007134499A (en) Short-circuit gate position detection method for mos semiconductor element
US6677608B2 (en) Semiconductor device for detecting gate defects
KR100293711B1 (en) Semiconductor device having MOSFET pattern for testing characteristics of MOSFET comprising fine gate line
KR970053219A (en) Semiconductor device for surface property inspection and manufacturing method thereof
KR970077430A (en) Evaluation method of semiconductor device
KR0179172B1 (en) Test method using test pattern
KR100265841B1 (en) Semiconductor element manufacturing process monitoring method
JPS61139701A (en) Pattern dimension measuring circuit
JPS6242378B2 (en)
KR200202589Y1 (en) Thermocouple within the bonded silicon wafers
JPH033943B2 (en)
KR100252761B1 (en) Gate line width measuring method
KR100204536B1 (en) Test method of fine pattern
KR970017940A (en) Mask alignment measurement method of semiconductor device
KR19980065656A (en) Overlay keys unaffected by membrane quality asymmetry
JPH06302767A (en) Test pattern
KR950004491A (en) Semiconductor device having element isolation region and method of manufacturing the same

Legal Events

Date Code Title Description
WITN Withdrawal due to no request for examination