KR950022978A - Packet data multiplexing method and apparatus - Google Patents
Packet data multiplexing method and apparatus Download PDFInfo
- Publication number
- KR950022978A KR950022978A KR1019930029494A KR930029494A KR950022978A KR 950022978 A KR950022978 A KR 950022978A KR 1019930029494 A KR1019930029494 A KR 1019930029494A KR 930029494 A KR930029494 A KR 930029494A KR 950022978 A KR950022978 A KR 950022978A
- Authority
- KR
- South Korea
- Prior art keywords
- packet
- data
- start code
- packet data
- storage means
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/12—Systems in which the television signal is transmitted via one channel or a plurality of parallel channels, the bandwidth of each channel being less than the bandwidth of the television signal
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
- Time-Division Multiplex Systems (AREA)
Abstract
본 발명은 데이타 병렬처리에서 다수의 채널을 통해 전송되는 데이타들을 다중화하는 장치 및 그 방법에 관한 것으로서, 특히 패킷의 시작을 알리는 코드와 데이타로 구성된 가변적길이를 갖는 패킷들을 여러채널을 통해 전송받아서 패킷들을 본래의 조합순서에 맞게 조합하여 하나의 채널로 전송하기 위한 다중화장치 및 그 방법에 관한 것이다.The present invention relates to an apparatus and a method for multiplexing data transmitted through a plurality of channels in data parallel processing. In particular, a packet having a variable length consisting of a code and data indicating a start of a packet is transmitted through multiple channels. The present invention relates to a multiplexing device and a method for combining the same according to the original combination order to transmit a single channel.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 따른 다중화장치의 일 실시예를 나타낸 블럭도,2 is a block diagram showing an embodiment of a multiplexing device according to the present invention;
제3도는 제2도의 검출기에 대한 상세회로도,3 is a detailed circuit diagram of the detector of FIG.
제4도는 제2도의 컨트롤러에 대한 상세회로도.4 is a detailed circuit diagram of the controller of FIG.
Claims (4)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930029494A KR0148143B1 (en) | 1993-12-24 | 1993-12-24 | The multiple method and apparatus of packet data |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930029494A KR0148143B1 (en) | 1993-12-24 | 1993-12-24 | The multiple method and apparatus of packet data |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950022978A true KR950022978A (en) | 1995-07-28 |
KR0148143B1 KR0148143B1 (en) | 1998-09-15 |
Family
ID=19372525
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930029494A KR0148143B1 (en) | 1993-12-24 | 1993-12-24 | The multiple method and apparatus of packet data |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR0148143B1 (en) |
-
1993
- 1993-12-24 KR KR1019930029494A patent/KR0148143B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR0148143B1 (en) | 1998-09-15 |
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