KR950022095A - Transmit Modulation Circuit - Google Patents

Transmit Modulation Circuit Download PDF

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Publication number
KR950022095A
KR950022095A KR1019930027473A KR930027473A KR950022095A KR 950022095 A KR950022095 A KR 950022095A KR 1019930027473 A KR1019930027473 A KR 1019930027473A KR 930027473 A KR930027473 A KR 930027473A KR 950022095 A KR950022095 A KR 950022095A
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South Korea
Prior art keywords
signal
output
clock
synchronization
outputting
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KR1019930027473A
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Korean (ko)
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KR100281699B1 (en
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김정필
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안치한
금성정밀 주식회사
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Publication of KR950022095A publication Critical patent/KR950022095A/en
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Abstract

본 발명은 디지탈 기술을 응용하여 탐지 물표의 위치에 관계없이 일원화된 경로의 안정된 변조신호를 출력할 수 있는 송신변조회로에 관한 것이다.The present invention relates to a transmission modulation circuit capable of outputting a stable modulated signal of a unified path regardless of the position of the detection target by applying digital technology.

이 송신변호회로는 발진출력을 입력하여 클럭신호를 발생하는 클럭발생부와, 클럭발생부의 클럭신호에 동기하여 근거리 또는 원거리에 따른 위상과 진폭 및 펄스폭의 변조신호정보를 출력하는 제어부와, 제어부에서 출력되는 변조신호정보를 입력하여 위상을 적분하고 적분된 위상에 대한 사인값을 클럭발생부의 클럭신호에 동기하여 출력하는 신호변조부와, 클럭발생부의 클럭신호에 동기하여 신호변조부의 출력신호를 아날로그신호로 변환하여 출력하는 디지탈/아날로그 변환부를 구비함을 특징으로 한다.The transmitting and output circuit includes a clock generator for generating a clock signal by inputting an oscillation output, a controller for outputting modulation signal information of phase, amplitude and pulse width according to a near or far distance in synchronization with the clock signal of the clock generator; A signal modulator for inputting the modulated signal information output from the signal and integrating the phase and outputting a sine value for the integrated phase in synchronization with the clock signal of the clock generator, and outputting the output signal of the signal modulator in synchronization with the clock signal of the clock generator. And a digital / analog converter for converting and outputting an analog signal.

Description

송신변조회로Transmit Modulation Circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 따른 송신변조회로도.2 is a transmission modulation circuit diagram according to the present invention.

Claims (8)

발진출력을 입력하여 클럭신호를 발생하는 클럭발생수단과, 상기 클럭발생수단의 클럭신호에 동기하여 근거리 또는 원거리에 따른 위상가 진폭 및 펄스폭의 변조신호정보를 출력하는 제어수단과, 상기 제어수단에서 출력되는 변조신호정보를 입력하여 위상을 적분하고 적분된 위상에 대한 사인값을 상기 클럭발생수단의 클럭신호에 동기하여 출력하는 신호변조수단과, 상기 클럭발생수단의 클럭신호에 동기하여 상기 신호변조수단의 출력신호를 아날로그신호로 변환하여 출력하는 디지탈/아날로그변환수단을 구비함을 특징으로 하는 송신변조회로.A clock generating means for inputting an oscillation output to generate a clock signal, control means for outputting modulation signal information of amplitude and pulse width in phase along a short distance or a distance in synchronization with the clock signal of the clock generating means, and in the control means A signal modulating means for inputting the output modulation signal information to integrate the phase and outputting a sine value for the integrated phase in synchronization with the clock signal of the clock generating means, and the signal modulating in synchronization with the clock signal of the clock generating means. And a digital / analog conversion means for converting an output signal of the means into an analog signal and outputting the analog signal. 제1항에 있어서; 상기 신호변조수단은, 상기 클럭발생수단의 클럭신호에 동기하여 상기 제어수단에서 출력하는 위상을 적분하는 페이즈 어큐뮬레이터와, 상기 클럭발생수단의 클럭신호에 동기하여 상기 적분된 위상에 대한 저장된 사인값과 출력하는 메모리수단을 포함함을 특징으로 하는 송신변조회로.The method of claim 1; The signal modulating means includes: a phase accumulator for integrating a phase output from the control means in synchronization with a clock signal of the clock generating means, a stored sine value for the integrated phase in synchronization with a clock signal of the clock generating means; And a memory means for outputting. 제2항에 있어서; 상기 신호변조수단은 상기 클럭발생수단의, 글럭신호에 동기하여 상기 제어수단에 출력하는 펄스폭정보에 따라 상기 메모리수단의 출력을 스위칭하는 스위칭수단을 더 포함함을 특징을 하는 송신변조회로.The method of claim 2; And said signal modulating means further comprises switching means for switching the output of said memory means in accordance with pulse width information output to said control means in synchronization with a clock signal of said clock generating means. 제3항에 있어서, 상기 스위칭수단으로 멀티플라이어를 사용함을 특징으로 하는 송신변조회로.4. The transmission modulator circuit according to claim 3, wherein a multiplier is used as the switching means. 제3항에 있어서; 상기 디지탈/아날로그변환수단의 출력신호를 필터링하는 필터링수단을 더 포함함을 특징으로 하는 송신변조회로.The method of claim 3; And a filtering means for filtering the output signal of the digital / analog conversion means. 제5항에 있어서; 상기 필터링수단은, 저역통과필터를 사용함을 특징으로 하는 송신변조회로.The method of claim 5; And said filtering means uses a low pass filter. 제5항에 있어서; 상기 필터링수단의 출력에서 주파수를 소정치 높이기 위한 주파수 변환수단을 더 포함함을 특징으로 하는 송신변조회로.The method of claim 5; And a frequency converting means for increasing a frequency at an output of said filtering means. 제7항에 있어서; 상기 주파수 변환수단의 출력을 송신하기에 적절한 크기로 증폭하는 증폭수단을 더 포함함을 특징으로 하는 송신변조회로.The method of claim 7; And amplifying means for amplifying the output of said frequency converting means to an appropriate magnitude for transmission. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930027473A 1993-12-13 1993-12-13 Transmit Modulation Circuit KR100281699B1 (en)

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Application Number Priority Date Filing Date Title
KR1019930027473A KR100281699B1 (en) 1993-12-13 1993-12-13 Transmit Modulation Circuit

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Application Number Priority Date Filing Date Title
KR1019930027473A KR100281699B1 (en) 1993-12-13 1993-12-13 Transmit Modulation Circuit

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KR950022095A true KR950022095A (en) 1995-07-26
KR100281699B1 KR100281699B1 (en) 2001-02-15

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