KR950021735A - High speed switching semiconductor device and manufacturing method thereof - Google Patents
High speed switching semiconductor device and manufacturing method thereof Download PDFInfo
- Publication number
- KR950021735A KR950021735A KR1019930030729A KR930030729A KR950021735A KR 950021735 A KR950021735 A KR 950021735A KR 1019930030729 A KR1019930030729 A KR 1019930030729A KR 930030729 A KR930030729 A KR 930030729A KR 950021735 A KR950021735 A KR 950021735A
- Authority
- KR
- South Korea
- Prior art keywords
- region
- base
- low concentration
- emitter
- semiconductor device
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 12
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 5
- 238000000034 method Methods 0.000 claims description 4
- 239000012535 impurity Substances 0.000 claims 4
- 239000000758 substrate Substances 0.000 claims 4
- 238000009792 diffusion process Methods 0.000 claims 2
- 238000000059 patterning Methods 0.000 claims 2
- 230000004888 barrier function Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Bipolar Transistors (AREA)
Abstract
이 발명은 고속 스위칭 반도체장치 및 그 제조방법에 관한 것으로, 새로운 마스크 패턴을 이용하여 베이스 영역과 베이스 저농도 영역을 형성하고 베이스 전극을 상기 양 영역에 동시에 접촉하도록 함으로써, 베이스에 축적된 소수 캐리어가 전위장벽이 낮은 저농도 영역으로 쉽게 이동하여 베이스 전극에서 용이하게 결합할 수 있게되므로 스위칭 속도가 향상되면서도 누설전류가 증가하지 않고 칩의 크기도 커지지 않는 효과를 제공한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high speed switching semiconductor device and a method of manufacturing the same, wherein a minority carrier accumulated in a base is formed by forming a base region and a base low concentration region using a new mask pattern and simultaneously bringing the base electrode into contact with both regions. The barrier can be easily moved to a low concentration region and can be easily coupled at the base electrode, thereby improving switching speed, but not increasing leakage current and increasing chip size.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명에 따른 반도체장치의 수직구조도.2 is a vertical structure diagram of a semiconductor device according to the present invention.
제3(A)내지 (D)는 본 발명의 실시예에 따른 반도체장치의 제조방법을 공정순서에 따라 도시한 단면도.3A to 3D are cross-sectional views showing a method for manufacturing a semiconductor device according to an embodiment of the present invention in a process sequence.
제4도는 본 발명에 따라 형성되는 베이스 저농도 영역을 형성하기 위한 마스크 형태의 일실시예.4 is an embodiment in the form of a mask for forming a base low concentration region formed in accordance with the present invention.
제5도는 본 발명에 따라 형성된 베이스 저농도 영역과 통상적인 베이스 영역의 농도 및 접합길이를 비교 도시한 그래프.5 is a graph comparing the concentration and the junction length of the base low concentration region and the conventional base region formed according to the present invention.
제6도는 종래 기술에 따른 반도체장치의 스위칭 속도와 본 발명에 따른 반도체 장치의 스위칭 속도를 비교하여 시뮬레이션(simulation)한 그래프.6 is a graph comparing the switching speed of the semiconductor device according to the prior art with the switching speed of the semiconductor device according to the present invention.
Claims (9)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930030729A KR970010739B1 (en) | 1993-12-29 | 1993-12-29 | Method for manufacturing a semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930030729A KR970010739B1 (en) | 1993-12-29 | 1993-12-29 | Method for manufacturing a semiconductor device |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950021735A true KR950021735A (en) | 1995-07-26 |
KR970010739B1 KR970010739B1 (en) | 1997-06-30 |
Family
ID=19373712
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930030729A KR970010739B1 (en) | 1993-12-29 | 1993-12-29 | Method for manufacturing a semiconductor device |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970010739B1 (en) |
-
1993
- 1993-12-29 KR KR1019930030729A patent/KR970010739B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR970010739B1 (en) | 1997-06-30 |
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