KR950020132A - I / O processor memory partitioning method - Google Patents
I / O processor memory partitioning method Download PDFInfo
- Publication number
- KR950020132A KR950020132A KR1019930031635A KR930031635A KR950020132A KR 950020132 A KR950020132 A KR 950020132A KR 1019930031635 A KR1019930031635 A KR 1019930031635A KR 930031635 A KR930031635 A KR 930031635A KR 950020132 A KR950020132 A KR 950020132A
- Authority
- KR
- South Korea
- Prior art keywords
- memory
- area
- input
- size
- output
- Prior art date
Links
- 238000000034 method Methods 0.000 title claims abstract description 12
- 238000000638 solvent extraction Methods 0.000 title claims abstract description 8
- 238000010586 diagram Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Data Exchanges In Wide-Area Networks (AREA)
Abstract
본 발명은 타이컴 시스템의 입출력 처리기 메모리를 효과적으로 분할 사용하는 방법에 관한 것이다. 종래의 입출력 처리기 메모리 분할 방법은 고정적으로 메모리를 7MB와 1MB로 나누어 사용하기 때문에 사용되는 통신망의 보드가 없으면 1MB의 메모리를 낭비하게 되며 사용하는 통신망의 보드가 많으면 1MB의 메모리로는 부족하기 때문에 시스템에 사용하는 통신망의 보드를 1MB가 허용하는 범위까지로 제한해야 하는 문제점이 있었다. 따라서, 본 발명에 의한 입출력 처리기 메모리 분할 방법은 블럭 입출력 장치용 메모리의 영역과 문자 일출력 장치용 메모리의 영역을 초기화하는 제1단계와 시스템에서 사용되는 근거리 통신망 보드가 사용하는 메모리의 크기를 검출하는 제2단계와, 시스템에서 사용되는 원거리 통신망 보드가 사용하는 메모리의 크기를 검출하는 제3단계와, 상기 블럭 입출력 장치용 메모리의 영역과 상기 문자 입출력 장치용 메모리의 영역을 통신망 보드에서 사용하는 메모리의 크기에 따라 새롭게 분리하는 제4단계를 포함하여 통신망 보드의 갯수에 관계없이 가장 효율적으로 메모리를 운용할 수 있는 효과가 있다.The present invention relates to a method of effectively partitioning and using an input / output processor memory of a tycom system. In conventional input / output processor memory partitioning method, the memory is fixedly divided into 7MB and 1MB, so if there is no board of the communication network used, 1MB of memory is wasted, and if there are many boards of the communication network, 1MB of memory is insufficient. There was a problem in that the board of the network used in the system should be limited to the range allowed by 1MB. Accordingly, the input / output processor memory partitioning method according to the present invention detects the size of the memory used by the local area network board used in the system and the first step of initializing the area of the memory for the block I / O device and the area of the memory for the character output device. And a third step of detecting the size of the memory used by the telecommunication network board used in the system; and using the area of the memory for the block I / O device and the area of the memory for the character I / O device in the network board. Including the fourth step of newly separating according to the size of the memory, the memory can be operated most efficiently regardless of the number of network boards.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 1 도는 종래 입출력 처리기 메모리 분할도.1 is a conventional input / output processor memory partition diagram.
제 2 도는 본 발명에 의한 입출력 처리기 메모리 분할 방법의 순서도이다.2 is a flowchart of the input / output processor memory partitioning method according to the present invention.
Claims (5)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930031635A KR960005107B1 (en) | 1993-12-30 | 1993-12-30 | I / O Processor Memory Partitioning Method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930031635A KR960005107B1 (en) | 1993-12-30 | 1993-12-30 | I / O Processor Memory Partitioning Method |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950020132A true KR950020132A (en) | 1995-07-24 |
KR960005107B1 KR960005107B1 (en) | 1996-04-20 |
Family
ID=19374570
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930031635A KR960005107B1 (en) | 1993-12-30 | 1993-12-30 | I / O Processor Memory Partitioning Method |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR960005107B1 (en) |
-
1993
- 1993-12-30 KR KR1019930031635A patent/KR960005107B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR960005107B1 (en) | 1996-04-20 |
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