KR950013043A - Logic circuit with error detection, redundant resource management method and fault tolerant system - Google Patents
Logic circuit with error detection, redundant resource management method and fault tolerant system Download PDFInfo
- Publication number
- KR950013043A KR950013043A KR1019940026329A KR19940026329A KR950013043A KR 950013043 A KR950013043 A KR 950013043A KR 1019940026329 A KR1019940026329 A KR 1019940026329A KR 19940026329 A KR19940026329 A KR 19940026329A KR 950013043 A KR950013043 A KR 950013043A
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- South Korea
- Prior art keywords
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- computer
- computer module
- executed
- output signal
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0763—Error or fault detection not based on redundancy by bit configuration check, e.g. of formats or tags
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B9/00—Safety arrangements
- G05B9/02—Safety arrangements electric
- G05B9/03—Safety arrangements electric with multiple-channel loop, i.e. redundant control systems
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/008—Reliability or availability analysis
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0796—Safety measures, i.e. ensuring safe condition in the event of error, e.g. for controlling element
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
- G06F11/085—Error detection or correction by redundancy in data representation, e.g. by using checking codes using codes with inherent redundancy, e.g. n-out-of-m codes
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/1695—Error detection or correction of the data by redundancy in hardware which are operating with time diversity
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/18—Error detection or correction of the data by redundancy in hardware using passive fault-masking of the redundant circuits
- G06F11/187—Voting techniques
- G06F11/188—Voting techniques where exact match is not required
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2023—Failover techniques
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2035—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant without idle spare hardware
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
- G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
- G06F11/2215—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test error correction or detection circuits
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- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Computer Hardware Design (AREA)
- Hardware Redundancy (AREA)
Abstract
본 발명은 셀프체크회로 및 그 구성방법에 관한 것으로 특히 고신뢰시스템구성에 적합한 셀프체크비교회로에 관한 것이다. 본 발명에서는, 복수의 신호를 출력하는 기능블록을 적어도 2중화 구성으로 하고, 이들 기능블록출력을 비교하는 비교회로를 구비하고, 비교결과에 기초하여 오류를 검출하는 오류검출기능를 가진 논리회로에 있어서, 한쪽 기능블록의 출력신호에 대하여, 미리 각 출력신호마다 할당된 고유의 파형, 즉 직교파형생성회로에서 생성되는 직교파형을 중첩하는 합성부를 설치하고, 이 합성부에서의 출력과 상기 다른쪽의 기능블록으로부터의 출력을 비교하고, 이들 양출력에 각각 고유의 파형이 존재할 경우에 한하여, 상기 양기능블록을 포함한 회로전체가 정상이라고 판정하도록 한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a self-check circuit and a method of constructing the same, and more particularly, to a self-check non-intersection suitable for high reliability system configuration. In the present invention, in a logic circuit having an error detection function for detecting an error based on a comparison result, the function block for outputting a plurality of signals is configured to be at least redundant, and a comparison circuit for comparing these function block outputs is provided. And a synthesizer for superimposing a unique waveform allocated to each output signal in advance, that is, an orthogonal waveform generated by a quadrature waveform generation circuit, with respect to the output signal of one functional block. The outputs from the functional blocks are compared and it is determined that the entire circuit including the two functional blocks is normal as long as there is a unique waveform in each of these outputs.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 본 발명의 기본적인 실시예의 구성도이고,1 is a block diagram of a basic embodiment of the present invention,
제2도는 기능블록에 대응한 실시예의 구성도이며,2 is a configuration diagram of an embodiment corresponding to a functional block,
제15도는 본 발명에 의한 회로레이아웃의 설명도이고,15 is an explanatory diagram of a circuit layout according to the present invention;
제16도는 본 발명에 의한 셀프체킹컴퓨터의 구성도이다.16 is a block diagram of a self-checking computer according to the present invention.
Claims (30)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP93-258013 | 1993-10-15 | ||
JP25801393A JP3279004B2 (en) | 1993-10-15 | 1993-10-15 | Redundant resource management method and distributed fault tolerant computer system using the same |
JP94-027664 | 1994-02-22 | ||
JP02766494A JP3206275B2 (en) | 1994-02-25 | 1994-02-25 | Logic circuit with error detection function and fault tolerant system using the same |
Publications (2)
Publication Number | Publication Date |
---|---|
KR950013043A true KR950013043A (en) | 1995-05-17 |
KR100375691B1 KR100375691B1 (en) | 2003-05-01 |
Family
ID=49515852
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019940026329A KR100375691B1 (en) | 1993-10-15 | 1994-10-14 | Logic circuit with fault detecting function, method for managing redundant resources and fault tolerant system using them |
Country Status (1)
Country | Link |
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KR (1) | KR100375691B1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007140122A1 (en) * | 2006-05-22 | 2007-12-06 | Intel Corporation | Fault detection using redundant vertual machines |
Family Cites Families (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH047645A (en) * | 1990-04-25 | 1992-01-13 | Toyota Central Res & Dev Lab Inc | Fault tolerant computer |
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1994
- 1994-10-14 KR KR1019940026329A patent/KR100375691B1/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007140122A1 (en) * | 2006-05-22 | 2007-12-06 | Intel Corporation | Fault detection using redundant vertual machines |
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Publication number | Publication date |
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KR100375691B1 (en) | 2003-05-01 |
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