KR950011952B1 - Power source device for lcd - Google Patents

Abstract

The apparatus comprises a DC-DC converter for converting an input from an input terminal into a constant level direct current of and then providing it to a main power terminal; a DC-AC converter for converting an input from the input terminal into a constant level of alternating current and then providing it to a main power terminal; a power circuit for a generating power for liquid crystal display according to the input from the input terminal; a liquid crystal display voltage on/off controller for controlling an on/off operation of the power circuit; and a liquid crystal display voltage regulating circuit for generating the voltage for liquid crystal display and a regulating voltage according to a constant power provided from the power circuit.

Description

Power Supply for Liquid Crystal Display

1 is a block diagram of a conventional power supply for a liquid crystal display.

2 is a schematic block diagram of a liquid crystal display power supply apparatus according to the present invention.

3 is an exemplary circuit diagram of FIG.

4 is a diagram showing a relationship between a voltage and a time of a charge capacitor installed at an input terminal upon switching off.

5 is a diagram showing the relationship between the V _1cd voltage as the power supply voltage rises and falls.

* Explanation of symbols for main parts of the drawings

10: DC-DC converter 20: DC-AC converter

30, 30 ': V _1cd on / off control circuit 40, 40': V _1cd control circuit

50: V _1cd power supply circuit 60: V _1cd timing sequential circuit

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device of a device employing liquid crystal as a display, and more particularly to a liquid crystal for controlling an operation time during discharge by a timing sequential between a supply power supply and a power supply terminal of a liquid crystal device in a device using liquid crystal as a display device. It relates to a power supply for a display.

In general, it is essential to use a liquid crystal display as a display device for a notebook, a laptop, and a pen computer, and the power supply applied to such a device is an AC adapter, a DC-DC converter (CCFL). Cold Cathode Flourescent), DC-DC converter (V _1cd : liquid crystal display voltage), and battery microcomputer circuit.

Looking at the configuration of the conventional power supply device of the type described above with reference to FIG.

1 to 10 are DC-DC converters for converting the DC input from the input terminal to a certain level of DC, 20 is a DC-AC converter for converting the DC input from the input terminal to a constant level of AC, 30 is a resistor It is composed of (R ₃ , R ₄ ) and diode (D ₁ ) and two field effect transistors (Q ₁ , Q ₂ ), and it is a liquid crystal display voltage on / off control circuit that determines the on / off of the liquid crystal display. It is composed of (R ₁ , R ₂ ), capacitors (C ₃ , C ₄ , C ₅ ), DC-DC converter, etc., and it is a V _1cd control circuit that controls the voltage of the liquid crystal.

Looking at the operation of the conventional power supply device for a liquid crystal display device as follows.

When the power switch S / W is turned on, DC is input from the outside and applied to the DC-DC converter 10, the DC-AC converter 20, and the V _1cd on / off control circuit 30, in which case The DC-DC converter 10 (+ 5V MAIN) and DC-AC converter 20 (CCFL) portions operate normally. However, V V _1cd output voltage at _1cd control circuit 40, so blocking the field effect transistor (FET Q ₁₎ is turned-off state because the supply of power into the V _1cd output stage itself of the input power is input V _1cd control circuit The state of the output voltage to the V _1cd output terminal through the DC-DC converter in 40 becomes a zero state.

In addition, the logic state of the signal applied to the V _1cd enable terminal of the V _1cd on / off control circuit 30 is low on the main board and is applied to the field effect transistor Q ₂ through the resistor R ₄ . In this case, since the transistor Q ₃ is turned off and the field effect transistor Q ₁ is also turned off, the state of the output voltage becomes zero at the V _1cd output terminal.

On the contrary, when the V _1cd enable signal is applied to the V _1cd on / off control circuit 30 on the main board, the high state is applied to the gate of the field effect transistor Q ₂ through the resistor R ₄ . Is turned on by the V _1cd enable signal and applied to the gate terminal of the field effect transistor Q ₁ connected to the input terminal of the power supply to turn on. Therefore, the input DC power supplied terminal from the V _1cd adjustment is applied to the DC-DC converter in the circuit, and each V _1cd voltage V _1cd control voltage V _1cd control output generating V _1cd control voltage is: size value from the same Has

V _1cd Regulated Voltage = -1.25V (1 + R ₂ / R ₁ )

That is, in the on / off control circuit, when the level of the V _1cd enable signal is high, the V _1cd and V _1cd regulated output voltages appear at the output terminal, and when the V _1cd enable signal is low, the V _1cd and V _1cd regulated voltages are 0. Becomes

In this way the prior art power supply apparatus in accordance with the high or the state of the row of V _1cd enable signal level V _1cd on / off control of the main power line by the turn-on / off state of the field effect transistor (Q ₁₎ within the circuit 30 There is a problem that a lot of power loss occurs because it controls itself.

In addition, even when the power supply is turned off, the V _1cd or V _1cd control voltage is lower than or lower than the + 5V line of the motherboard, so white streaks occur on the liquid crystal used as the display device. It will shorten the life.

In addition, the driving of the liquid crystal has a problem in that the V _1cd output voltage appears when the V _1cd enable signal has a high level even when the +5 main power supply is in an abnormal state.

Accordingly, an object of the present invention is to improve power efficiency by reducing power loss without having a control circuit for the main power line during normal operation.

Another object of the present invention is to improve the operation time when using a battery as a power source by improving the efficiency of the system.

Another object of the present invention is to improve the reliability of the liquid crystal when the power supply is turned off and to remove streaks on the liquid crystal surface generated when the on / off.

Another object of the present invention is to automatically turn off the liquid crystal power when the main power is turned off regardless of the liquid crystal voltage driving signal.

In order to achieve the object according to the present invention as described above, the present invention uses a power supply on / off switch using a DC power input input from the input terminal for the liquid crystal display power supply for generating a voltage for the main power supply and the liquid crystal display A DC-DC converter for converting an input from the input terminal into a predetermined level of direct current and supplying it to a main power supply terminal. The DC-AC converter for converting an input from the input terminal into a predetermined level of alternating current from the input terminal. A power supply circuit for generating a liquid crystal display power supply according to the input of a liquid crystal display voltage on / off control circuit for controlling the on / off operation of the power supply circuit according to the logic state of the liquid crystal display enable signal. Liquid crystal display that generates the voltage and voltage for the liquid crystal display according to a certain power supply Vector characterized in that it comprises a voltage regulating circuit.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a schematic configuration diagram schematically showing the configuration of the present invention.

In Fig. 2, 10 and 20 are the same as the conventional configuration of Fig. 1, 30 'is a V _1cd control circuit, 50 is a V _1cd power supply circuit for forming a V _1cd voltage, and 60 is a timing sequential upon off of the power switch. V _1cd timing sequential circuit for operation.

In the above apparatus, when the power switch SW is turned on to supply power, the DC power is + 5V through the DC-DC converter 10 through the switch SW DC-AC converter 20 of + 5V. the normal operation of the CCFL stage via and V _1cd power circuit 50 V _1cd on / off control circuit 30 'is controlled by the V _1cd the enable signal is V without the V _1cd voltage generation until the high _1cd When the enable signal becomes high, the V _1cd power supply circuit 50 is driven to form a V _1cd voltage and a V _1cd control voltage. This process will be described with reference to the detailed circuit diagram of FIG. 5 as an embodiment of the present invention.

Looking at the detailed configuration of each component prior to the description of the operation between the components in FIG. 5, the V _1cd on / off control circuit 30 'is a two field effect transistor (Q ₇ , Q ₁ ) and a two transistor serving as a switch. (Q ₄ , Q ₅ ) and a plurality of resistors (R ₁ , R ₃ , R ₇ , R ₉ , R ₁₀ , R ₁₁ , R ₁₂ , R ₁₃ ), V _1cd regulating circuit 40 ' (R ₅ , R ₆ , R ₈ ), transistor (Q ₅ ) and capacitor (C ₇ ), V _1cd power supply circuit 50 is a two switching transistor (Q ₂ , Q ₃ ), switching transistor ( resistor connected between the Q ₂₎ gate terminal and the emitter terminal (R _2), a capacitor (C _4), and connected between the base of the coil (L _2), the transistor (Q ₂₎ collector to the transistor (Q ₃₎ of the a diode (D ₁₎ and a Zener diode (D _2), the transistor resistor connected between the collector of the base and the transistor (Q ₃₎ of _{(Q 3) (R 4)} , switching transitional spokes Murray (T ₁₎ and the third capacitor being Consisting of (C ₃ , C ₅ , C ₆ ), and finally The timing sequential circuit 60 includes respective electrolytic capacitors C ₁ and C ₂ connected to both ends of the switch of the power input terminal and a plurality of resistors R ₁₄ , R ₁₅ , R ₁₆ , and R ₁₇ connected to the outside of the capacitors. And R ₁₈ ), operational amplifier Ui and transistor Q ₈ .

In the power supply device configured as described above, the + 5V main power terminal normally operates through the DC-DC converter 10 due to the ON operation of the power switch S / W, but V in the V _1cd control circuit 40 'is applied. _The output voltage of _1cd is low because the logic state of the _V1cd enable signal applied to the gate terminal of the field effect transistor Q1 in the _V1cd on / off circuit 30 'is low, so that the field effect transistor Q7 is turned off. The circuit does not work properly.

However, in contrast, when the logic state of the V _1cd enable signal applied to the V _1cd on / off control circuit 30 ′ on the main board is high, the gate of the field effect transistor Q ₁ is passed through the resistor R ₁₂ . Since the logic state of the V _1cd enable signal applied to the terminal is high, the transistor Q1 is turned on and at the same time, the base of the driving transistor Q ₃ is biased through the resistor R ₁ and the field effect transistor Q ₁ . When the driving transistor Q ₃ is turned on and the driving transistor Q ₃ is turned on, the base-emitter voltage Vbe applied to both the emitter of the switching transistor Q ₂ and the base is formed in the forward direction. The switching transistor Q ₂ is turned on through the coil L ₂ of the switching transformer T ₁ .

At this time, since the voltage is induced in the secondary shaft coil L ₂ by the current flowing through the coil L ₁ , the induced voltage increases the collector current I _C of the transistor Q ₂ more rapidly in the forward direction. If this increased current it is saturated not have more than one current increase reaches the limitation coil (L ₁₎ has, so to reverse the voltage is flowing generating the counter electromotive force and the coil (L ₂₎ a switching transistor (Q ₂₎ is rapidly turned off It becomes

By repeating the above operation continuously, a negative V _1cd voltage is formed at the output stage. When the voltage of the zener voltage is higher than the zener diode (D ₃ ) at the output side, the switching transistor Q ₂ and the transformer T Irrespective of the operation of ₁ ), a reverse voltage is applied to the base of the driving transistor Q3, and the driving transistor Q ₃ is turned off by the reverse voltage to form a constant constant voltage as follows.

-V _1cd = -V _2D + V _be (Q ₃ )

These voltages cause the +5 main voltage and the field effect transistor Q ₇ to be turned on at the same time, and the transistor Q ₆ is turned on, and the transistor Q ₄ is turned on step by step so that the V _1cd output voltage is increased. appear. In addition, the V _1cd regulated voltage appears according to the values of the resistors R ₅ , R ₆ and R ₈ connected in series. The minimum voltage is determined by the value of R _{8 in} the resistor, and the maximum voltage is determined by the resistor R ₅ . Is determined.

Here, since the adjustment for V _1cd is necessary, the variable volume R ₈ is used.

The operation in the case of turning off the power switch S / W will be described with reference to FIG.

Since the battery or AC adapter is connected to the DC input terminal that turns off the power switch S / W, the voltage across the electrolytic capacitor C ₁ is operated when the switch is turned off as shown in FIG. Since the voltage across or equal to the voltage and across the other electrolytic capacitor (C ₂ ) is cut off by turning off the power switch (S / W), the charged charge is discharged and the voltage decreases rapidly with time. do.

That is, the voltages V _cl and v _c2 of the charge capacitors C1 and C2 provided at both ends of the power switch S / W satisfy the following conditions.

Power switch (S / W) is on: V _1c = V _C2 , off: V _c1 »V _c2 .

In this state, the operation in the V _1cd timing sequential circuit 50 will be described according to the on / off of the power switch S / W.

Initially, when the switch is on, the non-inverting input terminal of the associative amplifier (OP-AMP) U ₁ always has a lower voltage than the inverting input terminal, so the output voltage of the operational amplifier U ₁ becomes low and the output terminal transistor Since the signal applied to the base terminal of Q ₈ through the resistor R18 has a low value, the transistor Q ₈ is kept in the off state. At this time, the selection of the values of the resistors in the V _1cd timing sequential circuit 50 should be made to satisfy the conditions of R ₁₄ = R ₁₅ and R ₁₆ > R ₁₇ in order to satisfy the above state.

Secondly, when the power switch S / W is turned off, the voltage across the capacitor Q ₈ connected between the ground terminal and the non-inverting terminal of the associative amplifier is the voltage V _c1 across the capacitor C ₁ . The voltage (V _c2 ) applied to the capacitor (Q ₃ ), which is divided by (R ₁₄ , R ₁₆ ) and represented by the ratio of the resistance (R ₁₄ ) and is connected between the ground terminal and the non-inverting terminal of the operational amplifier, is the resistance (R _17). , R ₁₅ ) divided by the ratio of the resistor R _15. This voltage is reduced by the increase of V _{c1 and} the decrease of V _c2 when the power switch S / W is turned off, as shown in FIG. The voltage across the city C ₈ is higher than the voltage across the capacitor C ₉ .

Accordingly, since the output voltage of the associating amplifier becomes high and the transistor Q ₈ is turned off through the resistor R ₁₈ , the gates of the transistors Q ₁ and Q ₇ are used regardless of the presence or absence of the V _1cd enable signal. The voltage level is turned low to turn off, and the V _1cd power supply and the V _1cd regulating power supply are lowered before the + 5V main power supply _stage .

This operation is described with reference to the waveform diagram of FIG. 5 as follows. In FIG. 6a, in the case of the conventional V _1cd and V _1cd regulated power supplies with respect to the + 5V main voltage, waveforms of the shapes shown in FIGS. 6b and 6v are shown. When it is turned on, the voltage V _1cd must always rise later than the + 5V main power supply, and when the power switch is turned off, the voltage drops faster than the + 5V main power supply.

In addition, when the power switch is turned on, the driving transistor is controlled without controlling the main voltage line. Therefore, the power loss of the system can be improved when using the AC adapter as well as when the battery is discharged, thereby increasing the operating time. .

In addition, the V _1cd timing sequential circuit _operates when the power is turned off to solve the problem that the V _1cd voltage or the V _1cd control voltage drops by or lower than the +5 V main power supply. Stripes on the surface of the liquid crystal display can be removed, and V _1cd is automatically turned off when the + 5V main power supply is turned off regardless of the presence or absence of the V _1cd enable signal.

Claims (5)

In the liquid crystal display power supply which generates the voltage for the main power supply terminal and the liquid crystal display using the DC power input input from the input terminal by using the potential on / off switch (S / W), the input from the input terminal is fixed. DC-DC converter 10 for converting the level into direct current and supplying the main power terminal, DC-AC converter 20 for converting the input from the input terminal into a constant reel, and the liquid crystal according to the input from the input terminal. A power supply circuit 40 for generating power for a display, a liquid crystal display voltage on / off control circuit 30 'for controlling an on / off operation of the power supply circuit according to a logic state of a liquid crystal display enable signal, and the power supply circuit It characterized in that it comprises a liquid crystal display voltage control circuit (50 ') of generating a voltage and a control voltage for the liquid crystal display in accordance with a constant power supplied from the Power supply for liquid crystal display. The power supply device of claim 1, wherein the power supply device is connected to the outside of the charge capacitors C ₁ and C ₂ provided at both ends of the power on / off switch S / W, respectively. The liquid crystal display voltage on / off control circuit 30 causes the liquid crystal display voltage V _1cd and the adjustment voltage V _1cd Adj to drop before the voltage at the main power supply terminal due to a change in voltage applied to ₁ and C ₂ . And a timing sequential circuit (60) for controlling the operation of '). 3. The timing resistor circuit of claim 2, wherein the timing sequential circuit 60 includes a first resistor R ₁₆ and a second resistor between one point between the input terminal and the charge capacitor C ₁ located outside the power switch and the ground terminal. R ₁₄ ) is connected in series, and the capacitor C ₈ is connected in parallel to the second resistor R ₁₄ , and at the same time between the outer point of the charge capacitor C ₂ located on the other outside of the power switch and the ground terminal. Connect a third resistor (R ₁₇ ) and a fourth resistor (R ₁₅ ) in series, connect a capacitor (C ₉ ) in parallel with the fourth resistor (R ₁₅ ), and connect the second resistor (R ₁₄ ) and the capacitor. (C ₈₎ the connection point to the input of the non-inverting terminal and the fourth resistor (R ₁₅₎ and capacitor (C ₉₎ the operational amplifier (U ₁₎ and the operational amplifier (U to the connection point to the non-inverting terminal and the input of the ₁ ) Switching transistor (Q ₈ ) for connecting the output of the gate terminal to the display for the liquid crystal display Device. 4. The power supply for a liquid crystal display according to claim 3, wherein the resistors are selected to maintain the following conditions. Second resistance (R ₁₄ ) = fourth resistor (R ₁₅ ), first resistor (R ₁₆ )> third resistor (R ₁₇ ). 2. The liquid crystal display voltage on / off control circuit (30 ') of the first and second field effect transistors (Q ₁ ) having a gate connected to a liquid crystal display enable signal terminal through a resistor (R ₁₂ ), respectively. , Q ₂ ), the resistor R ₁₅ connected between the first field effect transistor (Q ₁ ) DML gate terminal and the source terminal and the drain terminal of the second field effect transistor (Q ₂ ) to form a base. An N-type transistor Q ₆ having a resistor R ₁₈ connected between the terminal and the emitter terminal, and a collector R ₇ at the collector terminal of the transistor Q ₆ between the base terminal and the emitter terminal. A power supply device for a liquid crystal display, characterized by comprising a P-type transistor (Q ₄ ) having a resistor (R ₃ ) connected thereto.