KR950010838B1 - Error location calculator and calculating method of contracted reed-solomon decoder - Google Patents

Abstract

a first multiplier for multiplying a coefficient of an error location number polynomial by a shortened symbol length; a register for storing sequentially the computed values in the multiplier; a second multiplier for multiplying the stored value in the register by the error location number polynomial to store the multiplied value in the register; and an adder for checking whether a value which is made by adding "1" to all added value of the stored values in the register is "0", to search error location.

Description

Error Position Calculator for Single Reed-Solomon Decoder and Its Calculation Method

1 is a block diagram of a decoding apparatus of a general Reed-Solomon code.

2 is a block diagram of the error position calculator of the present invention single-axis Reed-Solomon decoding device.

3 is a flowchart illustrating a method for calculating an error position of a single-axis Reed-Solomon decoding device according to the present invention.

* Explanation of symbols for main parts of the drawings

1: shift register 2: ozone generator

3: error location polynomial generator 4: error location calculator

5: error value calculator 6: adder

41,43: Multiplier 42: Register

44: adder

The present invention relates to an error correction decoding apparatus using a shortened Reed-Solomon code whose length of a received symbol defined in GF (2 ^m ) is n '<n = 2 ^m -1. The present invention relates to an error location calculator of a single-axis Reed-Solomon decoding device and a method of calculating the same so as to quickly and easily find out.

As a method for obtaining the position of an error in the decoding process of the Reed-Solomon code defined in the set GF (2 ^m ), Chen's method and Polkinghorn's method are generally used.

The error location number is a solution of the error location polynomial, and the error location polynomial is obtained by calculating a syndrom obtained from the received symbol.

Since the circuit for solving the error position polynomial has a great influence on the complexity and decoding time of the entire decoder, an algorithm for solving the error position polynomial is required simply and quickly.

Chen's method solves the problem by substituting all possible circles on GF ( ^2m ) into the error-position polynomial and the circuit configuration is relatively simple.

However, if the length n 'of the received symbol is smaller than 2 ^m −1, the solution cannot be obtained immediately, and the solution can be obtained only after one frame is delayed.

This is because the solution can only be obtained in 2 ^m -1 trials, since the length of the received symbol is smaller than n '.

In addition, the horning horn method stores a solution corresponding to all coefficients of the error position polynomial in advance in a ROM, and inputs the calculated coefficient of the error position polynomial as the ROM address to find a solution.

However, this method generally has a problem in that the circuit configuration becomes very complicated or a separate ROM is added to the outside.

In view of such a conventional problem, the present invention is characterized by configuring an error location calculator to modify the method of Chen to find the error location of a received symbol so that the circuit configuration is simple and no delay occurs in the decoding time. It is done.

In other words, by multiplying α ^{n-n '} by the error-position polynomial obtained from the testimony, it is adjusted to search for r _n-1 in the first attempt so that all symbols can be searched in n' attempts.

When described in detail with reference to the drawings as follows.

A general Reed-Solomon code decoding apparatus includes a shift register 1 which sequentially stores received n input symbols as shown in FIG. A power generation generator (2) for calculating a power for determining whether there is an error in the received n input symbols; An error position polynomial generator 3 for determining the coefficients of the error position polynomial from the miscalculation calculated by this test generator 2; An error position calculator 4 which calculates an error position by solving the polynomial by the polynomial coefficients determined by the error position polynomial generator 3; An error value calculator 5 for calculating an error value of the error position calculated by the error position calculator 4 by the miscalculation calculated by the error generator 2; The error value calculated by the error value calculator 5 is added to the received symbol stored in the shift register 1, so that the adder 6 corrects the error.

The error position calculator 4 includes: a multiplier 41 which multiplies the coefficients of the error position polynomial obtained from the false by the shortened symbol length α ^{n-n '} , as shown in FIG. 2; A register 42 which sequentially stores the value calculated by this multiplier 41; A multiplier (43) for multiplying the solution of the polynomial which is the error position by the value stored in the register (42) and storing it in the register (42); And an adder 44 which finds the position of the error by checking whether the value obtained by adding all the values stored in the register 42 is zero.

Referring to the operation and effects of the present invention configured as described above in detail.

In general, the error correction process of the Reed-Solomon code is performed in five stages: miscalculation, error location polynomial determination, error location calculation, error value calculation, and error correction.

Chen's method for obtaining the location of the error in the above process substitutes all possible circles on the GF (2 ^m ) into the error location polynomial to find the solution and determine whether the error is mixed in the received symbol to be searched.

This is shown in Table 1 below.

TABLE 1

This method retrieves the symbols r _n-1 to r _n-λ in the first λ attempts.

Therefore, to retrieve the entire received symbol, n attempts are required.

However, the shortened Reed-Solomon code has the length of the received symbol n ', so the number of attempts is also n', which is less than n, so it is adjusted to search for r _n-1 instead of searching for r _n-1 on the first attempt. It is.

This adjustment allows retrieval of symbols from _rn'r to _n'-λ in the first λ attempts, and all symbols in n 'attempts.

The concrete method is solved by multiplying α ^{n-n '} by the error-position polynomial obtained from the testimony.

The algorithm for solving the error position polynomial is as follows.

The received symbol is decoded in the decoder of the short Reed-Solomon code with the symbol length n '<n = 2 ^m -1 defined in GF (2 ^m ).

r (x) = r ₀ + r ₁ x + r ₂ x ² +... r _n'-1 x ^n-1

In this case, an error position of an error occurring in the j-th symbol may be represented by α ^n′-1 (0 ^≦ j ^≦ n′-1).

In a decoder that corrects t errors, the error location polynomial

sigma (x) = 1 + sigma ₁ x + sigma ₂ x ² +... + σ ₁ x ¹

to be.

The solution of sigma (x) is obtained by substituting one circle α ¹ (0 ≦ i ≦ n′−1) of GF (2 ^m ) into the polynomial σ (x) of order t and confirming that the result is zero.

This task can be easily implemented using the modified Chen's method of the present invention.

If an error occurs where j = λ, the solution of the error location polynomial is α ^λ , and the error location is the inverse of α ^λ .

Error location = α ^n-λ = α ^n- λα ^{n -n '} (∵α ⁿ = 1)

to be.

In other words,

To satisfy.

The circuit for checking the error position using the above formula is α, α ² ,. It can be configured using the t multipliers 43 to multiply, α ^t .

When the decoder receives n 'received symbols, the received symbols are stored in the n'-stage shift register (1), and at the same time, 2t (S ₁ , S ₂ , ..., S ₂₁ ) Calculate

From the calculated miscalculation, the coefficients of the error position polynomials α ₁ , δ ₂ ,..., Α ₁ are determined by the error position polynomial generator 3.

When the error position polynomial is determined in this way, the values passed through t multipliers 41 that multiply the coefficients σ ₁ , σ ₂ ,..., Α ₁ by α ^{n-n '} are respectively α, α ² ,. It is input to the register 42 which is connected to t multipliers 43 which multiply by and alpha ^t .

The register 42 in which the value passed through the multiplier 41 is input continues to shift according to the received symbol.

After shifting [lambda] times, t registers 42 each contain alpha ₁ ? alpha ^{n-n'- ?} ,? ₂ ? alpha ^n-n'-2? ,... , α _t · α ^n-n'-tλ is ^contained .

Therefore, the sum of

α ^{n-n '} · σ (α ^λ ) = σ ₀ · α ⁿⁿ + σ ₁ · α ^n-n'-λ + σ ₂ · α ^n-n'-2λ · σ ₁ · α ^n-n'-tλ

It can be confirmed by the output of the adder 44 whether this becomes zero.

Since the error position calculator (4) knows whether or not an error is included in the symbol to be output, the error value calculator (5) calculates the error value and calculates the error value. The error correction is completed by adding the value to the received symbol.

If the above operation is shown in sequence, as shown in FIG. 3, step S1 of storing a received received symbol in a shift register and simultaneously calculating a mistake through a ozone generator; Determining whether n 'symbols have been received after the miscalculation (S2); (S3) outputting a calculated miscalculation in a miscalculation generator when n 'symbols are received, and determining an error position polynomial coefficient from the miscalculated miscalculation through the generator; Multiplying the coefficient of the error location polynomial by the element of the shortened symbol length by α ⁿⁿ (S4) and storing it in the register (S4); adding all the values stored in each register to 1 plus 0. Determining whether there is an error in the symbol to be outputted (S5) and calculating an error value of 0 if there is no error in the currently output symbol, and calculating an error value if there is an error in the currently output symbol. After calculating the error value through, and sequentially correcting the error by the calculated error value (S6) is operated sequentially.

As described in detail above, the present invention can simplify the circuit configuration by modifying the existing Chen method in the error correction decoding system using the shortened Reed-Solomon code, thereby reducing the design cost in the circuit configuration. In addition, it is possible to find the location of the error simply and quickly, thereby improving the performance and reliability of the product.

Claims (2)

In a shortened Reed-Solomon decoding apparatus having a length of a received symbol defined on GF (2 ^m ) of n '(<2 ^m -1), the shortened symbol length α ^{n-n' is added} to the coefficient of an error position polynomial obtained from a testimony. A multiplier 41 to multiply; A register 42 which sequentially stores the value calculated by this multiplier 41; A multiplier (43) for multiplying the solution of the polynomial which is the error position by the value stored in the register (42) and storing it in the register (42); Error of shortened Reed-Solomon decoding device comprising an adder 44 for finding the location of the error by checking whether the value of all the values stored in the register 42 plus 1 is 0. Location Calculator. Storing the input received symbol in a shift register and simultaneously calculating miscalculation through a miscellaneous generator (S1); Determining whether n 'symbols have been received after the miscalculation (S2); (S3) outputting a calculated miscalculation by a miscalculation generator when n 'symbols are received, and determining a coefficient of the error position polynomial from the miscalculation calculated by the error position polynomial generator (S3); Multiplying the coefficient of the error position polynomial determined by the error position polynomial generator by an element α ^{n -n '} corresponding to a shortened symbol length and storing it in a register (S4); Determining whether an error is present in a symbol to be output by checking whether a value obtained by adding 1 to 0 is added to all of the values stored in each register (S5); If there is no error in the current output symbol, the error value is calculated as 0, and if there is an error in the current output symbol, the error value is calculated by the error value calculator, and the error is corrected by the calculated error value. S6), the error position calculation method of the single-axis Reed-Solomon decoding device characterized in that the sequential operation.