KR950007968B1 - The reflection wave regenerating circuit - Google Patents

Abstract

The circuit comprises an input section(10) for receiving a transferred signal, a channel separating section for shifting an input modulated signal to the base band to separate an I-channel and a Q-channel signal, a third mixer(20), a lock detector(29) for receiving the I and the Q channel signal to output a lock detect signal(S1), a first loop filter(18) for filtering an output of the third mixer(20), a second loop filter(21) for filtering an output signal of an AFC(Automatic Frequency Control) section, a switch (26), a VCO(16) for outputting a local detect signal(S2), and a second logic sum circuit(28) for receiving the logic detect signal(S1) and the false detect signal(S2) to output a signal(S3) controlling the switch(26).

Description

Carrier regeneration circuit

1 is a block diagram of a conventional carrier reproduction circuit.

2 is an enlarged block diagram of the fixed detection circuit of FIG.

3 is a block diagram of a carrier reproduction circuit according to the present invention.

FIG. 4 is an enlarged block diagram of the misalignment detection circuit of FIG.

* Explanation of symbols for main parts of the drawings

10: input unit 11, 12, 20: mixer

13: 90 ° phase shift part 14, 15: low pass filter

16: VCO 17, 24: synthesizer

18, 19: loop filter 21: AFC

27, 28: logic sum circuits BPF1, BPF2,... , BPFn: Band Filter

ED1, ED2,... EDn: Envelope detector COM *, COM1, COM2,… COMn: comparator

The present invention relates to a circuit for obtaining a baseband signal required by using a modulated signal received from a receiver used in a communication system and a reproduced local carrier signal. Particularly, the reproduced local carrier signal is generated at an error frequency rather than a carrier frequency. The present invention relates to a carrier regeneration circuit configured to prevent a false locking phenomenon.

In general, in most communication systems, it is necessary to regenerate a transmission carrier to obtain a required baseband signal from a modulated signal received at a receiver.

However, in reproducing a carrier, an unpredictable variation of a carrier frequency occurs due to jitter generated due to a phase shift due to noise or a parameter for determining a carrier frequency.

For this reason, in the conventional carrier regeneration circuit, a misalignment phenomenon in which the local carrier signal is fixed at an error frequency other than the carrier frequency may occur.

FIG. 1 is a block diagram of a conventional carrier reproduction circuit, and FIG. 2 is an enlarged block diagram of the fixed detection circuit part of FIG.

As shown in FIG. 1, a conventional carrier regeneration circuit has a frequency equal to the carrier frequency of a received modulation signal and a costas loop and automatic frequency control for generating a phase-locked local carrier. Control loop (hereinafter referred to as AFC) and a fixed detection circuit for controlling the selection of the two loops.

Here, the Costas loop is a channel separation means for transitioning the received modulation signal to the baseband to separate the I-channel (In-phase channel) and Q-channel (Quadrature-phase channel), and the separated I-channel and Q- A third mixer that uses a channel signal as an input, a first loop filter that filters the output of the third mixer, and a voltage controlled oscillator controlled by an output signal of the first loop filter (hereinafter referred to as a VCO). It consists of).

In FIG. 1, the transmitted modulated signal is received through the input unit 10, where the modulated signal includes an information signal in the carrier frequency (fc) band.

The modulation signal is input to the first mixer 11 and the second mixer 12, and at the same time, the first mixer 11 has the same frequency as the carrier frequency fc and is in the in-phase. The subcarrier is input, and the second carrier 12 is inputted with a local carrier which is in a quadrature-phase while passing through the 90 ° phase shifter 13.

The first mixer 11 outputs an I-channel signal having a frequency (2fc) that is twice the carrier frequency (fc) by multiplying two input signals and outputting the first low-pass filter. Filtered at (14) to remove high frequency (2fc) components.

Similarly, the Q-channel signal output from the second mixer 12 is filtered by the second low pass filter 15 to remove the high frequency 2fc component.

The I-channel signal and the Q-channel signal are input to the third mixer 20, and the phase difference components included in each of the two signals are multiplied and output. The output signal is passed through the first loop filter 18. The VCO 16 will be controlled.

At this time, if the frequency of the VCO 16 is changed at the carrier frequency due to some confusion or jitter, this frequency difference is represented by a gradual change in the phase difference component. In addition, the I-channel signal and the Q-channel signal may be input to the AFC 21 to control the VCO 16 through the second loop filter 19.

Here, the Costas loop has a narrow carrier frequency reproduction range by using a narrowband filter as the first loop filter 18, and the AFC loop has a wide carrier frequency range by using a wideband filter as the second loop filter 19. The selection of the two loops is determined by the switch 26, and the on / off control of the switch 26 is made by the output signal S1 of the fixed detection circuit 29. .

As shown in FIG. 2, the fixed detection circuit 29 includes first and second square units, a second synthesizer, and a comparator COM *. The I-channel signal and the Q-channel signal are respectively input to the first squarer 22 and the second squarer 23 and pass through the second synthesizer 24 so that signal components corresponding to the two data signals are obtained. Is output.

The voltage value of the output signal component is input to the inverting terminal of the comparator COM * and compared with the reference voltage Ref * applied to the non-inverting terminal to output the fixed detection signal S1.

At this time, when the magnitude of the signal component is greater than the reference voltage Ref *, the fixed detection signal S1 keeps the switch 26 open, and thus the VCO 16 is controlled by the output signal of the Costa loop. Therefore, it operates in the narrow carrier frequency reproduction range.

On the other hand, when the magnitude of the signal component is smaller than the reference voltage Ref *, the fixed detection signal S1 converts the switch 26 to the closed state, and accordingly, the VCO 16 is controlled by the output signal of the AFC loop. Therefore, it operates in a wide range of carrier frequencies. However, the fixed detection circuit 29 undesirably calculates an error signal corresponding to the error between the data component and the noise component of the input harmonic signal, so that the selection of the Costa loop and the AFC loop is made inadequately, and thus reproduced. There is a problem in that a local carrier is fixed at an error frequency rather than a carrier frequency.

Accordingly, an object of the present invention is to provide a carrier reproducing circuit capable of preventing a misalignment phenomenon in which a local carrier is locked in phase at an error frequency rather than a carrier frequency.

In order to achieve the above object, the present invention includes an input unit for receiving a transmitted signal; Channel separation means for shifting the modulated signal applied to the input portion to a baseband to separate the I-channel signal and the Q-channel signal; A third mixer for inputting the I-channel signal and the Q-channel signal; An AFC circuit for inputting the I-channel signal and the Q-channel signal; A fixed detection circuit for outputting a fixed detection signal by inputting the I-channel signal and the Q-channel signal; A first loop filter for filtering the output signal of the third mixer; A second loop filter for filtering the output signal of the AFC circuit; A switch coupled to the output of the second loop filter; A carrier reproducing circuit having a VCO controlled by an output signal of the first loop filter or an output signal of the switch and supplying a local carrier to the channel separating means, the output being coupled in parallel to the output of the third mixer. N band filters for filtering only corresponding components of the harmonic signals to be passed; N envelope detectors coupled to the outputs of the n band filters, respectively, for detecting amplitudes of the filtered harmonics; N comparators each coupled to the outputs of the n envelope detectors and outputs the result of comparing the output signal of each envelope detector input to the non-inverting terminal with each reference voltage applied to the inverting terminal; A first logic sum circuit for inputting n signals output from the n comparators and outputting a fixed detection signal; And a second logic sum circuit for outputting a signal for controlling the switch by inputting the fixed detection signal and the fixed detection signal.

Hereinafter, with reference to the accompanying drawings of the present invention will be described in detail.

FIG. 3 is a block diagram showing an embodiment of a carrier regeneration circuit according to the present invention, and FIG. 4 is an enlarged block diagram of the miscellaneous detection circuit 30 of FIG.

As shown in FIG. 3, the carrier reproducing circuit according to the present invention corresponds to a Costa Loop and an AFC loop for reproducing a local carrier having a phase locked carrier frequency, an I-channel signal and a Q-channel signal and an error. A fixed detection circuit 29 for controlling the selection of the two loops by comparing the magnitude of the error signal with a reference voltage, and a misalignment check to prevent a phenomenon in which the reproduced local carrier is fixed at an error frequency rather than a carrier frequency. An output circuit 30 and a logic sum circuit 28 for outputting a signal S3 for controlling the switch 26 by inputting the fixed detection signal S1 and the fixed detection signal S2 as input; have.

As shown in FIG. 4, the fixed-state detection circuit 30 has n band filters BPF1 and BPF2 having different frequency band ranges so that each component of the harmonic signal output from the third mixer 20 passes. , ..., BPFn), n envelope detectors (ED1, ED2, ..., EDn) for detecting the magnitude of each high frequency component filtered by the n band filters, and the output signals of the n envelope detectors and the respective N comparators (COM1, COM2, ..., COMn) for comparing and comparing reference voltages, and a logic sum circuit 27 for inputting n signals output from the n comparators and outputting a fixed detection signal S2. Equipped.

In FIG. 4, a signal having n harmonic components output from the third mixer is input to n band filters having each harmonic frequency as the center frequency, and each component of the harmonic signal passes through the corresponding band filter.

The filtered n harmonic components are input to n envelope detectors, and the amplitude of each harmonic component is detected as a voltage magnitude, and the detected value is input to the non-inverting terminals of n comparators coupled to the output of each envelope detector. In this case, the inverting terminal of each comparator has a voltage value corresponding to the magnitude of each harmonic component in the stationary state, and a reference voltage of each comparator is applied as (Ref1, REF2, ..., Refn).

Therefore, each comparator compares the magnitude of the voltage input to the two terminals, and when the output signal from the envelope detector is larger than the reference voltage, a false detection signal is generated.

Since each output signal of the n comparators is input to the first logical sum circuit 27, when a false detection signal is generated from at least one comparator of the n comparators, the first logical sum circuit 27 generates a false positive detection signal ( S2) is outputted, and this output signal S2 is controlled so that the switch 26 is in the closed state via the second logical sum circuit 28 so that the AFC loop is selected as a circuit for controlling the VCO 16. do.

On the other hand, when the output signals of the envelope detectors are smaller than the respective reference voltages in the n comparators, no positive detection signal is generated, and thus the switch 26 is opened, and the VCO 16 is driven by the CostaSloop. Controlled.

As a result, the fixed detection signal S1 generated when the data component, the noise component, and the difference are compared to the reference voltage in the harmonic signal transitioned to the baseband signal, and the magnitude of each component of the harmonic signal is compared with the reference voltage. The switch 26 for determining the selection of the Costa loop or the AFC loop is controlled by the coming fixed detection signal S2. When one or both signals of the two signals are generated, the switch 26 is closed. The AFC loop is selected so that the VCO 16 is controlled over a wide carrier frequency reproduction range.

As described above, the carrier reproduction circuit according to the present invention prevents the misalignment phenomenon that may occur when the switch 26 is controlled by the fixed detection circuit 29 only by adding the miscellaneous detection circuit 30. It provides more advanced features.

Claims (2)

An input unit 10 for receiving the transmitted signal; Channel separation means for shifting the modulated signal applied to the input unit 10 to a baseband and separating the modulated signal into an I-channel signal and a Q-channel signal; A third mixer (20) for inputting the I-channel signal and the Q-channel signal; AFC means 21 for inputting the I-channel signal and the Q-channel signal; A fixed detection circuit 29 for outputting the fixed detection signal S1 by inputting the I-channel signal and the Q-channel signal; First loop filter means (18) for filtering the output signal of the third mixer (20); Second loop filter means (19) for filtering the output signal of said AFC means (21); Switch means (26) coupled to the output of said second loop filter means (19); In a carrier reproducing circuit having a VCO means (16) which is controlled by an output signal of said first loop filter means (18) or an output signal of said switch means (26) to output said local carrier, said third mixer Miscorrection detecting means (30) for outputting miscorrection detection signal (S2) for misprevention of misalignment at the output of (20); And a second logic circuit 28 for outputting a signal S3 for controlling the switch means 26 by inputting the fixed detection signal S1 and the fixed detection signal S2. Carrier regeneration circuit. According to claim 1, wherein the miscellaneous fixed means 30 is coupled in parallel to the output of the third mixer 20, n band filter means for filtering so that each corresponding component of the harmonic signal input ( BPF1, BPF2, ..., BPFn); N envelope detection means (ED1, ED2, ..., EDn) which are respectively coupled to the outputs of said n band filter means and detect amplitude magnitude of each filtered high frequency component; Comparing and calculating the output signal of each envelope detecting means coupled to the outputs of the n envelope detecting means and input to the non-inverting terminal and the reference voltages Ref1, Ref2, ..., Refn applied to the inverting terminal, N comparison means (COM1, COM2, ..., COMn) to output; And a first logical sum circuit (27) for inputting n signals output from the n comparison means and outputting a fixed detection signal (S2).

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