KR950007495B1 - The high frequency processing device of digital cellular phone - Google Patents

Abstract

The apparatus performs communication function between handset unit and base station unit. The digital cordless telephone uses identical carrier frequency and performs data communication by using time-sharing method. The apparatus consists of a receiver(100), a transmitter(200), the first synchronizing loop(710), the second synchronizing loop(720) and the third synchronizing loop(730). The receiver is composed of an antenna(10) and a mixer(30).

Description

High Frequency Signal Processing Device of Digital Cordless Telephone

1 is a view for explaining a time division transmission and reception method of a digital radiotelephone.

2 is a diagram showing the configuration of a conventional high frequency signal processing apparatus.

3 is a view showing the configuration of a high frequency signal processing apparatus according to the present invention.

* Explanation of symbols for main parts of the drawings

10 antenna 20 low noise amplifier

30,70,724: Mixer 40: Bandpass Filter

50: demodulator 60: offset oscillator

80: power amplifier 100: receiver

200: transmitter 300: frequency synthesizer

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to digital cordless telephones that communicate between a handset unit and a base unit. In particular, the present invention relates to data sharing in a time-sharing manner using the same carrier frequency. A high frequency signal processing apparatus in a digital radiotelephone for performing communication.

In general, a radiotelephone is composed of a base unit 1, which is a fixed station, and a handset unit 2, which is a mobile station (portable device), as shown in (a) of FIG. 1, so that the handset unit 2 is a base unit (1). Communication is possible while freely moving within a predetermined distance available for communication.

The time division communication method of a radiotelephone means that the base unit 1 and the handset unit 2 communicate while alternately transmitting and receiving modes at predetermined time intervals (or periods).

That is, as shown in (b) of FIG. 1, if the handset unit 2 is in the transmission mode Tx for a period of time t1 to time t2, the base unit 1 is in the reception mode Rx.

During the next period t2 to t3, the handset unit 2 is in the reception mode Rx and the base unit 1 is in the transmission mode Tx.

When the base unit 1 and the handset unit 2 communicate in a time division manner, they transmit and receive at the same carrier frequency.

The carrier frequency used in the time division wireless telephone as described above uses a very high frequency band. Referring to the attached FIG. 2, the conventional high frequency signal processing apparatus is as follows.

In the related art, in order to transmit and receive the base unit and the handset unit in a time division manner, the first switch 400 is switched by a transmission / reception mode (Tx ÷ Rx) synchronization signal to provide a transmission / reception path of a high frequency carrier signal.

The second switch 500 that provides a transmission path of power provided to the receiver 100 and the transmitter 200 is switched by the transmission / reception mode synchronization signal, and is interlocked with the first switch 400.

In the case of the reception mode Rx, the first and second switches 400 and 500 are switched to the receiver 100 so that the power Vcc is supplied to the receiver 100 and a predetermined frequency Fc is received from the place where the call is to be made. When the signal having the signal is captured by the antenna 10, the signal is provided to the receiver 100.

In addition, the third switch 600 in the transmitter 200 is also switched by the transmission / reception mode synchronization signal, and performs a function of providing an output signal path of the offset oscillator 60.

Looking at the role of the performance function for each mode, the third switch 600 in the transmission mode connects the output signal of the offset oscillator 60 to the input terminal of the second mixer 70, while the offset in the reception mode The output signal path of the oscillator 60 is blocked.

In the transmission mode and the reception mode as described above, the operation of the system in the reception mode and the transmission mode divided by the interworking function of the 1 to 3 switches 400, 500, and 600 will be described.

The low noise amplifier 20 amplifies a weak carrier signal of a predetermined frequency Fc received by the antenna 10 and provides the amplified carrier signal to the first mixer 30.

The first mixer 30 is provided with a synthesized signal having a predetermined frequency Fs from the frequency synthesizer 300 and mixed with a carrier signal having a high frequency to have an intermediate frequency signal having a frequency (Fif = Fs-Fc). signal: Fif) is printed.

The output signal Fif of the first mixer 30 is filtered by a band pass filter 40 and demodulated by a demodulator 50.

In the transmission mode Tx, the first and second switches 400 and 500 are switched to the transmitter 200 to change the supply path of the power supply Vcc so that the receiver 100 is in an inoperative (OFF) state. The transmitter 200 is in an ON state.

The third switch 600 is switched to the side connecting the signal path to enable the output signal of the offset oscillator 60 to be transmitted to the second mixer 70.

The synthesis of the reference signal Fr and the modulating signal MS is performed by the frequency synthesizer 300, and the output signal Ss of the frequency synthesizer 300 is obtained by the second mixer 70. It is mixed with an output signal (offset signal Foff) of the offset oscillator 60 to form a transmission carrier signal Fc having a predetermined frequency (Fc = Fs + Foff).

The output signal Fc of the second mixer 70 is amplified by the power amplifier 80 and then transmitted to the place where the call is to be made through the antenna 10.

Since the carrier frequencies of the transmission signal and the reception signal are the same, the input signal frequency Fif of the demodulator 50 and the output signal frequency Foff of the offset oscillator 60 become the same frequency.

In the related art, since the response time of the offset oscillator 60 is slow, the power supply of the offset oscillator 60 is transmitted by the transmission / reception mode (Tx / Rx) synchronization signal together with the second mixer 70 or the power amplifier 80. Since the offset oscillator 60 is operated separately even in the reception mode Rx, only the signal path of the output of the offset oscillator 60 is interrupted by the third switch 600. Therefore, in the reception mode Rx, the above-described offset oscillator 60 is operated so that the output signal of the offset oscillator 60 is radiated to the surroundings, and the frequency Foff is induced to the input of the demodulator 50 to be a signal of the frequency Foff. There is a problem that causes an error in the received information due to the magnetic signal interference caused.

In addition, the transmitter 200 has a problem that the unnecessary radiation occurs by mixing the output signal (Fc) and the offset signal (Foff) of the frequency synthesizer 300 in the mixer.

In addition, the conventional frequency synthesizer 300 has a problem that the oscillation frequency of the oscillator 306 is shaken due to the load fluctuation due to the switching of the reception mixer 30 and the transmission mixer 70.

An object of the present invention for solving the above problems can remove the magnetic signal interference by the offset frequency in the reception mode without shaking the oscillation frequency when switching the transmission / reception mode, and prevent unnecessary radiation generated in the transmission mode It is to provide a high frequency signal processing apparatus for.

A feature of the present invention for achieving the above object is a receiver 100 having a mixer 30 for synthesizing a signal received through an antenna 10 and a detection frequency signal in a reception mode and a transmission bounce in a transmission mode. Since the transmitter 200 receiving the signal and transmitting data through the antenna 10 uses the same carrier frequency, the high frequency signal of the digital radiotelephone that performs data communication by performing ON / OFF operation alternately by time division method. In the processing apparatus, a reference oscillator 701 for generating a predetermined reference frequency (Fr) signal, and a first phase synchronizer loop (710) for receiving the reference frequency (Fr) signal and generating a channel frequency (f1) signal. And a second phase synchronizer loop 730 that receives the reference frequency Fr signal and generates a frequency f2 signal, and the carrier piece provided from the second phase synchronizer loop 730 is a frequency. The channel frequency signal f1 is received as an input signal by the signal (f2). In the reception mode Rx, the detection unit 100 outputs a detection frequency signal so that the reception unit 100 can detect the frequency of the corresponding reception channel. In the transmission mode Tx, the third phase synchronizer 720 outputs the transmission carrier signal.

Hereinafter, exemplary embodiments of the present invention will be described with reference to the accompanying drawings.

3 is a diagram illustrating an embodiment of the present invention. When the transmission mode Tx and the reception mode Rx are alternately performed in a time division manner, the first switch 400 may be configured to the transmission mode synchronization signal and the reception mode synchronization signal. It is switched to the transmitter and receiver alternately to create a signal transmission path.

At this time, the second switch 500 is also linked with the first switch 400 to provide a power supply (Vcc) alternately to the transmitter and the receiver.

In the case of the reception mode Rx, the first and second switches 400 and 500 are switched to the receiver side terminal to form a transmission path of the received signal on the receiver side, and a power supply Vcc is applied to operate the receiver.

When the signal of the frequency Fc transmitted from the place to be called is captured by the antenna 100, the signal is amplified by the low noise amplifier 20 and mixed with the Fs output signal of the frequency synthesizer 700 by the first mixer 30 and then Fif. It produces an intermediate frequency signal with the result of the calculation of Fs, Fc.

In the first mixer 30, a fundamental frequency (Fs, Fc) signal, harmonics of the fundamental frequency signal, a sum frequency (Fs + Fc) signal, and a difference frequency (Fs-Fc) signal are generated. However, only the difference frequency (Fs-Fc) signal, that is, the intermediate frequency (Fif) signal, is output from the bandpass filter 40 by the filter function of the bandpass filter 40.

In addition, in the transmission mode Tx, the first and second switches 400 and 500 are switched to the transmitter side to form a signal transmission path of the transmitter, power is applied to the transmitter, and power supply to the receiver is cut off.

Therefore, the transmitter 200 is in an ON state and the receiver 100 is in an inoperative OFF state.

The modulated signal MS to be transmitted is modulated through a modulation loop in the frequency synthesizer 700.

At this time, the frequency synthesizer 700 amplifies the output frequency to Fc by the power amplifier 80, and then transmits and outputs a signal to the counterpart.

As described above, the frequency synthesizer 700 of the present invention outputs the frequency of Fc at the time of transmission and outputs the result of the calculation of the frequency of Fs, that is, Fc + Fif.

Hereinafter, referring to the detailed configuration and operation of the frequency synthesizer 700 according to the present invention, reference numeral 701 denotes a TCXO (Temperature Compansation Crystal Oscillator) as a reference oscillator, 710 is a first phase synchronizer loop for generating a channel frequency, 730 Denotes a second phase-locked loop, and 720 denotes a third-phase locked-loop.

The first phase synchronizer loop 710 may include a first counter 711 for dividing an output signal of the reference oscillator 710 at a predetermined frequency fr / R1, and an output signal of the first counter 711. A first phase comparator 713 having an input terminal, a feed back terminal, an output terminal, and an output signal of the first phase comparator 713, and passing only signals of a predetermined frequency band; A first voltage controlled oscillator 715 and a first voltage controlled oscillator 715 for receiving a first loop filter 714, an output signal of the first loop filter 714, and outputting a predetermined channel frequency f1 signal. And a first variable counter 712 which receives the channel frequency f1 signal outputted from the input signal) and divides it into a predetermined frequency f1 ÷ Np and inputs it to the feedback terminal of the first phase comparator 713.

In addition, the second phase synchronizer loop 730 may include a second counter 731 for dividing an output signal of the oscillator 701 at a predetermined frequency (fr ÷ R2) and the second counter by a modulated signal input from the outside. A modulator 732 for modulating the output signal of the counter 731, a second phase comparator 733 having an input terminal to which the output signal of the modulator 732 is input, a feed back terminal and an output terminal, A second loop filter 734 which receives an output signal of the second phase comparator 733 and passes only signals of a preset frequency band, and receives an output signal of the second loop filter 734. Receives the output signals of the second voltage controlled oscillator 736 and the second voltage controlled oscillator 736 that outputs a channel frequency f2 signal, respectively, according to the reception mode Rx and the transmission mode Tx. A second barrier which is divided into (f2 ÷ N1, f2 ÷ N2) and input to the return terminal of the second phase comparator 733. It consists of a counter (735).

In addition, the third phase synchronizer loop 720 includes an input terminal, a feedback terminal, and an output terminal to which a channel frequency f1 signal output from the first voltage controlled oscillator 715 in the first phase synchronizer loop 710 is input. A third phase comparator 731 having a second phase comparator, a third voltage controlled oscillator 725 for outputting a synthesized signal in the reception mode Rx, and a transmission return signal in the transmission mode Tx, and the third phase A third loop filter 722 for receiving only the output signal of the comparator 731 and outputting only a frequency signal of a preset frequency band and inputting it to an input terminal of the third voltage controlled oscillator 725; The mixer 724 and the mixer which the carrier piece output from the second voltage controlled oscillator 715 in the loop 720 receives and mixes the frequency f2 signal and the output signal of the third voltage controlled oscillator 725. Input the output signal generated at 724 to remove the high frequency components and then output The third consists of a low-pass filter 723 for input to the feedback terminal of the phase comparator 721.

The operation of the first to third phase synchronizing loops having the above configuration will now be described.

In the first phase synchronizer loop 710, which is a part for making the channel frequency f1, the first counter 711 receives and divides a signal of the reference frequency Fr from the oscillator 701 to divide the frequency of Fr ÷ R1. Make a signal to have

An output Fr ÷ R1 of the first counter 711 and an output f1 ÷ Np of the first variable counter 712 are input to the first phase comparator 713, and the first variable counter 712 is provided. Np, which represents the output f1 ÷ Np signal, is an integer from 1 to Np as a coefficient of the first variable counter 712.

The Np value depends on the selected channel frequency f1.

At this time, the first phase comparator 713 compares the phases of the output signals of the two counters 711 and 712 and outputs a predetermined DC voltage according to the phase difference.

In the second phase synchronization loop 730, the signal of the reference frequency Fr provided from the reference oscillator 701 is divided by the second counter 731 at a predetermined frequency Fr ÷ R2.

Thereafter, the phase modulator 732 is phase modulated by an externally supplied modulation signal MS, and a signal corresponding to the result is provided to the second phase comparator 733.

At this time, the second phase comparator 733 is provided with an output signal of the second variable counter 735.

The second variable counter 735 is set to N1 in the reception mode Rx and N2 in the transmission mode Tx.

Accordingly, the frequency f2 of the output signal of the second phase synchronization loop 730 is N1 × (Fr ÷ R2) in the reception mode Rx, and N2 × (Fr ÷ R2) in the transmission mode Tx. Becomes

In addition, the third phase synchronizer loop 720 outputs a signal having a frequency of f3 = f2 + f1 using the output signal f1 of the first phase synchronizer loop 710 as a reference signal.

Therefore, in the transmission mode (Tx), the output frequency of the frequency synthesizer 700 is as shown in Equation (1) below.

f3 = Fc = N2 × (Fr ÷ R2) + Np × (Fr ÷ R1). … … … … … … … … … … … … Formula (1)

Signal is generated, and in case of receiving mode (Rx),

f3 = Fs = N1 × (Fr ÷ R2) + Np × (Fr ÷ R1). … … … … … … … … … … … … Formula (2)

Output the signal.

As described above, according to the present invention, the oscillation frequency itself of the voltage controlled oscillator 725 which not only fundamentally prevents the magnetic signal interference by the offset oscillator but also outputs the frequency synthesizer 700 at the time of transmission / reception is switched. Since the switching is solved, the problem of frequency drift caused by load fluctuations is also solved, and it is possible to fundamentally prevent unnecessary radiation caused by the transmission mixer, thus enabling a clean conversation without noise.

Claims (4)

Receiving unit 100 having a mixer 30 for synthesizing the signal received through the antenna 10 and the detection frequency signal in the reception mode and the transmission and reception signal in the transmission mode receives the data through the antenna 10 In the high frequency signal processing apparatus of the digital radiotelephone which performs data communication by performing on / off operation by time division method because the transmitting unit 200 transmitting the same carrier frequency uses the same carrier frequency, the predetermined reference frequency (Fr) A reference oscillator 701 for generating a signal; A first phase synchronization loop 710 for receiving the reference frequency signal Fr and generating a channel frequency signal f1; A second phase synchronizing loop 730 which receives the reference frequency Fr signal and generates a frequency f2 signal on a carrier piece; The carrier piece provided from the second phase synchronizer loop 730 receives the channel frequency signal f1 as an input signal by a frequency f2 signal, and the receiver 100 receives the channel frequency signal f1 as an input signal. And a third phase synchronizer loop 720 which outputs a detection frequency signal so as to detect a frequency of a reception channel and outputs the transmission carrier signal in a transmission mode Tx. High frequency signal processing device. The first phase synchronizer loop 710 further comprises: a first counter 711 for dividing an output signal of the reference oscillator 710 at a predetermined frequency (fr ÷ R1); A first phase comparator 713 having an input terminal to which the output signal of the first counter 711 is input, a feed back terminal and an output terminal; A first loop filter 714 which receives an output signal of the first phase comparator 713 and passes only signals of a predetermined frequency band; A first voltage controlled oscillator 715 for receiving an output signal of the first loop filter 714 and outputting a predetermined channel frequency f1 signal; And a first barrier receiving the channel frequency f1 signal output from the first voltage controlled oscillator 715 and dividing the signal at a predetermined frequency f1 ÷ Np and inputting it to the feedback terminal of the first phase comparator 713. High frequency signal processing apparatus for a digital cordless telephone, characterized in that consisting of a double counter (712). The second phase synchronizer loop (730) according to claim 1, further comprising: a second counter (731) for dividing the output signal of the oscillator (701) at a predetermined frequency (fr ÷ R2); A modulator 732 for modulating an output signal of the second counter 731 according to an externally input modulation signal; A second phase comparator 733 having an input terminal to which the output signal of the modulator 732 is input, a feed back terminal, and an output terminal; A second loop filter 734 which receives an output signal of the second phase comparator 733 and passes only signals of a predetermined frequency band; A second voltage controlled oscillator 736 which receives an output signal of the second loop filter 734 and outputs a predetermined channel frequency f2 signal; And receiving the output signal of the second voltage controlled oscillator 736 and dividing the signal into two frequencies f2 ÷ N1 and f2 ÷ N2 according to the reception mode Rx and the transmission mode Tx, respectively. A high frequency signal processing apparatus for a digital radio telephone, characterized in that it comprises a second variable counter (735) input to a return terminal of (733). The third phase synchronizing loop 720 is a channel frequency (f1) signal output from the first voltage controlled oscillator 715 in the first phase synchronizing loop 710 is input. A third phase comparator 731 having an input terminal, a feedback terminal, and an output terminal; A third voltage controlled oscillator 725 for outputting a combined signal in the reception mode Rx and a transmission return signal in the transmission mode Tx; A third loop filter 722 which receives an output signal of the third phase comparator 731 and outputs only a frequency signal of a preset frequency band and inputs it to an input terminal of the third voltage controlled oscillator 725; The mixer output from the second voltage controlled oscillator 715 in the second phase synchronizer loop 720 receives a frequency f2 signal and an output signal of the third voltage controlled oscillator 725, and mixes and outputs the mixed signal. 724); And a low pass filter 723 for receiving the output signal generated by the mixer 724, removing the high frequency components, and then outputting the same to the feedback terminal of the third phase comparator 721. High frequency signal processing device for telephone.