KR950004798A - Synchronous Branch / Coupling / Multiple Transmission Devices - Google Patents

Synchronous Branch / Coupling / Multiple Transmission Devices Download PDF

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KR950004798A
KR950004798A KR1019930013964A KR930013964A KR950004798A KR 950004798 A KR950004798 A KR 950004798A KR 1019930013964 A KR1019930013964 A KR 1019930013964A KR 930013964 A KR930013964 A KR 930013964A KR 950004798 A KR950004798 A KR 950004798A
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signal
signals
signal processing
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processing
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KR950015085B1 (en
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김재근
고제수
김홍주
엄두섭
이동춘
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양승택
재단법인 한국전자통신연구소
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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/42—Loop networks
    • H04L12/427—Loop networks with decentralised control
    • H04L12/43—Loop networks with decentralised control with synchronous transmission, e.g. time division multiplex [TDM], slotted rings
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/062—Synchronisation of signals having the same nominal but fluctuating bit rates, e.g. using buffers
    • H04J3/0623—Synchronous multiplexing systems, e.g. synchronous digital hierarchy/synchronous optical network (SDH/SONET), synchronisation with a pointer process

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Computer Hardware Design (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

본 발명은 비동기식 디지틀 계위 신호인 1.544Mb/s(DSIN), 2.048Mb/s(DSIE), 44.736Mb/s(DS3)신호를 인터페이스하여 동기식 컨테이너 신호(VC1, VC3) 형태로 사상 및 다중화한 후 동기식 디지틀 계위(SDH)신호인 STM-N(1.55.52Mb/s×N,N=1,4,16)신호내로 결합(Add)하여 광전송하며, STM-N 광신호로부터 동기식 컨테이너신호를 분기(Drop)하여 역다중 및 역사상을 거쳐 DSIN, DSIE,DS3신호를 추출하여 디지틀 전송하는 동기식 분기/결합/다중전송장치에 관한 것으로, STM-N 신호에 포함된 DSn 단위의 분기/결합 기능이 요구되는 전송망에 적용하며 트래픽 집중형 및 전용선 개념의 트래픽 분산형의 망구성이 가능하고, 장치 구성의 단순성 및 경제성이 뛰어나고, 기능 구현의 용이 및 운용 관리가 편리하고 드루타이밍(Through timing)/루프 타이밍(Loop timing)/외부 타이밍 동기가 가능하고, DS1 단위의 분기/삽입 능력을 이용하여 기존의 가입자 접속이 가능하고, 서비스 보호 특성이 완전한 효과를 제공하며, SHP망 구성을 가능하게 하고 앞으로 BDCS(Broadband Digital Crosseonnection System)와의 접속을 통해 여러 다른 SHP망 구성들과의 접속을 용이하게 하는 효과가 있다.According to the present invention, after mapping and synchronizing 1.544 Mb / s (DSIN), 2.048 Mb / s (DSIE), and 44.736 Mb / s (DS3) signals, which are asynchronous digital hierarchy signals, in the form of synchronous container signals VC1 and VC3, Add and transmit optically into STM-N (1.55.52Mb / s × N, N = 1,4,16) signal, which is a synchronous digital hierarchy (SDH) signal, and branch the synchronous container signal from the STM-N optical signal. The present invention relates to a synchronous branch / combination / multi-transmitter that extracts and digitally transmits DSIN, DSIE, and DS3 signals through demultiplexing and history, and requires a branching / combining function of DSn units included in an STM-N signal. Applied to the transport network, it is possible to configure the traffic distributed network in the concept of traffic convergence and leased line, and the device configuration is simple and economical, and the function is easy to implement, operation management is easy, and the droop timing / loop timing ( Loop timing) / external timing synchronization possible, DS1 unit minutes It is possible to access existing subscribers by using / insertion capability, to provide full effect of service protection characteristics, to enable SHP network configuration, and to connect with other SHP network configurations through future connection with Broadband Digital Crosseonnection System (BDCS). There is an effect of facilitating the connection of.

Description

동기식 분기/결합/다중 전송 장치Synchronous Branch / Coupling / Multiple Transmission Devices

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명이 적용되는 환형 망구성도, 제2도는 본 발명에 따른 동기식 분기/결합 다중전송장치의 전체 블럭구성도, 제3도는 본 발명을 설명하기 위한 서비스 보호성 예시도.1 is an annular network diagram to which the present invention is applied, FIG. 2 is an overall block diagram of a synchronous branch / combined multiplex transmission apparatus according to the present invention, and FIG. 3 is a diagram illustrating service protection for explaining the present invention.

Claims (3)

광선로로부터 STM-N 광신호를 수신하여 광/전변환, 클럭 및 신호 재생, 디스크램블링, 리프레이밍, 역다중화, 구간 오버헤드(SOH) 추출 및 처리기능을 수행하고 AUG 신호를 전달하며 AUG 신호를 접속하여 SOH를 생성하고 STM-N프레이밍, 다중화, 스크램블링, 광송신기능을 수행하고, 이중화되어 SOH의 K1,K2 바이트를 이용하여 양방향 1+1 자동보호절체(APS) 방식을 수행하는, 제1,제2망노드 인터페이스수단(1,4) 외부 DS1 선로와 연결되어 최대 63개의 DS1E 신호 또는최대 84개의 DS1N 신호를 수용하여 신호사상 및 다중화하고, 4개의 TUG2 신호를 접속해서 역다중화 및 역사상하여 DS1N과DS1E신호들을 외부 DS1 선로로 전송하거나, 외부 D33 선로와 연결되어 최대 3개의 DS3 신호를 접속하여 사상하고 3개의C32 신호를 받아 양극성 신호로 역사상하여 외부 DS3 선로로 전송하는 종속신호처리수단(6), 상기 종속신호처리수단(6)내의 3개의 저속다중부 쌍으로부터 최대 21개의 TUG21 신호를 접속하거나 3개의 C32 신호를 접속하여 사상 및 다중화하고TU1 단위의 프레임정렬 기능을 수행하고 VC3(VC1) 신호 단위 삽입/경로 스위칭 기능을 수행하여, 상기 제1,제2망노드 인터페이스수단(1,4)으로부터 1개의 AUG 신호를 접속하여 역다중화 및 역사상하고 AU포인터 처리 생성, VC32 신호 생성 처리 및 VC32 POH 생성 처리, VC3(VC1) 분기/스위칭 기능을 수행하고 이중화되어, 1+1 절체방식을 수행하는 제1,제2고속다중수단(2,3), 시스템에 필요한 클럭 및 타이밍을 발생 공급하고, 시스템 클럭 동기원으로서 외부동기타이밍, STM-1 신호또는 종속신호로부터의 추출 타이밍을 이용하며, 내용에 자체 발진기에 의한 자주 발진도 가능하고, 이중화로 1+1 절체방식을 수행하는 시스템 타이밍 발생수단(5), 3개의 프로세서들로 구성되어, 각각 상기 제1,제2망노드 인터페이스수단(1,4)과 시스템 타이밍 발생수단(5)의 제어 및 감시를 포함한 시스템 전체에 대한 제어 및 감시 담당하는 프로세서와 외부 유지보수(OAM) 망과의 데이타통신 기능 처리를 위한 프로세서간 통신은 DPRAM을 이용한 폴링 방식을 이용하고, 운용자를 위한 맨머신인터페이스를 제공하는 시스템제어수단(7)을 구비하는 것을 특징으로 하는 동기식 분기/결합 다중 전송 장치.Receives STM-N optical signals from optical paths, performs optical / pre-conversion, clock and signal regeneration, descrambling, reramming, demultiplexing, section overhead (SOH) extraction and processing, delivers AUG signals, and delivers AUG signals. A first to generate an SOH by accessing, to perform the STM-N framing, multiplexing, scrambling, optical transmission, and duplexed to perform a bidirectional 1 + 1 auto-protection switching (APS) scheme using K1, K2 bytes of SOH Second network node interface means (1,4) connected to an external DS1 line to receive up to 63 DS1E signals or up to 84 DS1N signals, to signal and multiplex, and to demultiplex and history by connecting four TUG2 signals. Dependent system that transmits DS1N and DS1E signals to an external DS1 line or connects up to three DS3 signals connected to an external D33 line, maps up to three DS3 signals, receives three C32 signals, and transmits them to an external DS3 line as bipolar signals. Processing means 6, connecting up to 21 TUG21 signals from three low-speed multiple pairs in the dependent signal processing means 6, or connecting three C32 signals to map and multiplex, and perform a frame alignment function in TU1 units; Performs VC3 (VC1) signal unit insertion / path switching function, connects one AUG signal from the first and second network node interface means (1, 4) to demultiplex and history and generate AU pointer processing, and VC32 signal Generation and VC32 POH generation processing, VC3 (VC1) first and second high speed means (2,3) performing branching / switching functions and being redundant and performing 1 + 1 switching, the clock and timing required for the system The system clock synchronization source uses the external synchronization timing, the extraction timing from the STM-1 signal or the slave signal, and the oscillator can oscillate frequently, and the 1 + 1 switching method is performed by redundancy. doing Stem timing generating means (5), consisting of three processors, respectively for the entire system including control and monitoring of the first and second network node interface means (1, 4) and system timing generating means (5), respectively. Interprocessor communication for processing data communication function between the processor in charge of control and monitoring and external maintenance (OAM) network uses a polling method using DPRAM and provides a man machine interface for the operator (7). Synchronous branch / combined multiplex transmission device comprising: a. 제1항에 있어서, 상기 제1,제2고속다중수단(2,3)은 ; 상기 제1,제2망노드 인터페이스수단(1,3)과 DS1 신호인터페이스 및 신호처리를 하는 상기 종속신호처리수단(6)과 연결되어, AUG 신호 다중 및 역다중을 하고 AU3 포인터 해석및 발생기능을 수행하는 AUG 다중수단(21), 상기 AUG 다중수단(21)에 연결되어 VC32 신호처리 및 POH 처리를 수행하는VC32 신호처리수단(22), 상기 VC32 신호처리수단(22)에 연결되어 VC1 속도 및 위상동기를 수행하는 TU1 프레임 정렬수단(23), 상기 VC32 신호처리수단(22)과 TU1 프레임 정열수단(23)에 연결되어 DS1 신호 분기/삽입 기능을 위해 VC1 결합/분기 스위칭 수단(24), 상기 VC1 결합/분기 스위칭 수단(24)에 연결되어 상기 종속신호처리수단(6)내의 저속신호처리 기능보호하는 DS1 저속신호처리 기능 절체수단(25), 상기 DS1 저속신호처리 기능절체수단(25)에 연결되어 경로 선택신호를 상기 종속신호처리수단(6)으로 출력하는 TU1 경로 선택수단(26)을 구비한 것을 특징으로 하는 동기식 분기/결합 다중 전송장치.The method of claim 1, wherein the first and second high speed multiplexing means (2, 3); Connected to the first and second network node interface means (1,3) and the slave signal processing means (6) for DS1 signal interface and signal processing, and perform AUG signal multiplexing and demultiplexing and AU3 pointer analysis and generation function. VC32 signal processing means 22, which is connected to the AUG multiple means 21 to perform the VC32 signal processing and POH processing, and VC1 signal processing means 22 which is connected to the AUG multiple means 21 for performing the And a TU1 frame alignment means 23 for performing phase synchronization, the VC32 signal processing means 22 and the TU1 frame alignment means 23, and the VC1 coupling / branch switching means 24 for the DS1 signal branching / insertion function. A DS1 low speed signal processing switching unit 25 connected to the VC1 coupling / branch switching unit 24 to protect the low speed signal processing function in the slave signal processing unit 6, and the DS1 low speed signal processing switching unit 25 The path selection signal to the slave signal processing Stage (6) TU1 path synchronous / drop multiplex transmission apparatus characterized by comprising a selection means (26) for output. 제1항에 있어서, 상기 제1,제2고속다중수단(2,3)은 ; 상기 제1, 제2망노드 인터페이스수단(1,3)과 DS3 신호 인터페이스 및 신호처리를 하는 종속신호처리수단(6)에 연결되어, AUG 신호 다중 및 역다중을 하고 AU3 포인터 해석및 발생을 수행하는 AUG 다중수단(27), 상기 AUG 다중수단(27)에 연결되어 DS3 신호 분기/삽입 기능을 수행하는 VC3 삽입/분기 스위칭 수단(27), 상기 VC3 삽입/분기 스위칭 수단(27)에 연결되어 VC32 신호처리 및 POH 처리를 수행하는 VC32 신호처리수단(22)를 구비하는 것을 특징으로 하는 동기식 분기/결합 다중 전송 장치.The method of claim 1, wherein the first and second high speed multiplexing means (2, 3); Connected to the first and second network node interface means (1,3) and slave signal processing means (6) for DS3 signal interface and signal processing, perform AUG signal multiplexing and demultiplexing, and perform AU3 pointer analysis and generation Connected to the AUG multiple means 27, the AUG multiple means 27, the VC3 insertion / branch switching means 27, performing the DS3 signal branch / insert function, and the VC3 insertion / branch switching means 27. And VC32 signal processing means (22) for performing VC32 signal processing and POH processing. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930013964A 1993-07-22 1993-07-22 Synchronous segregation and aggregation multiplexing unit KR950015085B1 (en)

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KR1019930013964A KR950015085B1 (en) 1993-07-22 1993-07-22 Synchronous segregation and aggregation multiplexing unit

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