KR950003995A - Data transmission / reception method using pulse signal count method - Google Patents

Data transmission / reception method using pulse signal count method Download PDF

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Publication number
KR950003995A
KR950003995A KR1019930014668A KR930014668A KR950003995A KR 950003995 A KR950003995 A KR 950003995A KR 1019930014668 A KR1019930014668 A KR 1019930014668A KR 930014668 A KR930014668 A KR 930014668A KR 950003995 A KR950003995 A KR 950003995A
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KR
South Korea
Prior art keywords
data
pulse
recognizing
input
pulse signal
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KR1019930014668A
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Korean (ko)
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KR0138347B1 (en
Inventor
김형남
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김광호
삼성전자 주식회사
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Priority to KR1019930014668A priority Critical patent/KR0138347B1/en
Publication of KR950003995A publication Critical patent/KR950003995A/en
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dc Digital Transmission (AREA)
  • Information Transfer Systems (AREA)

Abstract

이 발명은 펄스 신호 카운트 방식을 이용한 데이타 송. 수신 방법에 관한 것으로 로서 리더펄스와 펄스신호의 갯수로 정보 데이타의 내용이 구분되는 데이타 펄스 및 블랭크 영역의 시리얼 데이타 포맷으로 펄스 신호를 원-라인으로 수신하여 리더 펄스를 인식하고 데이타 펄스 수를 카운트하여 정보 데이타의 내용을 인식하는 방법으로 데이타를 송수신함으로서 종래의 스트로보신호나 클럭 신호용 데이타 라인을 줄일수가 있어서 각 소자의 핀-포트를 절감하여 칩사이즈를 감소시키는 효과와, 고주파의 클럭신호에 의한 노이즈원도 재거하여 동작에러방지와 성능의 향상 시킬수 있어, 하이스피드를 요구되지 않고 정보량이 적은 시리얼 데이타를 송수신하는 경우에 사용하면 더욱 효과적이다.The present invention is a data song using the pulse signal count method. Receiving method, which receives the pulse signal in one-line in the serial data format of data pulse and blank area where the contents of information data are divided by the number of reader pulses and pulse signals, and recognizes the leader pulse and counts the number of data pulses. By transmitting and receiving data in a manner of recognizing the contents of the information data, it is possible to reduce the data line for the conventional strobe signal or clock signal, thereby reducing the pin-port of each device to reduce the chip size and the high frequency clock signal. The noise source can also be removed to prevent operation errors and improve performance. Therefore, it is more effective when high speed is not required and it is used to send and receive serial data with a small amount of information.

Description

펄스신호 카운트 방식을 이용한 데이타 송. 수신방법Data transmission using pulse signal count method. Receiving method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 이 발명에 따른 펄스신호 카운트 방식을 이용하여 원-라인으로 시리얼 데이타 를 송·수신 방법을 나타낸 구성도, 제3도의 (가)는 이 발명에 따른 원-라인 시리얼 데이타 포멧을 나타낸 도면 (나)는 이 발명에 따른 원-라인 시리얼 데이타 포멧에서 데이타 구성을 나타낸 도면, 제4도는 이 발명에 따른 펄스 신호 카운트 방식을 이용한 시리얼 데이타 수신용 플로우차트.2 is a block diagram showing a method of transmitting and receiving serial data in one line using a pulse signal counting method according to the present invention, and FIG. 3A shows a one-line serial data format according to the present invention. (B) shows a data structure in the one-line serial data format according to the present invention, Figure 4 is a flowchart for receiving serial data using the pulse signal count method according to the present invention.

Claims (2)

복수개의 소자간에 리더펄스 영역과 데이타펄스 영역및 블랭크 영역으로 된 시리얼 데이타 포맷의 정보 데이타를 원-라인으로 주고 받는 데이타 송.수신방법에 있어서 입력되는 펄스 신호의 라이징 엣지와 폴링 엣지간의 펄스폭이 소정의 범위내에 있는지를 판단하는 리더펄스 인식 단계와; 상기 인식 단계에서 리더펄스 가 인식된후 일정 듀티의 데이타 펄스가 입력되면 펄스 수를 카운트하여 정보 데이타르리 내용을 인식하여 데이타를 출력시키는 데이타 인식 단계와; 상기 인식 단계에서 리더 펄스가 인식된후 일정 듀티의 펄스신호가 입력되지 않으면 시간을 측정하여 소정의 시간이 경과 여부를 판단하는 블랭크 영역을 인식하는 단계로 시리얼 데이타를 수신하는 펄스신호 카운트방식을 이용한 데이타 송·수신방법.In the data transmission / reception method of transmitting / receiving information data in serial data format including a leader pulse area, a data pulse area, and a blank area between one or more devices in one line, the pulse width between the rising edge and the falling edge of the input pulse signal A leader pulse recognition step of determining whether it is within a predetermined range; A data recognition step of counting the number of pulses, recognizing the contents of information data and outputting data when a data pulse of a predetermined duty is input after the leader pulse is recognized in the recognition step; If a pulse signal of a certain duty is not input after the reader pulse is recognized in the recognition step, a pulse signal counting method for receiving serial data is performed by recognizing a blank area for determining whether a predetermined time has elapsed by measuring time. How to send and receive data. 제1항에 있어서, 상기 데이타 인식 단계는 리더펄스 인식후에 입력되는 일정 듀티의 데이타 펄스의 입력여부를 판단하는 단계와; 입력되는 데이타 펄스를 카운트 하는 단계와; 카운트한 데이타 펄스 수에 따라 정보 데이타의 내용을 인식하여 출력시키는 단계를 포함하는 펄스신호 카운트 방식을 이용한 데이타 송· 수신 방법.The method of claim 1, wherein the recognizing data comprises: determining whether a data pulse of a predetermined duty input after recognizing a leader pulse is input; Counting an input data pulse; A data transmission / reception method using a pulse signal counting method comprising the step of recognizing and outputting the content of information data according to the counted number of data pulses. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930014668A 1993-07-30 1993-07-30 Data transmitting and receiving method using pulse signal count KR0138347B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019930014668A KR0138347B1 (en) 1993-07-30 1993-07-30 Data transmitting and receiving method using pulse signal count

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019930014668A KR0138347B1 (en) 1993-07-30 1993-07-30 Data transmitting and receiving method using pulse signal count

Publications (2)

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KR950003995A true KR950003995A (en) 1995-02-17
KR0138347B1 KR0138347B1 (en) 1998-06-15

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Publication number Priority date Publication date Assignee Title
US7127631B2 (en) 2002-03-28 2006-10-24 Advanced Analogic Technologies, Inc. Single wire serial interface utilizing count of encoded clock pulses with reset

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