KR950003601B1 - Ultrasound imaging signal focusing method and sampling clock generator by pipelined sampled delay focusing - Google Patents

Abstract

The method for performing the dynamic focusing within desired band includes the steps of: a) delayed sampling the analog signal provided from an arrayed converter continuously with an A/D converter; b) storing the converted digital sampling signal into a memory buffer in sequence; c) reading the stored sampling signal in sequence and converting them to the analog signal with a D/A converter; and d) adding and focusing the converted analog sampling signal with an adder.

Description

Focusing Method of Ultrasonic Image Signal by Sampling Delay Using Pipeline and Sampling Clock Generator

1 is a schematic diagram showing the general principle of the ultrasonic imaging apparatus.

2 is an explanatory diagram showing a difference in arrival time of an ultrasonic reflection signal.

3 is a diagram illustrating a focusing method using an L / C passive delay element.

4 is a calculation explanatory diagram of a delay time.

5 is a diagram illustrating a focusing method using a conventional delay-sum method.

6 is a diagram illustrating a focusing method by a sampling-delay-sum method.

7 is a diagram illustrating a focusing method using a pipeline concept of the present invention.

8 is an exemplary hardware configuration using the digital delay element of the present invention.

9 is an exemplary configuration diagram of a sampling clock generator of the present invention.

10 is an explanatory diagram of a calculation of the delay time of a sector scan image.

11 is an explanatory diagram showing characteristics of delay time of a sector scan image.

12 is an exemplary configuration diagram of a sampling clock generator for a sector scan image of the present invention.

13 is an explanatory diagram showing the characteristics of the deflection delay.

14 is a detailed hardware configuration example of a sampling clock generator for a sector scan image of the present invention.

15 is a general explanatory diagram of a secondary sampling method.

16 is an exemplary configuration of an ultrasonic focusing device using the secondary sampling method of the present invention.

17 is an exemplary configuration of an ultrasonic focusing device using a general rectangular sampling method.

18 is a diagram illustrating a configuration in which the modified rectangular sampling method is applied to an ultrasonic focusing apparatus.

19 is an exemplary configuration of an ultrasonic focusing apparatus using the modified rectangular sampling method of the present invention.

* Explanation of symbols for main parts of the drawings

10: array converter 30-3n, 91,155,156: analog / digital converter

40: buffer part 50-5n: switch

60,164,165: adder 63: non-uniform clock generator

92,130,141: FIFO Memory 93: Digital / Analog Converter

100: variable sampling clock generator 101: digital memory

102: memory address 134: deflection delay clock waveform storage memory

143: Register 144: Multiplexer

168,172,173,183,184: Low Pass Filter

170,171,181,182: Modulator

The present invention relates to a method of focusing an ultrasound signal reflected from an object in an ultrasound lmaging system, and in particular, by using a concept of a pipeline, dynamic focusing is performed over an entire section. The present invention relates to a method of focusing an ultrasound image signal by using a piped sampled delay focusing (PSDF) using a pipeline.

In general, ultrasound imaging apparatus using an array transducer is widely used for medical diagnostics, non-destructive testing and water vapor (sonar) function.

The most important characteristic of such an ultrasound imaging apparatus is resolution, and many methods have been developed to improve the resolution, but there are still various problems.

FIG. 1 is a schematic diagram showing a general principle of an ultrasound imaging apparatus. As shown in FIG. 1, a pulse signal is generated from a pulse generator 11 to a transducer element made of piezoelectric material (PZT) through a switch 12. As applied to the configured array converter 10, ultrasonic pulses are generated in the array converter 10, and the generated ultrasonic pulses propagate through the medium, and the discontinuous surface of the object 13 in the propagation medium (if the ultrasonic impedance is different). Is reflected on the array transducer 10, and if there are several interfaces on the object 13, ultrasonic pulses are sequentially reflected according to the distance of the interface to be incident on the array transducer 10 in the order of reflection. do.

In this way, the ultrasonic pulse incident on the array converter 10 is converted into an electrical signal proportional to the intensity of the ultrasonic pulse by the conversion element, and this electrical signal is amplified by the amplifier 14 after passing through the switch 12. After processing in the analog and digital signal processor 15, the cathode ray tube 16 is displayed.

The reason for using the array converter 10 in which the conversion elements are arranged above is to increase the resolution by focusing the ultrasonic pulses. On the other hand, the arrival time of the ultrasonic pulse reflected from the object 13 and incident on the array converter 10 is different depending on the position of each conversion element of the array converter 10 as shown in FIG. That is, the signal reflected at the X point reaches the 0th conversion element faster than the Nth conversion element. Substantial arrival times are made equal by delaying the output signals of all of the conversion elements listed by the difference of these arrival times, and then focused by adding these delayed signals. Although this focusing can be performed at the time of transmission, the reception focusing capable of dynamic focusing becomes important, and the present invention also relates to a reception connection.

3 is a diagram illustrating a focusing method using a conventional L / C passive delay element. As shown in FIG. 3, a signal output from each conversion element of the array converter 10 is amplified by the amplifiers CH1-CHn, and then L, When the delay outputs 21a-21n are inputted to the multiplexers 18a-18n at various ground taps of the passive delay line 17a-17n composed of C, the multiplexer controllers 18a-18n are used again. 19), the delay time value according to the focusing point and the position of each conversion element is selected to be compensated, and then added by the analog adder 20 to focus.

However, this conventional method increases the number of delay taps of a passive delay line, which is an analog delay element, in order to reduce errors in delay compensation. In addition, due to reflection of the signal due to insertion loss and impedance mismatech, the switch noise is large when changing the resistance and delay taps of the dynamic range, and the switching speed of the multiplexer is limited, so the dynamic focus point is limited. The number of is limited so that the resolution is poor.

Another connection method is a phase delay method, which delays carriers of a reflected signal by means of a phase shifter and compensates by delaying the envelope of the reflected signal by an analog delay element. However, this method requires an analog phase shifter and has a drawback that the circuit becomes complicated.

In view of the above-mentioned drawbacks, the present invention provides an SDF (Sampling Delay) that focuses after sampling and delaying instead of a method of focusing and sampling after a delay without using an analog delay element (delay-sum-sampling). By using the focusing method (Sampling-Delay-Synthesis method), dynamic focusing is possible, and the limitations of the SDF method are solved by the Pipelined Sampling Delay Focusing (PSDF) method using the pipeline method. Invented to perform the dynamic focusing in all sections, it will be described in detail with reference to the accompanying drawings as follows.

4 is an explanatory diagram of a calculation of the delay time, in which the signal reflected at the kth imaging point X (k) of the object is delayed time T as shown in Equation 1 below according to the position n of the conversion element. we have _d (k, n).

Where X (k): distance of the kth image point

d: spacing of conversion elements

n: integer corresponding to the array position of the conversion element

V: Ultrasonic Speed

As a result, the delay time T _d (k, n) according to the conversion element is determined by the image point X (k) of the object and the position n of the conversion element. Therefore, in order to improve the resolution of the ultrasound imaging apparatus, the above delay time should be compensated. The result of focusing the delay signal by the conventional delay-sum-sampling method may be expressed by Equation (2) below.

Where f (KT): focused final signal

U _n (O): reflected signal received by the nth conversion element

T: sampling cycle

N: (seconds of conversion element) -1

5 is a diagram illustrating a focusing method based on the delay-sum-sampling method, in which an ultrasonic signal reflected from an image point X (k) of an object is transferred to a conversion element n = 0 on a central axis of the array converter 10. The first received and farther away from the central axis, the later the reflected signal arrives. Therefore, the first signal that reaches the array converter 10 is delayed by the delay element 50c by the time of T _d (k, 0), and then is delayed by the delay element 50b of T _d (k, 1). By the time, and then by the delay element 50a by the time of T _d (k, 2), the signal reflected at one image point X (k) is received by each of the conversion elements of the array converter 10. Sampling after focusing to the adder 20 to compensate for different arrival times. Here, if the maximum delay time of the reflected signal reaching each conversion element of the array converter 10 is smaller than the sampling period T, the above relation compensates the different arrival times by first sampling and delaying the value. You can get the same result.

This new focusing method is the basic concept of SDF. In other words, SDF is a sampling-delay-sum focusing method. It should be noted that sampling and delay actually occur simultaneously.

The sampling-delay-consensus process can be expressed by the following equation (3). In the SDF, the clock 62 for supplying the sample / holder of FIG. ) Is not supplied in common, but instead, a different nonuniform sampling clock is generated by the nonuniform clock generator 63 for each converter.

In this case, the non-uniform sampling clock Sn (t) supplied to each conversion element may be expressed by Equation (4) below in Equation (3).

Sn (t) = δ [t-kT-T _d (k, n)]... … … … … … … … … … … … … … (4)

This means that the sampling clock is generated in consideration of the delay time to be compensated for in each converter. That is, since the signal reflected from the reflection position k reaches the time delayed by T _d (k, n) to each conversion element at t-kT, if the sampling clock is supplied to each sample / holder 61 at this time, all samples The / holder 61 outputs the signal reflected at the k point.

Therefore, by holding these signals and adding them to the analog adder 20, focusing is achieved. However, this method focuses when a reflected signal with a delay greater than the sampling period T overlaps the signal reflected on the next reflecting surface before processing all the sample values of the signal reflected on one reflecting surface. You are limited to not being able to. That is, there is a constraint that the sampling period T should be larger than the maximum delay time.

Especially in the case of a full aperture system that uses many or all of the conversion elements, the reflection signal of the object close to the conversion element has a large delay difference in arrival time according to the position of the conversion element so that focusing is impossible. do.

The present invention solves the limitation by using the concept of a pipeline that buffers time even if the maximum delay time according to the position of the conversion element of the signal reflected from one reflection surface is greater than the sampling period T. It was.

FIG. 7 is an exemplary view of a focusing method using the pipeline concept of the present invention. As shown in FIG. 7, the sampling values output from the respective converters of the array converter 10 by the image point X (1) are buffered. Are stored in the first buffer 41, respectively, and the sampling values of the image points X (m) are stored in the m-th buffer 4m of the buffer unit 40, respectively.

In this way, when the sampling values stored in the buffer unit 40 are selected by the switches 50-5n and the signals reflected at the same image point are added to the adder 60, even if the delay time is large for each sampling period, the buffer capacity is allowed. As long as it does not lose any signal, it can focus. In the present invention, a first-in-first-out (FIFO) memory is used to implement the buffer of FIG. 7, and an A / D converter is used to digitize the signal.

8 is a diagram illustrating a hardware configuration using the digital delay device of the present invention. As shown in FIG. 8, the signal output from each converter of the array converter 10 is converted into a digital signal by the A / D converter 91. Each is sequentially stored and output in the FIFO memory 92, and then added by the adder 60, which is converted into an analog signal by the D / A converter 93, respectively. At this time, the sampling clock 94 supplied to each A / D converter 91 has a non-uniform sampling waveform for each channel in consideration of the focusing delay time, and the non-uniform sampling clock is a variable sampling clock generator (VSCG). 100).

That is, the reflection signal received by the conversion element of the array converter 10 is delayed for focusing by the variable sampling clock 94 and the FIFO memory 92 applied to the A / D converter 91 in consideration of the delay time. After the time is compensated, it is converted into an analog signal in the D / A converter 93 and added and focused in the adder 60. At this time, the digital values converted by the A / D converter 91 are aligned on the output side of the FIFO memory 92 in the order of input by the operation characteristics of the FIFO memory 92 in which the first inputted data is output first. The reflected and received sampling values of the reflected signal received at each conversion element are stored in the same position on the output side of the FIFO memory 92. Therefore, after the maximum delay time has elapsed since the first sampling signal was input, dynamic focus is achieved by simply reading all the FIFO memories 92 simultaneously and adding these output values. At this time, the capacity of the FIFO memory 92 that can input samples generated during the maximum delay time is required, and the output of the FIFO memory 92 is controlled independently of the input. If the sampling frequency is f _s and the maximum delay time is max [T _d (k, n)], the capacity of the required FIFO memory 92 per channel is f _s max [T _d (k, n)].

As described above, signals simultaneously read from the FIFO memory 92 and converted into analog signals by the D / A converter 93 are focused through the adder 60, and envelopes of the focused signals are detected to detect analog and digital signals. It is processed and displayed as the brightness of the screen.

The most important point in realizing FIG. 8 which is an exemplary configuration diagram of the present invention is an efficient design problem of the variable sampling clock generator 100. In the case of configuring this as a general sequential logic circuit, since the circuit becomes very complicated, the present invention has devised a method of using a general memory such as an SRAM or a ROM.

FIG. 9 is an exemplary configuration diagram of the variable sampling clock generator 100 of the present invention. As shown in FIG. 9, the respective conversion elements of the array converter 10 correspond to the respective bits 105 of the digital memory 101. As shown in FIG. After inputting the binary waveform 106 of the variable sampling clock required for focusing, it is simply read and supplied to the A / D converter 91 corresponding to each channel. At this time, when examining the inter-channel binary waveform input to the digital memory 101, it can be seen that the sampling waveform 104 is formed considering the focusing delay. The total capacity M _SCG of the digital memory 101 requiring variable sampling clock generation is n> 0 at the same distance from the center conversion element 133 of the total 2N + 1 conversion elements of the array converter 10. Since the delay time between the upper conversion element 131 and the lower conversion element 132 having n <0 can be the same, the clock corresponding to the upper and lower conversion elements can be shared.

_{M SCG = (N + 1)} · f m · T r (bits) ... … … … … … … … … … … … … … (5)

Here, f _m : master clock frequency of the variable sampling clock generator (100)

T _r : 2 (maximum picture depth) / V

V: Ultrasonic Speed

As described above, a method of variable sampling the received signal from each channel in consideration of delay time, storing the received signal in the FIFO memory 92, and then adding it is called a PSDF (Piplelined Sampling Delay Focusing). It can also be applied to sector scanimaging systems using array transducers.

In the sector scanning method, a phased array is obtained in such a manner that an image is obtained by deflecting at an arbitrary angle 114 as well as a direction 113 perpendicular to the vertical axis 112 of the array converter 10 as shown in FIG. It is mainly used in sector scan imaging apparatus using a transducer. Even in the case of obtaining a sector scan image, to maximize the resolution, ultrasonic waves reflected from all image points on all steering angles should be focused. At this time, the signal reflected from the k-th image point on the arbitrary deflection angle θ _j (100) th scan line 114 is expressed by Equation 6 below according to the position of the conversion element of the array converter 10.

By the cosine law

d: distance between conversion elements

T _d (k, n, j): Difference in delay time between the arrival time from the kth image point to the nth element and the arrival time to the 0th element with a deflection angle of θ _j

R ₀ (k, j): Distance from the 0th conversion element to the point P (k) for deflection angle θ _j

R _n (k, j): Distance from the nth conversion element to the point P (k) for deflection angle θ _j

Approximate delay time expression when R ₀ (k, j) 116 in Equation (7) is sufficiently larger than n · d (117). In this case, the focus delay of the first term expressed irrespective of θ _j. This means that it can be separated by approximating the steering delay of the second term expressed as a function of (focusing delay) and θ _j . However, the exact delay time represented by Equation (6) is different for every deflection angle even for the same k-th image point, and since the symmetry is not established between the upper and lower transform elements, the accurate delay time is expressed as in Equation (6). To compensate in consideration, the total capacity M _SCG of the digital memory 101 of the variable sampling clock generator 100 is required as follows.

_{M MCG = (2J + 1)} · [(2N + 1) · f m · T r] (bits) ... … … … … … … … … (8)

2J + 1: Total number of deflection angles

2N + 1: total number of conversion elements

As an example, the center frequency f ₀ = 3.5 MHz of the ultrasonic pulse, the total deflection angle = 101 (J = 50), the total number of conversion elements = 65 = (N = 32) the maximum depth to obtain an image = 200 mm Is the amount of memory required (when f _m -4 · f ₀ ).

M _SCG = 101 × 64 × 4 × 3.5 × 10 ⁶ × 260 × 10 ^-6 = 23.53 Mbit

Therefore, it is difficult to implement a high-capacity memory of a high speed (less than access time 35nsec) yet commercially. However, as shown in FIG. 11, the approximate total delay time 120 is focused according to the deflection angle 123 θ _j as shown in Equation (7), but the deflection delay time 121 is different but focused irrespective of the deflection angle θ _j . Since the delay time 122 is common, the deflection delay time 121 and the focusing delay time 122 can be compensated for by separating the memory 101 of the variable sampling clock generator 100. (From Fig. 11, the number of conversion elements is labeled as 1 <n <2N + 1 in order to match the following description when numbering conversion elements).

That is, as shown in FIG. 11, the variable sampling clock generator is easy to implement commercially by using the linearity of the deflection delay time 121 and the symmetry of the focusing delay time 122 and separately compensating the two delay times. We have created a way to construct (100). In this method, the variable sampling clock generator 100 first generates a " variable sampling clock for the focusing delay (first term of equation (7)) " (following focus delay clock) only as in the case of the linear scan image. According to each deflection angle, deflection delay (second term of equation (7)) is supplied to each channel to focus the ultrasonic signals reflected at all image points on all deflection angles.

12 is a basic conceptual explanatory diagram of the structure of the sector-injectable variable sampling clock generator 100 according to the present invention. Since the focusing delay time 122 is common to the deflection angles 123, the corresponding focusing delay clock 106 is stored in the focused delay clock waveform storage memory 101 in binary as in the case of FIG. Shows 2N + 1 for the symmetry of focus delay). After reading out the stored focusing clock waveforms 106 and storing them in the FIFO memory 130 for the deflection delay time 121, the deflection delay in the deflection delay clock waveform storage memory 134 in which a delay time is input according to the deflection angle. By reading the clock and applying it to the FIFO memory 130, the stored focus delay clock is delayed and read by the deflection delay time 121 corresponding to the deflection angle 123, and the sampling clock terminal of the A / D converter 91 of each channel is read. Is applied to (94). The capacity of the memory 101 for generating the focused delay clock is expressed by Equation (5) as in the case of the linear scan image, and the FIFO memory 130 used to deflect the focused delay clock is originally converted to 2N. Although required by +1), in the present invention, the number of the FIFO memory 130 is reduced to (N + 1) the number of the FIFO memory 130 by using the characteristics of the FIFO memory 130. The description is as follows.

13 is an explanatory diagram of symmetrical characteristics of deflection delay and focus delay. First, the symmetry of the deflection delay, as shown in FIG. 13a, there are N pairs having the relationship of Equation (9) below in the lower conversion element 132.

T _s (i) + T _s (j) = T _s (N + 1), i + j = N + 2. … … … … … … … … … … … (9)

T _s (i): Deflection delay time of i-th change element

For the pair of lower conversion elements 132, there are two upper conversion elements 131 that satisfy the following equations (9) and (10). In addition, when looking at the symmetry of the focus delay irrespective of deflection, there are N pairs of upper and lower conversion elements having a relationship of the following equation (10) as shown in FIG.

T _s (2n + 2-i) = T _s (i) + 2 · T _s (j), T _s (2n + 2-j) = T _s (j) + 2 · T _s (i)... … (9)

T _f (2N + 2-i) = T _f (i), T _f (2N + 2-j) = T _r (j). … … … … … … … … … 10

T _f (i): Focusing delay time of the i th conversion element

Equations (9) and (10) above show that the deflection delays for the upper conversion elements 131 can be synthesized by the deflection delays of the lower conversion elements 132, so that the FIFO memory 130 for the deflection delay. It can be seen that the number of) can be cut in half.

Unlike in FIG. 12, 2N + 1 is shown, FIG. 14 considering the symmetry characteristic described above with respect to the focus delay clock, the variable sampling clock generator 140 and the FIFO. It is an exemplary configuration diagram of a sector-use sampling clock generator that can supply (N + 1) FIFO memories as deflection delays to (2N + 1) conversion elements by using the characteristics of the memory.

In this figure, only two FIFO memories are shown for convenience (originally N + 1), and the variable sampling clock generator 140 generating the focus delay clock shows only the focus delay for the upper conversion element by using the symmetry characteristic. The ordering degree memory 101 is indicated by 1 to N + 1 in the figure for convenience. In this case, the FIFO memory 130 may be configured using an input pointer (or input clock), an output pointer (or output clock), and a linear memory.

Referring to the operation principle, all the focus delay clocks of the N + 1 channels are first read from the variable sampling clock generator 140 and simultaneously written to the FIFO memories 141 and 142. At this time, the input clock 148 of the FIFO memories 141 and 142 applies f _m to all channels in common, so that the first FIFO memory corresponding to n = 1 channel (not shown in FIG. 14) is the main clock F _m (148). To generate the FIFO output clock from the first cycle, and n = i-th FIFO memory 142 corresponding to the i-channel is read from (d ₁ +1) cycle of the main clock f _m (where d ₁ is i second deflecting delay state to T _s (i), the clock f _m of the period d ₁ = T _s (i) / T _m = T _s (i) · to the nearest integer value of f _m) is the i-th FIFO memory 142 When the output signal of is connected to the input terminal 145 unless the j-th FIFO memory 141 is used, it is recorded in the (d ₁ +1) -th of the FIFO memory 141. When the output terminal 146 corresponding to this input terminal is connected to another input terminal 147 of the j-th FIFO memory 141, the output of the i-th FIFO 142 written in the (dj + 1) -th is output from the j-th FIFO memory ( 141) a clock state of f _m (d ₁ + d _j +1) of the output clock of the second clock cycle ilhyeojyeo the back of the j-th FIFO memory (141), (d ₁ + d _j +1) is written in the second clock state and finally It is read in the output clock period corresponding to (d ₁ + 2d _j +1) th period. After all, this signal is supplied to the (2N + 2-i) th conversion element after the deflection delay corresponding to Equation (9) above. In this way (2N + 1 (one is all A / D converter supplies a sampling clock considering the deflection and the dynamic focus delay in. Claim 14 degrees multiplexer 144 is the sampling clock when the deflection angle changed to θ _j -θ _j in In the above, the method for obtaining the sector scan image by separating and compensating the focusing delay and the deflection delay has been described.

It should be noted that the separation of these two delays is possible only when the depth of the image point is significantly larger than the length of the transducer as described above, so that (R ₀ << n The problem arises of being limited. However, when the time delay equation (6) of the sector scan image is analyzed in detail, a method of solving this problem can be found while maintaining the structure of the sampling clock generator of the present invention as described above.

The approximated time delay equation (7) is a binomial expansion of equation (6) to approximate up to the first equation. If the second term is added, the following equation (11) is obtained.

Equation (12) is an approximation except for the terms including (n · d) ³ and (n · d) ⁴ in equation (11). In practice, the use of the array converter 10 depends on the depth of the image point. By adjusting the number of conversion elements, it can be sufficiently satisfied. Looking at the equation (12) it can be seen that the deflection delay 121 is the same as before, but unlike the equation (7) focusing delay 122 also changes according to all the deflection angle (123). Therefore, the deflection delay 121 and the focusing delay 122 can be separated and compensated, but the deflection delay must be different for every deflection angle 123. This means that the variable sampling clock generator 140 for (N + 1) conversion elements in the sector-injected sampling clock generator created in the present invention (see FIG. 14) is required by half of the total number of deflection angles. This increases the complexity of the circuit.

In practice, however, the delays for deflection and focusing are not compensated exactly as necessary, but have some errors depending on the main clock frequency 106 of the variable sampling clock generator 140. Generally, the tolerance of this delay error is less than 1/8 of the wavelength of the center frequency of the ultrasonic pulse to be used. Therefore, the area of deflection angle that can share the focusing delay (first term of equation (12)) within this tolerance range is divided by simulation.

Therefore, it consists of the sector-injected sampling clock generator (SCG) described above and (N + 1) FIFO memories, and the sampling clock for focus delay compensation supplied to the FIFO memory is divided into variable sampling clock generators (V). _SCG ) is supplied by one V _SCG selected according to the deflection angle.

So far, the structure and design of a system for performing dynamic focusing upon reception in the linear scan image and the sector scan image proposed by the present invention have been described. As described above, signals received at all image points are focused and output at intervals of a sampling period T of Equation (3). In this process, two factors have the biggest influence on the final focusing performance. The first is an error that occurs when the output signals of the FIFO memory 92 corresponding to each conversion element of the array converter 10 are converted into analog signals by the D / A converter 93 and added by the adder 60. This error becomes larger due to various noise components of the D / A converter 93 as the sampling period is faster, thereby degrading the focusing performance and degrading the resolution.

Secondly, since the operating frequency of all circuits must be at least greater than the sampling frequency (f _s = 1 / T), the sampling period is directly related to the complexity and cost of the system and affects its performance.

The best way to solve these two problems is to first lower the sampling frequency and focus using a digital adder if possible. In fact, since the ultrasound image to be finally obtained is the envelope component of the focused signal, the sampling frequency should be larger than the Nyquist rate (f _NYQ ) as shown in Equation (13) below.

f _s > f _NYQ = 2 · (f ₀ + B / 2)... … … … … … … … … … … … … … … … … (13)

Where f _c is the center frequency of the ultrasonic signal

B: Bandwidth of Ultrasonic Signal

In most cases, the above conditions mean that the sampling frequency should be at least three times (3 · f ₀ ) of the center frequency of the ultrasonic signal. Therefore, if the center frequency is 7.5 MHz, Since the operating frequency is 3 × 7.5 = 22.5MHz or more, the frequency is very high, which is a very serious problem. In addition, even if the sampling frequency can be reduced to satisfy, the digital signal processing must be performed in order to detect the envelope from the focused digital signal, and the system for processing this in real time also requires expensive and complicated circuits. In connection with the present invention, a sampling method that requires easy envelope detection and a low sampling frequency is required.

In the present invention, a sampling method for realizing the dynamic focusing of ultrasonic signals using only a digital circuit has been devised. In general, quadrature sampling methods and second-order sampling methods are commonly used to reduce the sampling frequency below the Nyquist rate. However, there are various problems in applying these methods to the ultrasound imaging apparatus.

15 is a general illustration of the second sampling method. Here, it is assumed that the input signal x (t) 150 is represented by the envelope a (t) and the carrier (cos (ω ₀ t + ø) as shown in Equation (14) below.

x (t) = a (t) cos (ω ₀ t + ø) = a (t) cos (2πf ₀ + ø). … … … … (14)

In general, a complex filter is required to detect an envelope from the first sample value x ₁ (kT) 151 and the second sample value x ₂ (kT) 152 of the secondary sampling method, but satisfies certain specific sampling conditions. As shown in FIG. 15, the sample value of the envelope a (kT) is estimated by the root mean square (rms) of the square of the _first sample value x ₁ (kT) and the second sample value x ₂ (kT). ) Can be obtained. In order to be expressed in this way, the following relationship must be satisfied between the sampling period T, the delay time difference α value between the primary sample and the secondary sample, the ultrasonic center frequency f ₀ , and the bandwidth B of the ultrasonic signal.

In this case, the first sampling x ₁ (kT) and the second sample value x ₂ (kT) are expressed as follows.

x ₁ (kT) = (− 1) ^k1 a ₁ (kT)... … … … … … … … … … … … … … … (16a)

x ₂ (kT) = (− 1) ^{1 (km)} a _Q (kt−α)... … … … … … … … … … … … (16b)

Where a ₁ (·): a (t)

a right angle component of _Q (·): a (t)

Therefore, if the bandwidth B of the input signal is sufficiently smaller than the center frequency f ₀ (ie, B << f ₀ ), a _Q (kt-α) is approximately equal to a _Q (kT), as shown in FIG. 15. The estimated envelope can be found by the equation.

a (kT) = [x ₁ ² (kT) + x ₂ ² (kT−α)] ^1/2 . … … … … … … … … (17)

However, in practice, when the ultrasonic signal passes through the attenuation medium such as the human body, the center frequency and the phase change occur according to the depth, so the condition of Equation (15) cannot be satisfied exactly, and thus the estimated envelope cannot be ignored. There is an error. To solve this problem, first look at the exact expression of the first and second order sample values as follows.

x ₁ (kT) = a (kT) cos (ω ₀ kT + ø)

x ₂ (kt-α) = a (kT-α) cos (ω ₀ kT-ω ₀ α + ø)

= a (kT-α) sin (ω ₀ kT + ø)

Here ø = π / 2 + ø-ω ₀ α means the error of the hand that α did not satisfy the above equation (15). In this case, the square of the estimated envelope is expressed by the following equation (17).

Equation (18) means that for any sampling frequency condition, if the condition of α is satisfied satisfactorily and the envelope hardly changes during the time of α, the estimated envelope is almost identical to the actual value. In other words, the components (second and third terms of Eq. (18)) modulated at twice the center frequency as the baseband signals can be ignored. However, even if this condition is not satisfied, only the baseband signal can be obtained as the low pass filter, thereby significantly reducing the estimation error of the envelope.

However, the harmonics generated when sampling the baseband signal component (first term of Eq. (18)) and the signal component modulated in the high band (second third term of Eq. (18)) are the baseband after sampling where the envelope is distributed. The sampling frequency must be determined so that it does not overlap the signal again. This condition is as follows.

f ₀ + B <f _S <2f ₀ -2B (Q> 3)... … … … … … … … … … … … … … (19a)

Ie f _S > 2 (f ₀ + B) = f _NYQ + B... … … … … … … … … … … … … … (19b)

Where f ₀ is the center frequency of the ultrasonic signal, B is the ultrasonic bandwidth, f _NYQ is the Nyquist sampling frequency, and Q = to be.

In summary, the complete digital focusing apparatus using the second sampling method having the structure shown in FIG. 16 can be realized. In this configuration example, the D / A converter 160 does not affect the resolution because the focused signal is input, and the filtered focused analog signal 161 is again sampled 162 for the display 167, and then the same. Square root of 163. However, in FIG. 16 using the second sampling method, the sampling frequency is reduced by half, but the complexity of the system is almost doubled. Therefore, in order to solve these problems, we have devised a structure that uses a rectangular sampling method to reduce the error of the envelope.

17 is an exemplary configuration of an ultrasonic focusing apparatus using a general right angle sampling method. In this figure, N denotes the number of conversion elements and all A / D converters 91 are supplied with the clock generated by the variable sampling clock generator 100 described above. In this structure, however, the sampling frequency can be reduced by twice the bandwidth of the envelope, and modulators 170 and 171 and low pass filters 172 and 173 are required for each converter of the array converter 10, and the circuit of the PSDF portion 175 is also doubled. Increased. In addition, since the focusing of the ultrasonic signal is performed on the envelope signal, the resolution is accompanied by a decrease in resolution, and in order to solve the problem, the addition of a complicated circuit is required. In order to prevent the deterioration of the resolution, it is necessary to take a low pass filter after focusing after modulating in the R.F signal region sampled directly from the conversion element, and FIG. 18 is an exemplary configuration diagram of a device using this method. In this case, it is advantageous to place a modulator (corresponding to 170,171 in FIG. 17) behind the A / D converter 91 and replace it with a digital multiplier 181,182 in the form of a look-up table using digital memory. At this time, since the upper and lower A / D converter blocks (FIG. 17 FIG. 91) operate with the same sampling clock, they can be reduced to one block (FIG. 18 FIG. 91) and finally have the same structure as FIG. As a result, the complexity of the system can be reduced to almost the original level.

However, compared to the structure of FIG. 17, the structure of FIG. 18 changes the positions of the low pass filter (172, 172 of FIG. 17, 181, 182 of FIG. 18) and the A / D converter 91, so that the sampling frequency conditions are different. In other words, in the general quadrature sampling method of FIG. 17, only the signal lowered to the base by the modulators 170 and 171 is selected after the low pass filter 172 and 173, and the sampling frequency is satisfied so that the sampling frequency is satisfied. Since the high-band component is newly generated by modulating again, the sampling frequency must be determined so that the harmonic components due to sampling do not overlap the baseband. This sampling frequency must satisfy the following conditions.

f ₀ + B / 2 <f _S <2f ₀ -B (Q> 1.5) or… … … … … … … … … (21a)

f _S > 2f ₀ + B... … … … … … … … … … … … … … … … … … … (21b)

In FIG. 18, the memory used as the digital multipliers 181 and 182 is connected to an ultrasonic sample signal focused on the address input and an integer k (see FIG. 19), which indicates the order or position of an image point. The pre-calculated result is input to the memory 190 corresponding to the address, thereby performing a modulator function. Here, the low pass filters 183 and 184 can also be constituted by the analog low pass filter of FIG. 19, and the final configuration in this case is the same as that of FIG.

So far, we have proposed a PSDF structure to perform the dynamic focusing required to maximize the resolution in ultrasonic linear scan and sector scan. In terms of practical use, we have proposed an efficient structure and system in terms of system complexity, sampling frequency, and envelope accuracy. The design was described. As described in detail above, the PSDF structure invented in the present invention enables dynamic focusing at all image points that cannot be achieved using a conventional analog delay element. In particular, in the sector scan image, it is possible to obtain the maximum resolution by simultaneously performing the deflection and the dynamic focusing with a relatively uncomplicated circuit configuration.

In addition, it is possible to overcome the increase in complexity and performance of the overall system due to the high sampling frequency, which is the most important problem in the digital focusing method, by the digital focusing method using the secondary sampling and the quadrature sampling method.

In the end, the present invention can overcome the conventional analogue focusing method and perform dynamic focusing to maximize the resolution using digital circuit technology, and since the low-cost, high-speed A / D converter is continuously being developed, its commerciality and digital signal Reliability improvement by the treatment is expected to be greatly expected.

Claims (9)

A method of focusing an ultrasound image signal that is focused by converting an ultrasonic signal reflected from an object into an electrical signal in an array converter composed of several conversion elements, wherein the analog signals output from the conversion elements of the array converter are analog / Continuously delay sampling using a digital converter, sequentially storing the converted digital sampling values in a memory buffer, and sequentially reading the sampling values stored in the memory buffer into an analog signal by a digital / analog converter. And converting the converted analog sampling value into an adder and focusing the converted analog sampling value. The method of claim 1, wherein the delay sampling comprises generating a non-uniform sampling clock signal in consideration of focusing delay using a variable sampling clock generator, and then analog / digital converting a signal output from each conversion element using the sampling clock signal. Focusing method of the ultrasonic image signal by the sampling delay using a pipeline, characterized in that made. The method of claim 2, wherein the non-uniform sampling clock signal is generated by storing a variable period sampling clock waveform in a memory and reading the same from the memory. The ultrasound image of claim 1, wherein the storing comprises sequentially storing sampling values by non-uniform sampling in the FIFO memory using a FIFO memory as a memory buffer. How to focus the signal. In a sector clock image sampling clock generator that generates a sampling clock to deflect signals generated in each channel of the array converter when the sector scan image is acquired by using a phase shift array converter, a non-uniform clock waveform is generated. And a memory address counter configured to supply a memory which is stored in correspondence with a digital discrete signal and a clock which is sequentially increased by driving to a clock having a frequency eight times higher than the center frequency of the conversion element. Variable sampling clock generator, characterized in that configured to generate a non-uniform clock signal by reading the contents. The method of claim 5, wherein a variable clock generator for compensating the focus delay and a variable clock generator for compensating the deflection delay are separately configured, and clock signals output from the variable clock generator for compensating the focus delay are input to the FIFO memory. And generating a clock signal by reading the waveforms input to the FIFO memory using a clock output from the variable clock generator for compensating for the deflection delay. The variable clock generator for focusing compensation according to claim 6, wherein the focusing delay of the vertically symmetrical conversion element is halved using the same symmetry and linearity of deflection delay. And the clock waveforms for the center conversion element and the upper conversion element are deflected using FIFO memory as much as half of the total conversion elements. A method of focusing an ultrasound image signal by sampling delay using a pipeline, wherein two signals having a 90 ° phase relationship of a signal received by each converter are sampled by using two analog / digital converters for each converter. And sequentially storing the sampling values in a separate FIFO memory, concentrating two signals in a 90 ° relationship by sequentially reading the stored sampling values and adding them using two digital adders; Square-adding each of the focused signals and converting them into analog signals by a digital / analog converter; and removing the high-frequency signals by the low pass filter from the converted analog signals and taking the square root to obtain an envelope. Ultrasonic Zero by Sampling Delay Using a Pipeline The focusing method of the signal. A method of focusing an ultrasound image signal that is focused by converting an ultrasonic signal reflected from an object into an electrical signal in an array converter composed of several conversion elements, wherein the analog signals output from the conversion elements of the array converter are analog / Continuously delay sampling using a digital converter, sequentially storing the converted digital sampling values in a memory buffer, sequentially reading the sampling values stored in the memory buffer, adding and concentrating them by a digital adder And multiplying the focused signal by a sinusoidal waveform and a cosine waveform having the same frequency as the center frequency of the conversion element by using two lookup table memories for the digital multiplier, and multiplying the result of the analog signal by a digital / analog converter. Converting to, After removing the high frequency signal by the low pass filter from the converted signal, the in-phase and quadrature components of the focused signal shifted to the baseband are obtained, and then converted into digital signals by analog / digital converter, and the converted signal The method of focusing the ultrasound image signal by sampling delay using a pipeline, characterized in that the step of square each and add and take the square root to obtain an envelope.