KR940027346A - Mutual Interference Suppression Circuit of Double Low Noise Block Converter - Google Patents
Mutual Interference Suppression Circuit of Double Low Noise Block Converter Download PDFInfo
- Publication number
- KR940027346A KR940027346A KR1019930008158A KR930008158A KR940027346A KR 940027346 A KR940027346 A KR 940027346A KR 1019930008158 A KR1019930008158 A KR 1019930008158A KR 930008158 A KR930008158 A KR 930008158A KR 940027346 A KR940027346 A KR 940027346A
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- KR
- South Korea
- Prior art keywords
- mutual interference
- stage
- low noise
- suppression circuit
- interference suppression
- Prior art date
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- Input Circuits Of Receivers And Coupling Of Receivers And Audio Equipment (AREA)
Abstract
본 발명은 더블 LNB에서의 상호 간섭현상을 배제시키기 위한 상호 간섭 억제회로에 관련한다.The present invention relates to a mutual interference suppression circuit for eliminating mutual interference in a double LNB.
기존의 더블 LNB의 경우 수직 및 수평 상호간에 윌킨슨 디바이더를 통한 신호 리키지로 인하여 양질의 IF 신호를 얻을 수 없어 최종 TV 화면의 질이 떨어지고 있다.In the case of the conventional double LNB, the quality of the final TV screen is deteriorated because high quality IF signals cannot be obtained due to signal leakage through the Wilkinson divider between the vertical and the horizontal.
본 발명은 믹서단에 제공되는 OSC단의 출력이 윌킨슨 디바이더로 분할된 후길이의 마이크로스트립의 패턴화에 따른 BPF를 거치도록 설계함으로써, 수직 및 수평 신호간의 상호 간섭현상을 방지하고 있다.In the present invention, after the output of the OSC stage provided to the mixer stage is divided into Wilkinson dividers Designed to pass through the BPF according to the patterning of the length of the microstrip, to prevent mutual interference between the vertical and horizontal signals.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 2 도는 본 발명의 더블 LNB의 시스템의 블럭 구성도, 제 3 도는 본 발명에 따라 기판에 적용된 BPF의 레이 아웃도, 제 4 도는 본 발명에 적용된 BPF의 주파수특성도.2 is a block diagram of a system of a double LNB of the present invention, FIG. 3 is a layout diagram of a BPF applied to a substrate according to the present invention, and FIG. 4 is a frequency characteristic diagram of a BPF applied to the present invention.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930008158A KR940027346A (en) | 1993-05-12 | 1993-05-12 | Mutual Interference Suppression Circuit of Double Low Noise Block Converter |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930008158A KR940027346A (en) | 1993-05-12 | 1993-05-12 | Mutual Interference Suppression Circuit of Double Low Noise Block Converter |
Publications (1)
Publication Number | Publication Date |
---|---|
KR940027346A true KR940027346A (en) | 1994-12-10 |
Family
ID=67137415
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930008158A KR940027346A (en) | 1993-05-12 | 1993-05-12 | Mutual Interference Suppression Circuit of Double Low Noise Block Converter |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR940027346A (en) |
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1993
- 1993-05-12 KR KR1019930008158A patent/KR940027346A/en not_active Application Discontinuation
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