KR940025368A - Memory device for motion compensation - Google Patents
Memory device for motion compensation Download PDFInfo
- Publication number
- KR940025368A KR940025368A KR1019930005962A KR930005962A KR940025368A KR 940025368 A KR940025368 A KR 940025368A KR 1019930005962 A KR1019930005962 A KR 1019930005962A KR 930005962 A KR930005962 A KR 930005962A KR 940025368 A KR940025368 A KR 940025368A
- Authority
- KR
- South Korea
- Prior art keywords
- memory
- slice
- data
- frame
- generating means
- Prior art date
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Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/015—High-definition television systems
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- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Compression Or Coding Systems Of Tv Signals (AREA)
Abstract
본 발명은 프레임관 움직임 보상 예측 부호화가 수행된 영상 신호를 디스플레이시키기 위하여 한 프레임과 3슬라이스 용량의 메모리를 사용하여 움직임을 보상하는 메모리 장치에 관한 것이다. 본 발명에 따른 메모리 장치는 연속적으로 수신되는 영상신호의 화소 데이타 및 움직임 벡터를 이용하여 영상신호의 움직임을 보상하여 디스플레이시키기 위한 것으로, 다수의 슬라이스로 구성된 하나의 영상 프레임 용량의 데이타를 저장하는 프레임 메모리와, 상기 프레임 메모리에 저장된 영상 신호를 디스플레이시키기 위하여 상기 프레임 메모리의 데이타를 판독하는 판독 어드레스를 발생시키는 프레임 메모리 판독 어드레스 발생수단과, 디스플레이를 하기 위하여 판독된 데이타가 입력되며, 적어도 3개의 슬라이스 용량의 데이타를 저장하는 3슬라이스 메모리와, 상기 3슬라이스 메모리로 입력되는 데이타의 어드레스를 발생시키는 3슬라이스 메모리 기록 어드레스 발생 수단과, 상기 움직임 벡터를 이용하여 상기 3슬라이스 메모리에 기록된 데이타를 판독하기 위한 3슬라이스 메모리 판독 어드레스 발생수단과, 상기 3슬라이스 메모리로부터 판독된 데이타와 상기 화소 데이타를 가산하는 수단과, 상기 가산된 데이타를 상기 메모리를 기록하기 위한 상기 프레임 메모리 기록 어드레스 발생 수단을 포함한다.The present invention relates to a memory device for compensating for motion by using one frame and three-slice memory to display an image signal on which frame-tube motion compensation prediction coding is performed. The memory device according to the present invention compensates for and displays a motion of an image signal using pixel data and a motion vector of a continuously received image signal. A memory device stores data of one image frame capacity composed of a plurality of slices. Frame memory read address generating means for generating a memory, a read address for reading data of the frame memory to display an image signal stored in the frame memory, and data read for display are input, and at least three slices A three-slice memory for storing data of capacity; three-slice memory write address generating means for generating an address of data input to the three-slice memory; and recorded in the three-slice memory using the motion vector. Three-slice memory read address generating means for reading out the second data, means for adding the data read out from the three-slice memory and the pixel data, and the frame memory write address generating means for writing the added data to the memory. It includes.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제 1 도는 프레임 구성의 일예를 도시하는 도면, 제 2 도는 본 발명에 따른 움직임 보상을 위한 메모리 장치, 제 3 도는 및 제 4 도는 움직임 보상을 위한 메모리 장치의 타이밍도.1 is a diagram illustrating an example of a frame configuration, FIG. 2 is a timing diagram of a memory device for motion compensation, and FIG. 3 and 4 is a memory device for motion compensation according to the present invention.
Claims (3)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930005962A KR970009665B1 (en) | 1993-04-09 | 1993-04-09 | Memory apparatus for motion compensation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930005962A KR970009665B1 (en) | 1993-04-09 | 1993-04-09 | Memory apparatus for motion compensation |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940025368A true KR940025368A (en) | 1994-11-19 |
KR970009665B1 KR970009665B1 (en) | 1997-06-17 |
Family
ID=19353702
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930005962A KR970009665B1 (en) | 1993-04-09 | 1993-04-09 | Memory apparatus for motion compensation |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR970009665B1 (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100252255B1 (en) * | 1997-04-15 | 2000-04-15 | 윤종용 | A portable electronic system and a method for power management |
KR100489040B1 (en) * | 2000-12-28 | 2005-05-11 | 엘지전자 주식회사 | Method of processing data between frame memory and slice memory and slice memory for motion picture coder/decoder |
US7370218B2 (en) | 2003-06-07 | 2008-05-06 | Samsung Electronics Co., Ltd. | Portable computer power control apparatus and method |
-
1993
- 1993-04-09 KR KR1019930005962A patent/KR970009665B1/en not_active IP Right Cessation
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100252255B1 (en) * | 1997-04-15 | 2000-04-15 | 윤종용 | A portable electronic system and a method for power management |
KR100489040B1 (en) * | 2000-12-28 | 2005-05-11 | 엘지전자 주식회사 | Method of processing data between frame memory and slice memory and slice memory for motion picture coder/decoder |
US7370218B2 (en) | 2003-06-07 | 2008-05-06 | Samsung Electronics Co., Ltd. | Portable computer power control apparatus and method |
Also Published As
Publication number | Publication date |
---|---|
KR970009665B1 (en) | 1997-06-17 |
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