KR940019175A - Stereo / Dual Voice Recognition System - Google Patents
Stereo / Dual Voice Recognition System Download PDFInfo
- Publication number
- KR940019175A KR940019175A KR1019930000589A KR930000589A KR940019175A KR 940019175 A KR940019175 A KR 940019175A KR 1019930000589 A KR1019930000589 A KR 1019930000589A KR 930000589 A KR930000589 A KR 930000589A KR 940019175 A KR940019175 A KR 940019175A
- Authority
- KR
- South Korea
- Prior art keywords
- stereo
- intermediate frequency
- dual
- amplifying
- voltage controlled
- Prior art date
Links
- 230000009977 dual effect Effects 0.000 title claims abstract description 11
- 238000001914 filtration Methods 0.000 claims abstract 4
- 238000001514 detection method Methods 0.000 abstract 1
- 230000010354 integration Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04S—STEREOPHONIC SYSTEMS
- H04S1/00—Two-channel systems
- H04S1/002—Non-adaptive circuits, e.g. manually adjustable or static, for enhancing the sound image or the spatial distribution
-
- G—PHYSICS
- G10—MUSICAL INSTRUMENTS; ACOUSTICS
- G10L—SPEECH ANALYSIS TECHNIQUES OR SPEECH SYNTHESIS; SPEECH RECOGNITION; SPEECH OR VOICE PROCESSING TECHNIQUES; SPEECH OR AUDIO CODING OR DECODING
- G10L19/00—Speech or audio signals analysis-synthesis techniques for redundancy reduction, e.g. in vocoders; Coding or decoding of speech or audio signals, using source filter models or psychoacoustic analysis
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Acoustics & Sound (AREA)
- Computational Linguistics (AREA)
- Health & Medical Sciences (AREA)
- Audiology, Speech & Language Pathology (AREA)
- Human Computer Interaction (AREA)
- Multimedia (AREA)
- Stereo-Broadcasting Methods (AREA)
- Television Receiver Circuits (AREA)
- Amplifiers (AREA)
Abstract
본 발명은 스테레오와 듀얼 음성 신호를 인식하기 위한 스테레오와 듀얼 음성 인식 시스템을 공개한다. 그 시스템은 제1중간 주파수를 증폭하기 위한 제1중간 주파수 증폭수단, 제2중간 주파수를 증폭하기 위한 제2중간 주파수 증폭수단, 상기 제2중간 주파수 증폭수단을 통과한 신호를 대역 통과 필터링하기 위한 대역 통과 필터, 상기 대역 통과 필터를 통과한 신호의 크기를 검출하기 위한 크기 검출 수단, 스테레오와 듀얼 음성에 해당하는 주파수를 발생할 수 있는 전압 제어 발진기, 상기 전압 제어 발진기의 출력신호를 입력하여 저역 통과 필터링을 수행하기 위한 전역 통과 필터, 상기 전압 제어 발진기의 상기 스테레오와 듀얼 음성주파수에 해당하는 기간동안 기준신호 주파수를 계수하여 기준신호 주파수가 특정수로 계수되면 출력신호를 발생하기 위한 계수수단, 상기 계수수단의 출력신호를 입력하여 스테레오와 듀얼 모드를 선택하기 위한 모드 선택수단으로 구성되어 있다. 따라서, 회로를 간략화하여 집적화시에 칩면적을 줄일 수 있으며 동작시에 신뢰성을 향상시킬 수 있다.The present invention discloses a stereo and dual speech recognition system for recognizing stereo and dual speech signals. The system comprises a first intermediate frequency amplifying means for amplifying a first intermediate frequency, a second intermediate frequency amplifying means for amplifying a second intermediate frequency, and for band pass filtering the signal passing through the second intermediate frequency amplifying means. A band pass filter, a magnitude detection means for detecting the magnitude of the signal passing through the band pass filter, a voltage controlled oscillator capable of generating frequencies corresponding to stereo and dual voice, and a low pass by inputting an output signal of the voltage controlled oscillator An all-pass filter for performing filtering, counting means for generating an output signal when the reference signal frequency is counted by a specific number for a period corresponding to the stereo and dual voice frequencies of the voltage controlled oscillator; Mode for selecting stereo and dual mode by inputting output signal of counting means It consists of a selection means. Therefore, the circuit area can be simplified to reduce the chip area at the time of integration and to improve the reliability at the time of operation.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제2도는 본 발명의 스테레오/듀얼 음성 인식시스템의 블럭도를 나타내는 것이다. 제3도는 본 발명의 일실시예의 스테레오/듀얼 음성 인식 회로를 나타내는 것이다. 제4도는 제3도에 나타낸 회로의 각부의 출력을 시뮬레이션 한 결과를 나타내는 것이다.2 shows a block diagram of a stereo / dual speech recognition system of the present invention. 3 shows a stereo / dual speech recognition circuit of an embodiment of the present invention. 4 shows the results of simulating the output of each part of the circuit shown in FIG.
Claims (1)
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930000589A KR960007408B1 (en) | 1993-01-19 | 1993-01-19 | Stereo/dual voice checking system |
JP6004117A JPH06268617A (en) | 1993-01-19 | 1994-01-19 | Stereo/dual voice signal recognition system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019930000589A KR960007408B1 (en) | 1993-01-19 | 1993-01-19 | Stereo/dual voice checking system |
Publications (2)
Publication Number | Publication Date |
---|---|
KR940019175A true KR940019175A (en) | 1994-08-19 |
KR960007408B1 KR960007408B1 (en) | 1996-05-31 |
Family
ID=19349751
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019930000589A KR960007408B1 (en) | 1993-01-19 | 1993-01-19 | Stereo/dual voice checking system |
Country Status (2)
Country | Link |
---|---|
JP (1) | JPH06268617A (en) |
KR (1) | KR960007408B1 (en) |
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1993
- 1993-01-19 KR KR1019930000589A patent/KR960007408B1/en not_active IP Right Cessation
-
1994
- 1994-01-19 JP JP6004117A patent/JPH06268617A/en active Pending
Also Published As
Publication number | Publication date |
---|---|
KR960007408B1 (en) | 1996-05-31 |
JPH06268617A (en) | 1994-09-22 |
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Legal Events
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A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
G160 | Decision to publish patent application | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant | ||
FPAY | Annual fee payment |
Payment date: 20080502 Year of fee payment: 13 |
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LAPS | Lapse due to unpaid annual fee |