KR940012835A - Input signal automatic switching circuit - Google Patents

Input signal automatic switching circuit Download PDF

Info

Publication number
KR940012835A
KR940012835A KR1019920021429A KR920021429A KR940012835A KR 940012835 A KR940012835 A KR 940012835A KR 1019920021429 A KR1019920021429 A KR 1019920021429A KR 920021429 A KR920021429 A KR 920021429A KR 940012835 A KR940012835 A KR 940012835A
Authority
KR
South Korea
Prior art keywords
signal
input
synchronous
synchronization
switching
Prior art date
Application number
KR1019920021429A
Other languages
Korean (ko)
Other versions
KR950001174B1 (en
Inventor
문성학
Original Assignee
이헌조
주식회사 금성사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 이헌조, 주식회사 금성사 filed Critical 이헌조
Priority to KR1019920021429A priority Critical patent/KR950001174B1/en
Publication of KR940012835A publication Critical patent/KR940012835A/en
Application granted granted Critical
Publication of KR950001174B1 publication Critical patent/KR950001174B1/en

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking

Landscapes

  • Synchronizing For Television (AREA)
  • Studio Circuits (AREA)

Abstract

본 발명은 하나 이상의 영상신호가 표시가능한 화상표시장치상에 신호가 에러발생 없이 표시되도록 입력신호에 따라 자동으로 절환할 수 있는 입력 신호자동절한회로에 관한 것이다.The present invention relates to an input signal automatic circuit for automatically switching in accordance with an input signal so that a signal is displayed on the image display apparatus capable of displaying one or more video signals without error.

이 회로는 화상표시장치를 구비한 영상시스템에 있어서; 제1영상신호 (2진코드)와 제2영상신호 (D-Sub)를 입력하는 제1, 2입력단자 (5,15)와, 제1동기신호(2진코드)와 제2동기신호 (D-Sub)를 입력하는 제3, 4입력단자 (25,35)와, 제3, 4입력단자 (25, 35)로 입력되는 동기신호의 유·무를 검출하여 제어신호를 출력하상기 신호검출부 (90)와, 상기 신호검출부 (90)의 출력제어신호에 의해 제3입력단자 (또는 제4입력단자)로 입력되는 동기신호를 선택하여 화상표시장치로 출력하는 동기신호 절환부 (60)와, 신호검출부 (90)의 출력제어신호에 의해 스위칭되어 제1입력단자 (또는 제2입력단자)로 입력되는 영상신호를 상기 동기신호절환부 (60)의 출력동기신호에 동기하여 화상표시장치로 출력하는 영상신호절환부 (100)를 구비함을 특징으로 하여 입력되는 신호에 따라 자동으로 절환이 되도록 하였다.This circuit is provided in an image system having an image display device; First and second input terminals 5 and 15 for inputting a first video signal (binary code) and a second video signal (D-Sub), and a first synchronous signal (binary code) and a second synchronous signal ( D-Sub) to detect the presence or absence of the third and fourth input terminals 25 and 35 and the synchronization signal input to the third and fourth input terminals 25 and 35 to output a control signal. 90), a synchronization signal switching unit 60 which selects a synchronization signal input to the third input terminal (or fourth input terminal) by the output control signal of the signal detection unit 90 and outputs it to the image display device; The image signal switched by the output control signal of the signal detection unit 90 and input to the first input terminal (or the second input terminal) is output to the image display apparatus in synchronization with the output synchronization signal of the synchronization signal switching unit 60. The video signal switching unit 100 is characterized in that the automatic switching according to the input signal.

Description

입력신호 자동절환회로Input signal automatic switching circuit

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제2도는 본 발명에 따른 입력신호 자동절환회로도,2 is an input signal automatic switching circuit diagram according to the present invention;

제3도는 제2도에 따른 일실시예를 도시한 회로도.3 is a circuit diagram showing an embodiment according to FIG.

Claims (8)

제1영상신호 (2진코드)와 제2영상신호 (D-Sub)를 입력하는 제1, 2입력단자 (5,15)와, 제1동기신호 (2진코드)와 제2동기신호 (D-Sub)를 입력하는 제3, 4입력단자 (25,35)와, 상기 제3, 4입력단자 (25,35)로 입력되는 동기신호의 유·무를 검출하여 제어신호를 출력하는 신호검출수단 (90)과, 상기 신호검출부 (90)의 출력제어신호에 의해 상기 제3입력단자 (또는 제4입력단자)로 입력되는 동기신호를 선택하여 화상표시장치로 출력하는 동기신호 절환수단 (60)와, 상기 신호검출부 (90)의 출력제어신호에 의해 스위칭되어 제1입력단자 (또는 제2입력단자)로 입력되는 영상신호를 상기 동기신호절환수단 (60)의 출력동기신호에 동기하여 화상표시장치로 출력하는 영상신호절환수단 (100)를 구비함을 특징으로 하는 입력신호 자동절환회로.First and second input terminals 5 and 15 for inputting a first video signal (binary code) and a second video signal (D-Sub), and a first synchronous signal (binary code) and a second synchronous signal ( D-Sub) to detect the presence or absence of the third and fourth input terminals (25,35) and the synchronization signal input to the third and fourth input terminals (25,35) and to detect a signal for outputting a control signal. Means 90 and a synchronous signal switching means for selecting a synchronous signal input to the third input terminal (or fourth input terminal) according to the output control signal of the signal detection unit 90 and outputting the selected synchronous signal to the image display apparatus (60) And an image signal which is switched by the output control signal of the signal detection unit 90 and input to the first input terminal (or the second input terminal) in synchronization with the output synchronization signal of the synchronization signal switching means 60. And an image signal switching means (100) for outputting to a display device. 제1항에 있어서, 상기 신호검출수단 (90)는, 제3입력단자 (25)로 입력되는 제1동기신호의 유·무를 검출하는 제1동기신호검출수단 (50)과, 제4입력단자 (35)로 입력되는 제2동기신호의 유·무를 검출하는 제2동기신호 검출수단 (51)와, 상기 제1, 2동기신호 검출수단 (50,51)의 출력에 따라 상기 영상신호 절환수단 (100)과 동기신호절환수단 (60)을 제어하는 신호절환제어수단 (80)를 포함함을 특징으로 하는 입력신호 자동절환회로.2. The signal detecting means (90) according to claim 1, wherein said signal detecting means (90) comprises: a first synchronous signal detecting means (50) for detecting the presence or absence of a first synchronous signal input to the third input terminal (25), and a fourth input terminal; The second synchronous signal detecting means 51 for detecting the presence or absence of the second synchronous signal inputted to the 35, and the video signal switching means in accordance with the output of the first and second synchronous signal detecting means 50, 51; And a signal switching control means (80) for controlling the (100) and the synchronization signal switching means (60). 제2항에 있어서, 상기 제1, 2동기 신호검출수단 (50,51)은, 동기신호가 인가되면 정해진 시정수만큼 일정시간 동안 펄수신호를 출력하는 멀티바이브레이터 (10,11)로 구성함을 특징으로 하는 입력신호 자동절환회로.The method of claim 2, wherein the first and second synchronous signal detecting means (50, 51) comprises a multivibrator (10, 11) for outputting a pulse signal for a predetermined time by a predetermined time constant when a synchronization signal is applied. Input signal automatic switching circuit. 제2항에 있어서, 상기 신호절환제어수단은 (80)은, 상기 제1, 2동기신호검출수단 (50,51)에서 펄스신호를 발생하는 동안 동기신호 입력 유·무를 검출하는 제2동기신호 검출수단 (51)와, 상기 제1, 2동기신호 검출수단 (50, 51)의 출력에 따라 상기 영상신호 절환수단 (100)과 동기신호절환수단 (60)을 제어하는 신호절환제어수단 (80)를 포함함을 특징으로 하는 입력신호 자동절환회로.The second synchronous signal according to claim 2, wherein the signal switching control means (80) detects whether or not a synchronous signal is input while generating a pulse signal from the first and second synchronous signal detection means (50, 51). Signal switching control means (80) for controlling the video signal switching means (100) and the synchronous signal switching means (60) in accordance with the detection means (51) and the outputs of the first and second synchronous signal detection means (50, 51). Input signal automatic switching circuit comprising a. 제2항에 있어서, 상기 신호절환제어수단은 (80)은, 상기 제1, 2동기신호검출수단 (50,51)에서 펄스신호를 발생하는 동안 동기신호 입력 유·무를 판별할 수 있는 하이 또는 로우논리제어신호를 출력하는 적분지 (R16, C7 R23, C10)를 포함함을 특징으로 하는 입력신호 자동절환회로.3. The signal switching control means (80) is a high or low signal for determining whether or not a synchronization signal is input while generating a pulse signal from the first and second synchronization signal detection means (50, 51). And an integrating branch (R16, C7 R23, C10) for outputting a low logic control signal. 제4항에 있어서, 상기 신호절환제어수단 (80)은, 상기 제1, 2동기신호검출수단 (50,51)으로 동시에 동기신호가 입력되어 신호를 출력하였을 때 제1동기 신호 및 제1영상신호 선택을 위한 제어신호를 출력함을 특징으로 하는 입력신호 자동절환회로.5. The first synchronization signal and the first image according to claim 4, wherein the signal switching control means (80) is configured to output a signal by simultaneously inputting a synchronization signal to the first and second synchronization signal detection means (50, 51). Input signal automatic switching circuit, characterized in that for outputting a control signal for signal selection. 제1항에 있어서, 상기 영상신호절환수단 (100)는, 제1입력단자 (5)로 입력되는 영상신호를 상기 신호검출수단 (90)의 출력신호에 의해 스위칭되는 제1버퍼 (40)와, 제2입력단자 (15)로 입력되는 영상신호를 상기 신호검출수단 (90)의 출력제어신호에 의해 스위칭되는 제2버퍼 (41)를 포함함을 특징으로 하는 입력신호 자동절환회로.2. The video signal switching means (100) according to claim 1, wherein the video signal switching means (100) comprises: a first buffer (40) which switches the video signal input to the first input terminal (5) by an output signal of the signal detection means (90); And a second buffer (41) for switching the video signal input to the second input terminal (15) by the output control signal of the signal detecting means (90). 제6항에 있어서, 상기 영상신호절환수단은 (100)는, 상기 제1버퍼(40)와 제2버퍼(40)로 인가되는 상기 신호검출수단 (90)의 출력제어신호가 서로 상반되도록 조절하는 영상신호절환제어수단 (70)을 더 포함함을 특징으로 하는 입력신호 자동절환회로.The method of claim 6, wherein the image signal switching means (100) is adjusted so that the output control signal of the signal detection means 90 applied to the first buffer 40 and the second buffer 40 are mutually opposite And an image signal switching control means (70). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920021429A 1992-11-14 1992-11-14 Auto-cutout circuit of input signal KR950001174B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920021429A KR950001174B1 (en) 1992-11-14 1992-11-14 Auto-cutout circuit of input signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920021429A KR950001174B1 (en) 1992-11-14 1992-11-14 Auto-cutout circuit of input signal

Publications (2)

Publication Number Publication Date
KR940012835A true KR940012835A (en) 1994-06-24
KR950001174B1 KR950001174B1 (en) 1995-02-11

Family

ID=19343161

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920021429A KR950001174B1 (en) 1992-11-14 1992-11-14 Auto-cutout circuit of input signal

Country Status (1)

Country Link
KR (1) KR950001174B1 (en)

Also Published As

Publication number Publication date
KR950001174B1 (en) 1995-02-11

Similar Documents

Publication Publication Date Title
KR920014184A (en) Video signal conversion device
KR930004986A (en) VCD subtitle character display device and method
KR920003763A (en) TV receiver
KR940008442A (en) Electronic device displaying menus in different languages
KR920015359A (en) 2 signal simultaneous display circuit and method through screen division
KR940012835A (en) Input signal automatic switching circuit
KR950020516A (en) Multiple caption output device
KR100226145B1 (en) Noise erasing device and its method when image in the liquid crystal display is converted
KR960033098A (en) Aspect Ratio Control Display Device and Method
KR970050439A (en) Subtitle Processing Device of Image Processing System
KR940000361A (en) Display control device of elevator
KR940011056B1 (en) Mis-wiring caution device of multi input a/v
KR950004819A (en) Message display on the phone
KR970078574A (en) Apparatus and method for receiving sensitivity display of caption broadcasting
KR970057251A (en) Television with Message Display
KR930022836A (en) Synchronization Detection Circuit Using Complex Synchronization
KR970056812A (en) Multi-adaptive horizontal size automatic conversion circuit of video display device
KR960028366A (en) Connection discrimination device of input / output terminal of TV for A / V system
KR900004183A (en) On-screen video output mixed circuit
KR910013248A (en) Screen playback method and device
KR970025097A (en) Aspect ratio switching device and method of video signal
KR970019405A (en) Time display control device of no-signal television
KR960020343A (en) Input signal automatic selection device
KR930015750A (en) Mirror image function
KR940013134A (en) Image signal output control device and method

Legal Events

Date Code Title Description
A201 Request for examination
G160 Decision to publish patent application
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
FPAY Annual fee payment

Payment date: 20080118

Year of fee payment: 14

LAPS Lapse due to unpaid annual fee