KR940007076Y1 - Apparatus for muting image signal when tv is turned on - Google Patents
Apparatus for muting image signal when tv is turned on Download PDFInfo
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- KR940007076Y1 KR940007076Y1 KR2019880019422U KR880019422U KR940007076Y1 KR 940007076 Y1 KR940007076 Y1 KR 940007076Y1 KR 2019880019422 U KR2019880019422 U KR 2019880019422U KR 880019422 U KR880019422 U KR 880019422U KR 940007076 Y1 KR940007076 Y1 KR 940007076Y1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
- G09G1/14—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible
- G09G1/16—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
- G09G1/165—Details of a display terminal using a CRT, the details relating to the control arrangement of the display terminal and to the interfaces thereto
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- Engineering & Computer Science (AREA)
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- Remote Sensing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Details Of Television Scanning (AREA)
Abstract
내용 없음.No content.
Description
제1도는 본 고안의 모니터 초기영상 뮤트회로도.1 is a monitor initial image mute circuit diagram of the present invention.
제2도는 종래의 모니터 영상회로도.2 is a conventional monitor video circuit diagram.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
1 : 정류 및 평활부 2 : 지연부1: rectification and smoothing unit 2: delay unit
10 : 캐소우드 구동부 Q1-Q5: 트랜지스터10: cathode driving unit Q 1- Q 5 : transistor
R1-R9: 저항 D1-D3: 다이오드R 1 -R 9 : resistor D 1 -D 3 : diode
ZD : 제너다이오드 C1, C2: 콘덴서ZD: Zener Diode C 1 , C 2 : Condenser
L : 코일L: coil
본 고안은 모니터의 초기영상 뮤트회로에 관한 것으로, 특히 모니터를 초기 작동시킬때 3-4초 동안 화면이 나오지 않도록하여 안정된 화면을 얻기에 적당하도록한 것이다.The present invention relates to the initial image mute circuit of the monitor, and in particular, to prevent the screen from appearing for 3-4 seconds when the monitor is initially operated, it is suitable to obtain a stable screen.
종래에는 제2도에 도시된 바와 같이 전원(Vcc1)의 일측을 저항(R4)을 통하여 트랜지스터(Q1)의 켈렉터에 접속하였고 다른 일측은 코일(L)과 저항(R2)을 통하여 트랜지스터(Q1)의 베이스에 접속하였으며, 이 트랜지스터(Q1)의 컬렉터와 베이스에 저항(R5)을 통하여 CRT캐소우드를 접속함과 아울러 다이오드(D1)(D2)를 통하여는 에미터에 트랜지스터(Q3)와 제너 다이오드(ZD)가 접속된 트랜지스터(Q2)의 켈렉터를 접속하였다.Conventionally, as shown in FIG. 2, one side of the power source Vcc 1 is connected to the selector of the transistor Q 1 through the resistor R 4 , and the other side of the coil L and the resistor R 2 is connected to the selector. also through was connected to the base of the transistor (Q 1), through a resistor (R 5) to the collector and base of the transistor (Q 1) connected to the CRT cathode and addition is via a diode (D 1) (D 2) The selector of transistor Q 2 to which transistor Q 3 and zener diode ZD are connected is connected to the emitter.
또, 이 트랜지스터(Q2)의 베이스에는 저항(R3)과 콘덴서(C)를 통하여 (Vcc2)을 접속하였으며, 상기 트랜지스터(Q1)의 에미터와 트랜지스터(Q3)의 베이스 사이에는 저항(R1)과 영상신호 입력단(S2)을 접속하였다.In addition, (Vcc 2 ) was connected to the base of the transistor Q 2 through the resistor R 3 and the capacitor C, and between the emitter of the transistor Q 1 and the base of the transistor Q 3 . The resistor R 1 and the video signal input terminal S 2 are connected.
이와같이 구성된 종래의 회로에 있어서는 영상신호 입력단(S2)을 통하여 영상신호가 입력되면 이때 트랜지스터(Q2)의 베이스에는 항상 Vcc2의 바이어가 걸려있다) 트랜지스터(Q2) (Q3)가 온됨과 동시에 다이오드(D1)가 도통된다.Thus when the video signal through the video signal input terminal (S 2) input in the conventional circuit configured At this time, the base of the transistor (Q 2) always takes the buyer of Vcc 2) transistor (Q 2) (Q 3) is turned on At the same time, diode D 1 is conducted.
따라서, 트랜지스터(Q1)의 베이스에 로우레벨이 인가되므로 트랜지스(Q1)가 오프되어 CRT 캐소우드에서는 부극성으로 증폭된 신호가 발생된다.Therefore, since the low level is applied to the base of the transistor Q 1 , the transistor Q 1 is turned off to generate a signal amplified with a negative polarity in the CRT cathode.
즉, CRT 캐소우드에서는 영상신호 입력단(S2)으로 영상신호가 입력되는 기간에만 전자가 방출되어 영상이 나오게 된다.That is, in the CRT cathode, electrons are emitted only during the period in which the image signal is input to the image signal input terminal S 2 , so that the image comes out.
만일, 영상신호 입력단(S2)에 영상신호가 없으면 상기와 반대로 동작하여 CRT 캐소우드에서는 Vcc1-VcE01의 전압이 인가되므로 트랜지스터(Q1)의 베이스 하이레벨이 인가되어전자가 방출되지 않는다.If there is no video signal at the video signal input terminal S 2 , the operation is reversed. In the CRT cathode, since the voltage of Vcc 1- Vc E01 is applied, the base high level of the transistor Q 1 is applied so that electrons are not emitted. .
그러나 이와 같은 종래의 회로에 있어서는 영상증폭에는 전혀 문제가 없으나 처음 모니터를 작동시킬때 모든 능동소자들의 직류전원 전압이 안정될때 까지의 동작이 불안하였다.However, in such a conventional circuit, there is no problem in image amplification, but when the monitor is operated for the first time, the operation until the DC power supply voltage of all the active elements is stabilized is unstable.
따라서, 모니터 화면상에는 이러한 과도기간 동안에 불안한 화면이 보이게 됨은 물론 모니터를 오프시킬때에도 마찬가지로 같은 문제가 발생하였다.Therefore, on the monitor screen, an unstable screen is not displayed during this transient period, and the same problem occurs when the monitor is turned off.
본 고안은 이와 같은 종래의 문제점을 감안하여 안출한 것으로 이를 첨부돈 도면 제1도에 의하여 상세히 설명하면 다음과 같다.The present invention has been devised in view of the above-described conventional problems, which will be described in detail with reference to FIG.
제1도는 본 고안의 모니터 초기영상 뮤트회로드로써, 본 광의 모니터 초기영상 뮤트회로는 코일(L), 저항(R7-R10), 트랜지스터 (Q3-Q5), 다이오드(D2-D3), 제너다이오드(ZD) 등으로 이루어져 영상신호가 입력되는 기간동안 전자가 방출되어 영상이 디스플레이 되도록 CRT 캐소우드를 구동하는 캐소우드 구동부(10)와, 다이오드(D1), 콘덴서(C1), 저항(R1-R2), 트랜지스터(Q1) 등으로 이루어져 파워전원 온/오프시에 플라이백 트랜스의 2차측으로 부터 출력된 전압을 정류 및 평활하여 출력하는 정류 및 평활부(1)아, 저항(R3-R6), 트랜지스터(Q2), 콘덴서(C2) 등으로 이루어져 콘덴서(C2) 및 저항(R5)의 시정수 만큼 지연시켜 상기 정류 및 평활부(1)에서 출력된 신호가 상기 캐소우드 구동부에 인가되도록 하여 영상신호가 인가된 상태라도 파워전원이 온/오프되는 순간부터 일정시간 지연후 캐소우드 구동부(10)가 동작되도록 온/오프 파워 전원을 공급하는 지연부(2)를포함하여 구성된다.1 is a monitor initial image mute circuit of the present invention, the monitor initial image mute circuit of the present light includes a coil (L), a resistor (R 7- R 10 ), a transistor (Q 3- Q 5 ), a diode (D 2- ). D 3 ), a zener diode (ZD), etc., the cathode driving unit 10 for driving the CRT cathode so that the electron is emitted and the image is displayed during the input period of the image signal, diode (D 1 ), capacitor (C) 1 ) Rectification and smoothing unit consisting of resistors (R 1- R 2 ), transistors (Q 1 ) to rectify and smooth the voltage output from the secondary side of the flyback transformer at the time of power supply on / off ( 1) Oh, consisting of resistors R 3 -R 6 , transistors Q 2 , capacitors C 2 , and the like, delay the capacitor C 2 and resistor R 5 by the time constants of the rectifying and smoothing unit ( The signal output from 1) is applied to the cathode driving unit so that the power power is turned on even when the image signal is applied. From that moment program after a predetermined time delay so that the cathode driving section 10, the operation is configured to include a delay unit (2) for supplying an on / off power supply.
이와 같이 구성되는 본 고안의 모니터 초기영상 뮤트회로는 다음과 같이 동작한다.The monitor initial image mute circuit of the present invention configured as described above operates as follows.
처음 사용자가 모니터를 작동시키면 플라이백 트랜스의 2차 코일출력단(S1)에서는 플라이백 펄스가 발생하여 정류 및 평활부(1)의 다이오드(D1)와 콘덴서(C1)에 의해 정류 및 평활된후 트랜지스터(Q1)를 온 시킨다.When the user operates the monitor for the first time, a flyback pulse is generated at the secondary coil output terminal S 1 of the flyback transformer, and rectified and smoothed by the diode D 1 and the capacitor C 1 of the rectifying and smoothing unit 1. After that, the transistor Q 1 is turned on.
이에 따라 트랜지스터(Q2)의 베이스에는 로우레벨이 인가되어 트랜지스터(Q2)는 오프되며, 전원전압(Vcc)이 저항(R5)을 거쳐 콘덴서(C2)에 충전된다.Accordingly, the low level is applied to the base of the transistor (Q 2) transistors (Q 2) is off, the charge in the capacitor (C 2) via the supply voltage (Vcc) is a resistance (R 5).
따라서 충전 시정수(R5, C2)만큼 시간이 지나서 트랜지스터(Q4)의 베이스에 전원전압이 인가되므로 트랜지스터(Q4)가 온동작을 하여 영상신호 인가시 CRT 캐소우드가 전자를 방출하여 영상이 디스플레이 되도록 한다.Therefore, since the power voltage is applied to the base of the transistor Q 4 as time passes by the charging time constants R 5 and C 2 , the transistor Q 4 is turned on so that the CRT cathode emits electrons when the image signal is applied. Allow the image to be displayed.
한편, 모니터를 오프시킬때는 상기와 반대로 플라이백 트랜스의 2차 코일출력단(S1)에 플라이백 펄스가 발생하지 않아 트랜지스터(Q1)가 오프되고, 트랜지스터(Q2)도 오프되어 직류전원(Vcc)이 트랜지스터(Q4)의 베이스에 인가되지 않는다.On the other hand, when the monitor is turned off, the flyback pulse does not occur at the secondary coil output terminal S 1 of the flyback transformer so that the transistor Q 1 is turned off, and the transistor Q 2 is turned off, so that the DC power source ( Vcc) is not applied to the base of transistor Q 4 .
그러나 이때 콘덴서(C2)가 충전전압을 방전시키므로 콘덴서(C2)가 방전되는 동안은 트랜지스터(Q4)가 온동작을 하고 콘덴서(C2)의 방전전압이 문턱전압 이하가 되며, 오프동작을 하여 영상을 컷 오프시킨다.But this time, the capacitor (C 2) is because the discharge of the charge voltage the capacitor (C 2) during the discharge, the transistor (Q 4) The discharge voltage is a threshold voltage or less of the whole operation, and a capacitor (C 2), off operation To cut off the image.
이상에서 설명한 바와 같은 본 고안은 모니터를 온시킬때나 오프시킬때 시정수(R5, C2)시간만큼 출력이 지연되어 화면을 온/오프시키므로 과도기간중에 나타나는 화면을 불안을 해소하여 시청자에게는 불안한 화면이 지난 안전된 화면만을 볼수 있게하는 유익한 특징이 있는 것이다.As described above, the present invention delays the output by a time constant (R 5 , C 2 ) time when the monitor is turned on or off, thereby eliminating anxiety for the viewer by eliminating anxiety in the screen that appears during the transient period. An unstable screen has a beneficial feature that allows you to see only the safe screen past.
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Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019880019422U KR940007076Y1 (en) | 1988-11-30 | 1988-11-30 | Apparatus for muting image signal when tv is turned on |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019880019422U KR940007076Y1 (en) | 1988-11-30 | 1988-11-30 | Apparatus for muting image signal when tv is turned on |
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| Publication Number | Publication Date |
|---|---|
| KR900011111U KR900011111U (en) | 1990-06-04 |
| KR940007076Y1 true KR940007076Y1 (en) | 1994-10-13 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019880019422U KR940007076Y1 (en) | 1988-11-30 | 1988-11-30 | Apparatus for muting image signal when tv is turned on |
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| KR (1) | KR940007076Y1 (en) |
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1988
- 1988-11-30 KR KR2019880019422U patent/KR940007076Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
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| KR900011111U (en) | 1990-06-04 |
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