KR940004831Y1 - Trigger circuit of oscilloscope using computer - Google Patents

Abstract

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Description

Oscilloscope trigger circuit using computer

1 is a circuit diagram of the present invention.

* Explanation of symbols for main parts of the drawings

1: central processing unit 2: oscilloscope interface circuit

3: RAM 4: flip-flop circuit

5: comparative amplifier 6: buffer circuit

7: Latch Circuit 8: Reference Voltage Generator

AND: AND circuit INV: Inverter

The present invention relates to a device having an oscilloscope function using a computer, and more particularly, to a trigger circuit of a computer using an oscilloscope with a circuit added to a central processing unit to have a trigger function.

In general, when the oscilloscope device for measuring various waveforms fails to synchronize the voltage and time function, the waveform to be measured may not flow on the screen, and thus, it may be difficult to accurately measure the waveform. .

Therefore, when using an oscilloscope, synchronizing voltage and time function is called trigger function. In the conventional oscilloscope, the trigger pulse can be adjusted according to the measurement object. In this case, many problems have arisen in constructing a circuit capable of acquiring such a trigger function.

Therefore, the present invention has all the control functions in the central processing unit (CPU) of the computer in order to have the oscilloscope trigger function by using a computer, and according to the output data of the OP Amp, the D Flip Flop And the RAM to provide a circuit having a trigger function that can freeze the measurement waveform on the screen when used as an oscilloscope using a computer. Is there.

Hereinafter, described in detail by the accompanying drawings as follows.

In an oscilloscope apparatus using a conventional computer in which an oscilloscope interface circuit 2 having a RAM 3 built in to a central processing unit 1 of a computer as shown in FIG. 1, the ratio of the comparative amplifier 5 A signal to be measured is applied to the inverting terminal (+), and the inverting terminal (-) is connected to the reference voltage generator 8 set from the central processing unit 1, and the output of the comparison amplifier 5 is connected. Applying the latch circuit (7) to the inverter circuit (INV) and the buffer circuit (6) while applying to the clock (ck) terminal of the flip-flop circuit (4) through the inverter (INV) and the buffer circuit (6); At the same time, the reference voltage generator 8 and the latch circuit 7 are connected to the central processing unit (CPU), and the output signals of the latch circuit 7 and the oscilloscope interface circuit 2 are flip-flops through the AND circuit AND. Circuit (4) The Q terminal of the flip-flop circuit 4, which is input to the terminal, is a trigger circuit of an oscilloscope using a computer connected to the RAM 3 embedded in the scope interface circuit 2.

Referring to the operation and effects of the present invention made of the above configuration as follows.

First, after setting the trigger position in the reference voltage generator 8 in the central processing unit 1, a constant signal output from the measurement target for measuring the waveform is input to the comparison amplifier 5.

In this case, the comparison amplifier 5 compares the voltage applied from the reference voltage generator 8, and if it is still different, the address counter of the RAM 3 is cleared and the RAM 3 is the same. To enable the counter.

That is, while the central processing unit 1 has set the proper mode in the reference voltage generating circuit 8 and the latch circuit 7 (the Q terminal output of the flip-flop circuit 4 is " high " The voltage to be measured from the measurement target and the reference voltage generator 8 is input to the comparison amplifier 5 to compare the two voltages. If the results do not match, the output of the comparison amplifier 5 does not change. Since the output of the flip-flop circuit 4 is not changed, the address counter of the RAM 3 is continuously cleared and the level of the reference voltage generator 8 is changed in the central processing unit 1.

Therefore, when the voltage of the measurement target and the voltage output from the reference voltage generator 8 are the same at the appropriate time, the output of the comparison amplifier 5 changes to "high" and flips through the buffer circuit 6 and the inverter INV. The edge signal of the pulse is supplied to the clock terminal of the flop circuit 4 (at this time, the latch circuit 7 adjusts the edge signal).

Therefore, the output signal of the Q terminal of the flip-flop circuit 4 becomes " low ", which releases the RAM 3 from the clear state and makes the counter state enable. Are stored in the RAM 3 in turn by the oscilloscope interface circuit 2.

On the other hand, when the contents of the measurement object are saturated in the RAM 3, the central processing unit 1 is requested to intercept, and the RAM 3 is requested to read the interrupt signal from the oscilloscope interface circuit 2. Is simultaneously applied to one terminal of the central processing unit 1 and the AND circuit AND, and after reading all the data of the RAM 3 from the central processing unit 1, the AND circuit (via the latch circuit 7) AND) outputs a signal.

Therefore, the AND circuit AND presets the flip-flop circuit 4 by the latch circuit 7 and the interrupter signal, thereby stopping the address counter in the RAM 3, thereby transferring data between the computer and the oscilloscope. When the latch circuit 7 is in the ready state in the central processing unit 1, the comparison amplifier 5 returns to the original state in which the signal output from the measurement target and the signal of the reference voltage generator 8 are compared with each other. .

If the signal output from the measurement target and the signal output from the reference voltage generator 8 are consistently the same, the CPU 1 reads the same contents to the RAM 3 so that the data does not change and the waveform does not flow. This allows the computer to perform the oscilloscope's trigger function.

As described above, the present invention provides an oscilloscope by adding a circuit having an oscilloscope trigger function to the central processing unit 1 in a device that has a function of an oscilloscope using a computer. It is intended to be a more complete function as a scope.

Claims (1)

In an oscilloscope device using a conventional computer, in which an oscilloscope interface circuit 2 having a RAM 3 is connected to a central processing unit 1 of a computer, a non-inverting terminal (+) of a comparative amplifier 5 is provided. The signal to be measured is applied and the inverting terminal (-) connects the reference voltage generator 8 set from the central processing unit 1, and the output of the comparison amplifier 5 is connected to the inverter INV and the buffer. The circuit 6 is applied to the clock CK terminal of the flip-flop circuit 4, while the latch circuit 7 is connected to the inverter circuit INV and the buffer circuit 6, and at the same time, the reference voltage generator 8 ) And the latch circuit 7 are connected to the central processing unit (CPU), and output signals of the latch circuit 7 and the oscilloscope interface circuit 2 are connected to the flip-flop circuit 4 through the AND circuit AND. Triggered circuit of a computer using an oscilloscope, characterized in that the input to the terminal and the Q terminal of the flip-flop circuit (4) is connected to the RAM (3) embedded in the scope interface circuit (2).