KR940004473B1 - Power supply control circuit in key-phone system - Google Patents

Abstract

The power supply controller includes a power supply for supplying power to a key phone system, a CPU for sequentially producing an initial power supply control signal by controlling the overall operation of the key phone system, and a power controller for sequentially supplying an initial power to multiple key phones by the initial power supply control signal of the CPU, thereby maximizing the number of subscribers.

Description

Power supply control circuit of key phone system

1 is a conventional circuit diagram.

2 is a circuit diagram according to the present invention.

3 is an operation waveform diagram of each part of FIG.

* Explanation of symbols for main parts of the drawings

10: main unit power supply, 20: central processing unit,

30: power control unit.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply control circuit of a keyphone system, and more particularly, to a power supply control circuit for reducing an instantaneous current (In rush current) during initial power supply.

The power supply of the conventional key-phone telephone is simultaneously supplied from the main power supply unit 10 to the plurality of key-phone telephones K1-Kn as shown in FIG. The plurality of key-phone telephones K1-Kn, which are supplied with power from the main power supply unit 10, rectify the supplied power and use them as their own power sources. At this time, since the rectifier circuits of the plurality of key-phone telephones K1-Kn use a large capacity capacitor, they consume more power than normal during initial power supply. Therefore, since the power supplied from the main power supply unit 10 is limited, if the power supply to the plurality of key-phone telephones (K1-Kn) at the same time, there is a problem that the subscriber acceptance limit is reduced.

Accordingly, an object of the present invention was to provide a power supply control circuit for supplying power to reduce the current flowing instantaneously during initial power supply in a key phone system.

Another object of the present invention is to provide a power supply control circuit that can increase the number of subscribers to the key phone by controlling the initial power supply to the key phone system.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

A main unit power supply unit 10 for supplying power to the key phone system, a central processing unit 20 for controlling the overall operation of the key phone system, and generating initial power supply control signals for the plurality of key phone phones K1-Kn; Input power from the main power supply unit 10 to the power control unit 30 to sequentially supply power to the plurality of key-phone telephone (K1-Kn) by the initial power supply control signal of the central processing unit (20). It is composed.

The component layer power control unit 30 includes a latch circuit 31 for latching a power supply control signal sequentially generated by the central processing unit 20 by a latch enable signal, a capacitor C1, and a resistor R1-1. R2) and transistors Q1-Q2, respectively, and sequentially receive initial power supply control signals latched and output from the latch circuit 31 and switch to supply power to the plurality of key-phone telephones K1-Kn. It consists of the power supply switching part (PC1-PCn) of.

FIG. 3 is a waveform diagram of operating parts of FIG. 2.

One embodiment of the present invention based on the above-described configuration will be described in detail with reference to FIGS.

When the initial power is supplied to the keyphone system, a reset signal in a high state as shown in FIG. 3A (2A) is generated. Is applied to the output of the latch circuit 31 is a high impedance state. As a result, the high state signal output from the latch circuit 31 turns off the transistor Q1 through the resistor R1. When the transistor Q1 is turned off, the transistor Q2 is turned off, so that power is not supplied to the plurality of key-phone telephones K1-Kn. However, when the reset signal as shown in FIG. 3A (2A) transitions to the low state, the latch circuit 31 starts to operate.

At this time, when the central processing unit 20 supplies the power supply control signal as shown in FIG. 3C to the input terminal D1 of the latch circuit 3, the latch circuit 31 is a latch enable terminal. The low signal as shown in FIG. 3 (G) is latched out by the clock signal as shown in FIG. The low signal latched by the latch circuit 31 is applied to the power switching unit PC1. The low signal, which is the latch output, may be unstable at an initial stage. Delay. The low signal delayed by the resistor R1 and the capacitor C1 for a predetermined time turns on the transistor Q1. When the transistor Q1 is turned on, a supply power source Vcc is applied to the transistor Q2 through the resistor R2 to turn on the transistor Q2. When the transistor Q2 is turned on, the power supplied from the main device power supply 10 is applied to the key phone K1. After the power is applied to the keypad phone K1 as described above, the central processing unit 20 generates a power supply control signal in a low state as shown in FIG. D2). Therefore, the latch circuit 31 has a latch enable terminal. The low signal shown in FIG. 3H is latched out by the clock signal shown in FIG. The low signal latched by the latch circuit 31 is applied to the power switching unit PC2.

At this time, since the low signal latched by the latch circuit 31 may be unstable at an initial stage, it is delayed by a time constant time by the resistor R1 and the capacitor C1. The low signal delayed by the predetermined time in the resistor R1 and the capacitor C1 turns on the transistor Q1. When the transistor Q1 is turned on, a supply power source Vcc is applied to the base of the transistor Q2 through the resistor R2 to turn on the transistor Q2. When the transistor Q2 is turned on, the power supplied from the main device power supply unit 10 is applied to the key phone telephone K1-Kn.

In this manner, when the central processing unit 20 sequentially generates a power supply control signal as shown in FIGS. 3E and 2F and supplies it to the power supply control unit 30, the latch circuit 31 is connected to FIG. A low signal such as 2I) (2J) is output. The latch output signal from the latch circuit 31 is applied to the power switching unit PC3-PC4 to sequentially supply the power supplied from the main device power supply unit 10 to the key phone telephones K1-Kn. As described above, power is sequentially supplied to the n key phones, but the power supply method of the remaining key phones K1-Kn is also the same as the above-described operation, and thus will be omitted.

As described above, the number of subscribers can be maximized by sequentially supplying one by one without sequentially supplying the initial power supply to the keyphone system as described above, and there is an advantage in that the current flowing sequentially when the initial power is supplied.

Claims (3)

In the power supply control circuit of a key phone system, the main unit power supply unit 10 for supplying power to the key phone system and the central processing unit for generating the initial power supply control signal sequentially by controlling the overall operation of the key phone system ( 20) and a power control unit which receives power from the main unit power supply unit 10 and sequentially supplies initial power to the plurality of phone phones K1-Kn by the initial power supply control signal of the central processing unit 20 ( 30) circuit. The latch circuit 31 of claim 1, wherein the power control unit 30 latches and outputs an initial power supply control signal sequentially generated by the central processing unit 20 by a latch enable signal. Characterized in that it comprises a plurality of power switching unit (PC1-PCn) for switching to supply power to the plurality of key phones (K1-Kn) by sequentially inputting the initial power supply control signal output from the latch output in (31) Circuit. 3. The power supply of claim 2, wherein the plurality of power switching units PC1 to PCn include delay means for delaying an initial power supply control signal sequentially latched and output from the latch circuit 31, and an initial delay delayed by the delay means. Circuitry, characterized in that it comprises switching means for sequentially switching to supply initial power to a plurality of key-phone telephones (K1-Kn).