KR940003097A - Method of manufacturing thin film transistor - Google Patents

Method of manufacturing thin film transistor Download PDF

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Publication number
KR940003097A
KR940003097A KR1019930012245A KR930012245A KR940003097A KR 940003097 A KR940003097 A KR 940003097A KR 1019930012245 A KR1019930012245 A KR 1019930012245A KR 930012245 A KR930012245 A KR 930012245A KR 940003097 A KR940003097 A KR 940003097A
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KR
South Korea
Prior art keywords
thin film
film transistor
manufacturing
silicon thin
crystal growth
Prior art date
Application number
KR1019930012245A
Other languages
Korean (ko)
Other versions
KR100293263B1 (en
Inventor
다까시 노구찌
Original Assignee
오가 노리오
소니 가부시기가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE4221543A external-priority patent/DE4221543C1/de
Priority claimed from DE4222302A external-priority patent/DE4222302A1/en
Priority claimed from JP18389692A external-priority patent/JP3182893B2/en
Application filed by 오가 노리오, 소니 가부시기가이샤 filed Critical 오가 노리오
Publication of KR940003097A publication Critical patent/KR940003097A/en
Application granted granted Critical
Publication of KR100293263B1 publication Critical patent/KR100293263B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Recrystallisation Techniques (AREA)
  • Thin Film Transistor (AREA)

Abstract

대입경의 다결정실리콘박막을 형성하여 박막트랜지스터를 형성할 경우에 보다 확실히 활성역역내의 막내(膜質)을 균일화하여 트랜지스터의 이동도 μ등의 분균일을 억제하여, 고성능화를 도모한다.In the case of forming a polysilicon thin film having a large particle diameter to form a thin film transistor, the inside of the active area is more uniformly stabilized, and the uniformity of the transistor mobility, such as μ, is suppressed, thereby achieving high performance.

비정질(非晶質) 실리콘박막(2)상의 소정의 위치에 점형의 결정성장핵(5)을 발생시켜서 고상(固相)결정화하여 실리콘박막(13)을 형성하는 박막트랜지스터의 제조방법에 있어서, 결정성장핵(5)을 박막트랜지스터의 활성 영역의 형성되는 영역외의 근방에 형성하여, 고상결정화를 행한다.In the manufacturing method of the thin film transistor which produces | generates the silicon thin film 13 by producing a point-like crystal growth nucleus 5 at the predetermined position on an amorphous silicon thin film 2, and solidifying a phase. The crystal growth nucleus 5 is formed in the vicinity of the region where the active region of the thin film transistor is formed to perform solid phase crystallization.

Description

박막트랜지스터의 제조방법Method of manufacturing thin film transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 박막트랜지스터의 제조방법의 일예의 제조공정도.1 is a manufacturing process diagram of an example of a method of manufacturing a thin film transistor.

제2도는 박막트랜지스터의 제조방법의 일예의 한 제조공정도.2 is a manufacturing process diagram of an example of a method of manufacturing a thin film transistor.

제3도는 박막트랜지스터의 일예의 약선적 확대평면도.3 is an enlarged plan view of an example of a thin film transistor.

Claims (2)

비정질(非晶質)실리콘박막상의 소정의 위치에 정형과 결정성장핵을 발생시켜서 고상(固相)결정화하여 실리콘박막을 형성하는 박막트랜지스터의 제조방법에 있어서, 결정성장핵을 박막트랜지스터의 활성영역의 형성되는 영역외의 근방에 형성하여, 고상결정화를 행하는 것을 특징으로 하는 박막트랜지스터의 제조방법.In the method of manufacturing a thin film transistor in which a silicon thin film is formed by forming solid crystals and crystallization nuclei at a predetermined position on an amorphous silicon thin film to form solid crystals, the crystal growth nuclei are used as active regions of the thin film transistors. A method of manufacturing a thin film transistor, characterized in that it is formed in the vicinity of the region to be formed and solid crystallization is performed. 비정질실리콘박막상의 소정의 위치에 점형의 결정성장핵을 발생시켜서 고상결정화하여 실리콘박막을 형성하는 박막트랜지스터의 제조방법에 있어서, 상기 결정성작핵을 소스영역 또는 드레인영역에 형성하여, 고상결정화를 행하는 것을 특징으로 하는 박막트랜지스터의 제조방법.A thin film transistor manufacturing method of forming a silicon thin film by forming a point-shaped crystal growth nucleus at a predetermined position on an amorphous silicon thin film to form a solid phase crystallization, wherein the crystalline nucleus is formed in a source region or a drain region to perform solid phase crystallization. Method of manufacturing a thin film transistor, characterized in that. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019930012245A 1992-07-01 1993-07-01 Manufacturing Method of Thin Film Transistor KR100293263B1 (en)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
DE4221543A DE4221543C1 (en) 1992-07-01 1992-07-01
DEP4221543.9 1992-07-01
DEP4222302.4 1992-07-08
DE4222302A DE4222302A1 (en) 1992-07-08 1992-07-08 Process for the preparation of 1,4-diaminoanthraquinone-2,3-disulfonic acid and 1,4-diaminoanthraquinone-2,3-dinitrile
JP18389692A JP3182893B2 (en) 1992-07-10 1992-07-10 Method for manufacturing thin film transistor
JP92-183,896 1992-07-10

Publications (2)

Publication Number Publication Date
KR940003097A true KR940003097A (en) 1994-02-19
KR100293263B1 KR100293263B1 (en) 2001-09-17

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019930012245A KR100293263B1 (en) 1992-07-01 1993-07-01 Manufacturing Method of Thin Film Transistor

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KR (1) KR100293263B1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100790059B1 (en) * 1999-10-29 2007-12-31 가부시키가이샤 히타치세이사쿠쇼 Semiconductor device, method of making the same and liquid crystal display device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100790059B1 (en) * 1999-10-29 2007-12-31 가부시키가이샤 히타치세이사쿠쇼 Semiconductor device, method of making the same and liquid crystal display device

Also Published As

Publication number Publication date
KR100293263B1 (en) 2001-09-17

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