KR940001430A - CCD image device - Google Patents

CCD image device Download PDF

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Publication number
KR940001430A
KR940001430A KR1019920010136A KR920010136A KR940001430A KR 940001430 A KR940001430 A KR 940001430A KR 1019920010136 A KR1019920010136 A KR 1019920010136A KR 920010136 A KR920010136 A KR 920010136A KR 940001430 A KR940001430 A KR 940001430A
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KR
South Korea
Prior art keywords
gate electrode
clock signal
ccd image
region
conductive
Prior art date
Application number
KR1019920010136A
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Korean (ko)
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KR100259065B1 (en
Inventor
김용관
Original Assignee
문정환
금성일렉트론 주식회사
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Priority to KR1019920010136A priority Critical patent/KR100259065B1/en
Publication of KR940001430A publication Critical patent/KR940001430A/en
Application granted granted Critical
Publication of KR100259065B1 publication Critical patent/KR100259065B1/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/762—Charge transfer devices
    • H01L29/765—Charge-coupled devices
    • H01L29/768—Charge-coupled devices with field effect produced by an insulated gate
    • H01L29/76833—Buried channel CCD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/148—Charge coupled imagers
    • H01L27/14831—Area CCD imagers

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Electromagnetism (AREA)
  • Transforming Light Signals Into Electric Signals (AREA)
  • Solid State Image Pick-Up Elements (AREA)

Abstract

본 발명은 CCD 영상소자의 수평 전하전송영역(HCCD)에 관한 것으로, BCCD영역에 베리어층의 없이도 포텐셜 단차를 갖도록 한 것이다.The present invention relates to a horizontal charge transfer region (HCCD) of a CCD image device, and has a potential step in the BCCD region without a barrier layer.

즉, 기판 P형 웰의 표면에 BCCD 영역을 형성하고 그 위에 절연막을 사이로 하여 제1게이트전극과 제2게이트전극을 번갈아 복수개 형성하고, 제2게이트전극에는 트랜지스터의 문턱전압 만큼 드롭시킨 클럭신호가 인가되도록 제1게이트전극과 제2게이트전극을 한쌍으로 하여 제1, 제2클럭신호(HΦ1, HΦ2)를 번갈아 인가시킨 것이다.That is, a BCCD region is formed on the surface of the substrate P-type well, and a plurality of first and second gate electrodes are alternately formed with an insulating layer therebetween, and the second gate electrode has a clock signal dropped by the threshold voltage of the transistor. The first and second clock signals HΦ 1 and HΦ 2 are alternately applied by pairing the first gate electrode and the second gate electrode to be applied.

Description

CCD 영상소자CCD image device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제3도는 본 발명의 HCCD 구조 단면도,3 is a cross-sectional view of the HCCD structure of the present invention,

제4도는 본 발명의 수평클럭 신호의 타이밍도 및 그에따라 포탠셜 프로파일.4 is a timing diagram of the horizontal clock signal of the present invention and thus a potential profile.

Claims (2)

CCD 영상소자의 수평 전하전송영역 (HCCD)이 제1도전형 기판에 제2도전형 웰이 형성되고, 제2도전형 웰표면에 제1도전헝 BCCD 영역이 형성되고, 제1도전형 RCCD 영역위에 절연막이 헝성되고 절연막위에 클럭신호가 인가되는 제1게 이트 전극과 제2게 이트전극이 서로 격 리되 어 번갈아 복수개 형 성되어, 제2게 이 트 전극에는 드롭시킨 클럭신호가 인가되도록 제1게이트전극과 제2게이트전극을 한쌍으로 하여 클럭신호(Hφ1, Hφ2)를 번갈아 인가함을 특징으로 하는 CCD 영상소자.The horizontal charge transfer region (HCCD) of the CCD image element is formed with the second conductive well on the first conductive substrate, the first conductive BCCD region is formed on the surface of the second conductive well, and the first conductive RCCD region. The first gate electrode and the second gate electrode to which the insulating film is formed on the insulating film and the clock signal is applied are separated from each other, and a plurality of first and second gate electrodes are separated from each other to form a plurality of first gate electrodes, so that the dropped clock signal is applied to the second gate electrode. And a clock signal (Hφ 1 , Hφ 2 ) is applied alternately by pairing the gate electrode and the second gate electrode. 제1항에 있어서, 제2게이트전극에는 트랜지스터의 문턱전압 만큼 드롭시킨 클럭신호가 인가되도록 함을 특징으로 하는 CCD 영상소자.The CCD image device of claim 1, wherein a clock signal dropped by a threshold voltage of the transistor is applied to the second gate electrode. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920010136A 1992-06-11 1992-06-11 Ccd image device KR100259065B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019920010136A KR100259065B1 (en) 1992-06-11 1992-06-11 Ccd image device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920010136A KR100259065B1 (en) 1992-06-11 1992-06-11 Ccd image device

Publications (2)

Publication Number Publication Date
KR940001430A true KR940001430A (en) 1994-01-11
KR100259065B1 KR100259065B1 (en) 2000-06-15

Family

ID=19334534

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019920010136A KR100259065B1 (en) 1992-06-11 1992-06-11 Ccd image device

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KR (1) KR100259065B1 (en)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5399848A (en) * 1977-02-14 1978-08-31 Murata Manufacturing Co Filter
JPS5580373A (en) * 1978-12-13 1980-06-17 Toshiba Corp Surface shift driving system for charge-transfer element area sensor
JPH0491466A (en) * 1990-08-01 1992-03-24 Sharp Corp Semiconductor storage device

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Publication number Publication date
KR100259065B1 (en) 2000-06-15

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