KR940001295B1 - Fine pattern building method of high temperature super conducting thin film - Google Patents
Fine pattern building method of high temperature super conducting thin film Download PDFInfo
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- KR940001295B1 KR940001295B1 KR1019900017926A KR900017926A KR940001295B1 KR 940001295 B1 KR940001295 B1 KR 940001295B1 KR 1019900017926 A KR1019900017926 A KR 1019900017926A KR 900017926 A KR900017926 A KR 900017926A KR 940001295 B1 KR940001295 B1 KR 940001295B1
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- H10N60/00—Superconducting devices
Abstract
Description
제1도의 (a)~(f)는 본 발명의 제조공정을 나타낸 단면도.(A)-(f) is sectional drawing which showed the manufacturing process of this invention.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
3 : 포토레지스트 4 : 마스크3: photoresist 4: mask
4a : 미세패턴 5 : 란탄늄 알루미네이트 결정박막4a: fine pattern 5: lanthanum aluminate crystal thin film
6 : 고온초전도체 박막6: high temperature superconductor thin film
본 발명은 고온초전도 박막 위에 미세패턴을 형성방법에 관한 것으로 특히 고온초전도체의 특성을 열화(degradation)시키지 않으면서 YBa2Cu3O7-X고온초전도 박막상에 미세패턴을 형성하고자 하는 것이다.The present invention relates to a method of forming a micropattern on a high temperature superconducting thin film, and in particular, to form a micropattern on a YBa 2 Cu 3 O 7-X high temperature superconducting thin film without degrading the characteristics of the high temperature superconductor.
일반적으로 고온초전도체를 마이크로 일렉트로닉스(micro electronics)에 응용하기 위하여, 양질의 박막을 만들고자 하는 연구와 병행하여 미세형상화 연구도 활발히 진행되고 있음은 이미 널리 알려져 왔다.In general, in order to apply high-temperature superconductors to microelectronics, it has been widely known that micro-shaping studies are actively conducted in parallel with researches for making high quality thin films.
그리고 고온초전도체를 반도체 소자에 적용하기 위하여 실리콘(Si)이나 갈륨비소(GaAs)등으로 이루어진 기판 위에 고온초전도 박막을 증착하여야 하고 증착후에는 박막을 결정화(crystallization)시키기 위하여 열처리 공정을 필히 거쳐야만 했다.In order to apply a high temperature superconductor to a semiconductor device, a high temperature superconducting thin film must be deposited on a substrate made of silicon (Si), gallium arsenide (GaAs), etc., and after the deposition, a heat treatment process must be performed to crystallize the thin film.
그러나 이러한 공정을 수행하는 중에 실리콘 기판과 고온초전도 박막 사이에 상호 확산이 생겨나고, 이로 인해 박막은 초전도성의 열화를 피할 수 없게 되었다.However, during this process, interdiffusion occurs between the silicon substrate and the high temperature superconducting thin film, which causes the thin film to inevitably deteriorate superconductivity.
따라서 이를 방지하기 위하여 기판과 고온초전도 박막 사이에 유전체 완충박막(dielectric buffer layer)을 끼워넣은 다층박막을 하게 되었다.Therefore, in order to prevent this, a multilayer thin film in which a dielectric buffer layer is sandwiched between a substrate and a high temperature superconducting thin film is used.
한편, 고온초전도 박막의 소규모 응용을 위해서는 리소그라피 및 식각 (lithography and etching) 공정을 통해 박막 위에 미세패턴을 형성시켜야 하지만, 현재의 반도체 공정들은 고온초전도체에 여러가지 손상을 주게 되어 초전도성을 열화시킨다는 문제점을 안고 있었다.On the other hand, for the small scale application of high temperature superconducting thin film, it is necessary to form a fine pattern on the thin film through lithography and etching process, but the current semiconductor processes cause various damages to the high temperature superconductor and thus deteriorate superconductivity. there was.
이에따라 본 발명은 초전도체의 특성을 열화시키지 않으면서 YBa2Cu3O7-X고온초전도 박막상에 미세패턴을 형성시킬 수 있는 방법을 제공하는 것을 그 목적으로 한다.Accordingly, an object of the present invention is to provide a method for forming a fine pattern on a YBa 2 Cu 3 O 7-X high temperature superconducting thin film without deteriorating the characteristics of the superconductor.
이를 위하여 본 발명은 잘 정립되어 있는 반도체 미세형상화 공정인 포토리소그라피 및 습식식각을 통해, (1) 반도체 기판인 실리콘 웨이퍼(Si-Wafer)위에 원하는 패턴을 형성하는 단계와 (2) 식각된 기판 위에 완충박막을 증착하는 단계와, (3) 상기의 완충박막 위에 YBa2Cu3O7-X고온초전도 박막을 증착하는 단계를 거침으로서 Si의 반도체 기판 위에 증착되어 있는 고온초전도 박막을 직접 식각함에 따른 손상을 막도록 한 것이다.To this end, according to the present invention, a desired pattern is formed on a silicon wafer (Si-Wafer), which is a semiconductor substrate, through photolithography and wet etching, which are well-established semiconductor micro-shaping processes, and (2) on an etched substrate Depositing a buffer thin film, and (3) depositing a YBa 2 Cu 3 O 7-X high temperature superconducting thin film on the buffer thin film, thereby directly etching the high temperature superconducting thin film deposited on a semiconductor substrate of Si. It is to prevent damage.
본 발명을 첨부도면을 의거 상세히 기술하여 보면 다음과 같다.The present invention will be described in detail with reference to the accompanying drawings.
제1도의 (a)도는 산화실리콘막을 형성하는 과정을 나타낸 것으로, 실리콘 기판(1)의 상면에 산소(O2)의 분위기에서 산화실리콘막(2)을 소정의 두께로 형성한 상태를 도시한 것이다.FIG. 1A illustrates a process of forming a silicon oxide film, and illustrates a state in which the silicon oxide film 2 is formed to a predetermined thickness on an upper surface of the silicon substrate 1 in an atmosphere of oxygen (O 2 ). will be.
(b)도는 산화실리콘막(2)에 포토레지스트를 도포하는 과정을 나타낸 것으로, 상기 산화실리콘막(2)의 상면에 100℃ 이하의 온도에서 감광재(AZ1514)를 스핀 코팅하고(Spin Coating) 소프트 베이킹(Soft baking)의 방법으로 열처리를 하여 1μm 두께의 포토레지스트(3)를 형성한 상태를 도시한 것이다.(b) shows a process of applying a photoresist to the silicon oxide film (2), and spin-coated the photosensitive material (AZ1514) at a temperature of 100 ℃ or less on the upper surface of the silicon oxide film (2) The state in which the photoresist 3 having a thickness of 1 μm is formed by heat treatment by a soft baking method.
(c)도는 포토레지스트 패턴을 형성하는 과정을 나타낸 것으로, 미세패턴(4a)이 형성된 마스크(4)를 통하여 빛을 조사하여 노광시키면서 상기 포토레지스트(3)에 소정의 패턴(3a)을 형성하고 그외의 포토레지스트를 현상액으로 현상하여 제거한 상태를 나타낸 것이다.(c) shows a process of forming a photoresist pattern, and a predetermined pattern 3a is formed in the photoresist 3 while exposing light through the mask 4 on which the micropattern 4a is formed. The other photoresist was developed with a developer and removed.
(d)도는 산화실리콘막 패턴을 형성하는 과정을 나타낸 것으로 상기 포토레지스트 패턴(3a)을 열처리(hard-baking)를 하고 BOE액(buffer oxide etching solution)으로 산화실리콘막(2)의 산화실리콘막 패턴(2a)을 제외한 부분을 제거한 다음에 KOH액(photassium hydroxide solution)으로 형상화된 상기의 포토레지스트 패턴(3a)을 제외한 나머지의 실리콘 기판(1)을 3μm 깊이까지 식각하고 유기용매를 이용하여 남아있는 포토레지스트 레지스트 패턴(3a)와 산화실리콘막 패턴(2a)을 제거한 상태를 도시한 것이다.(d) shows a process of forming a silicon oxide film pattern. The silicon oxide film of the silicon oxide film 2 is subjected to a hard-baking of the photoresist pattern 3a and a buffer oxide etching solution. After removing the portion except for the pattern 2a, the remaining silicon substrate 1 except the photoresist pattern 3a formed of KOH solution (photassium hydroxide solution) was etched to a depth of 3 μm and remained using an organic solvent. The state in which the photoresist resist pattern 3a and the silicon oxide film pattern 2a are removed is shown.
여기서 상기의 습각식각 방법이 아닌 건식식각 방법을 이용한 경우에는 산화실리콘막(2)을 사용하지 않고 실리콘 기판(1) 상면에 포토레지스트(2)를 코팅하고 앞에 기술한 것과 동일한 방법으로 포토레지스트 패턴을 형성하고, RIE(Reactiv Ion Etching)방법으로 실리콘 기판(1)을 3μm 두께의 깊이로 식각하고 아세톤과 플라즈마 식각장비(Plasma etching)로 포토레지스트를 제거함으로써 실리콘 기판 위에 요철형태의 패턴을 형성한 상태를 도시한 것이다.In the case of using the dry etching method instead of the wet etching method, the photoresist pattern is coated on the upper surface of the silicon substrate 1 without using the silicon oxide film 2, and the photoresist pattern is formed in the same manner as described above. The silicon substrate 1 was etched to a depth of 3 μm by RIE (Reactiv Ion Etching) method, and photoresist was formed on the silicon substrate by removing photoresist with acetone and plasma etching. The state is shown.
(e)도는 고온초전도 박막을 증착하는 상태를 나타낸 것으로, 실리콘 기판(1)과 이 기판의 요철 상면(1a)에 0.4~0.5μm 란탄늄 알루미네이트(LaAlo3)를 증착하고 열처리하므로써 균질하고 균열(crack)이 없는 란탄늄 알루미네이트 결정박막(5)을 형성한 상태를 도시한 것이다.(e) shows the state of depositing a high temperature superconducting thin film, which is homogeneous and cracked by depositing and heat-treating 0.4-0.5 μm lanthanum aluminate (LaAlo 3 ) on the silicon substrate 1 and the uneven upper surface 1a of the substrate. The state in which the lanthanum aluminate crystal thin film 5 which does not have a crack is formed is shown.
(f)도는 고온초전도 박막에 미세패턴을 형성하는 과정을 나타낸 것으로, 완충박막인 란탄늄 알루미네이트 결정박막(5)이 입혀진 실리콘 기판(1) 상면에 Y-Ba-Cu-O계 고온초전도 박막을 고주파(Radio Frequency) 마그네트론 스퍼터링 (magnetron sputtering)방법으로 YBa2Cu3O7-X고온초전도 박막을 증착하고 전술된 것과 같은 방법으로 열처리 하면 고온초전도 박막(6)의 결정이 실리콘 기판(1)의 요철에 따라 배열되어 고온초전도체 미세패턴(6)이 형성된다.(f) shows a process of forming a fine pattern on the high-temperature superconducting thin film, Y-Ba-Cu-O-based high-temperature superconducting thin film on the upper surface of the silicon substrate (1) coated with a lanthanum aluminate crystal thin film (5) When the YBa 2 Cu 3 O 7-X high temperature superconducting thin film is deposited by a radio frequency magnetron sputtering method and heat-treated in the same manner as described above, the crystals of the high temperature superconducting thin film 6 become silicon substrates (1). The high temperature superconductor micropattern 6 is formed by being arranged in accordance with the irregularities of.
이 과정에서 식각된 벽면(lateral-wall)에 얇은층의 란탄늄 알루미네이트 결정박막(5)등의 완충박막 물질과 고온초전도체(Y-Ba-Cu-O계)가 증착되지만, 결정화를 위해 열처리 하면 상호 확산으로 인하여 벽면의 증착된 물질들은 기판속으로 들어가게 된다.In this process, a buffer thin film material such as a thin lanthanum aluminate crystal thin film 5 and a high temperature superconductor (Y-Ba-Cu-O type) are deposited on the etched lateral-wall, but the heat treatment is performed for crystallization. Due to the interdiffusion, the deposited materials on the wall enter the substrate.
일반적인 반도체 공정을 통해 직접 식각하였을 경우에 비하여, 생성되는 결함이 매우 적고 이러한 공정에서 형성되는 미세선폭은 실리콘 기판의 식각 깊이에 크게 의존한다.Compared to the case of direct etching through a general semiconductor process, defects are generated very little and the fine line width formed in such a process is highly dependent on the etching depth of the silicon substrate.
따라서 본 발명에 의해 고온초전도 박막상에 미세패턴을 형성할 경우 실리콘 기판의 식각과정에서 화학적 습식식각(Chemical Wet etching)이 아닌 건식식각을 사용하면 더욱 가늘고 잘 제어된 선폭을 깊이 식각할 수 있으며 따라서 더욱 선명하고 결함이 적은 고온초전도체 미세패턴을 형성시킬 수 있다.Therefore, when the micropattern is formed on the high temperature superconducting thin film according to the present invention, the use of dry etching instead of chemical wet etching in the etching process of the silicon substrate enables the deeper and more well controlled line width to be etched. It is possible to form a high temperature superconductor micropattern with sharper and less defects.
그리고 매우 용이하게 실리콘 기판상에 식각패턴을 바꿀수 있으며 결합(impefection)이 적은 고온초전도체 미세패턴을 형성하므로써 매우 작은 반도체-초전도체 혼성소자(Hybrid devices)를 만들 수 있다.In addition, very small semiconductor-superconductor hybrid devices can be made by forming the high-temperature superconductor micropattern with low coupling, which can easily change the etching pattern on the silicon substrate.
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