KR930020344A - Integrated circuit for driving image display device - Google Patents

Integrated circuit for driving image display device Download PDF

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Publication number
KR930020344A
KR930020344A KR1019920004437A KR920004437A KR930020344A KR 930020344 A KR930020344 A KR 930020344A KR 1019920004437 A KR1019920004437 A KR 1019920004437A KR 920004437 A KR920004437 A KR 920004437A KR 930020344 A KR930020344 A KR 930020344A
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KR
South Korea
Prior art keywords
circuit
hold
signal
sample
control signal
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KR1019920004437A
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Korean (ko)
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KR940008712B1 (en
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김은구
김영식
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김광호
삼성전자 주식회사
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

액정표시장치 구동용 집적회로는 시스템의 외부신호인 개시펄스(ST) 및 클럭펄스(CP)에 따라 컨트롤되는 영상표시장치(LCD) 구동회로에 있어서, 상기 LCD 장치 구동회로는 디지탈 데이타를 출력하는 데이타 래치회로와, 상기 데이타 래치회로에서 래치된 디지탈 데이타 출력을 디코딩하기 위한 N비트 디코더와, 그리고 상기 N비트 디코더에서 디코딩된 디지탈 데이타 출력값과 게이트 인가전압단자(V1∼Vn)에서 인가되는 게이트 선택전압값에 따라 세그먼트 구동출력을 발생하는 전압선택 스위칭회로와를 샘플 앤드 홀드/OP 앰프회로를 채용한 세그먼트 구동회로로 집적화하여 각종 패널 장치를 간단하고 용이하게 구동시킬 수 있다.An integrated circuit for driving a liquid crystal display device is an image display device (LCD) driving circuit controlled according to a start pulse (ST) and a clock pulse (CP), which are external signals of a system, wherein the LCD device driving circuit outputs digital data. A data latch circuit, an N-bit decoder for decoding the digital data output latched by the data latch circuit, and a digital data output value decoded by the N-bit decoder and gate selection applied from the gate applied voltage terminals V1 to Vn. Various panel devices can be driven simply and easily by integrating the voltage selection switching circuit which generates the segment drive output according to the voltage value into the segment drive circuit employing the sample and hold / OP amplifier circuit.

Description

영상표시장치 구동용 집적회로Integrated circuit for driving image display device

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 이발명에 따른 영상표시장치 구동용 집적회로의 일시예를 나타내는 블럭도.1 is a block diagram showing an example of an integrated circuit for driving an image display apparatus according to the present invention.

제2도는 제1도의 영상표시장치 구동용 집적회로의 블럭도중 샘플 엔드 홀드/OP 앰프회로의 상세회로도.FIG. 2 is a detailed circuit diagram of a sample end hold / OP amplifier circuit in the block diagram of the integrated circuit for driving the image display device of FIG.

제3도는 이 발명에 따른 영상표시장치 구동용 집적회로를 도시한 계통도.3 is a schematic diagram showing an integrated circuit for driving an image display device according to the present invention.

제4도는 (a)∼(i)는 제1도 ∼ 제3도의 영상표시장치 구동용 집적회로의 각 블럭도에 따른 타이밍 챠트도.4A to 4I are timing charts according to the respective block diagrams of the integrated circuit for driving the video display device shown in FIGS.

Claims (6)

개시펄스신호, 클럭펄스신호 및 샘플 앤드 홀드 제어신호의 입력에 따라 내부 제어신호를 발생하는 컨트롤회로와; 상기 컨트롤회로의 내부 제어신호 및 동기 클럭펄스를 입력으로 하여 메모리 내부에 저장된 2진 데이타정보를 우측 혹은 좌측으로 자리를 이동을 시키는 쉬프트 래지스터와; N비트 이미지 데이타를 입력으로 하여 데이타 변환을 실행하는 D/A 컨버터와; 그리고 상기 컨트롤회로에서 동기된 샘플 앤드 홀드 제어신호와 상기 쉬프트 레지스터에서 쉬프트된 출력신호와 상기 D/A 컨버터에서 테이타 변환된 N비트 데이타 신호들을 입력으로하여 블럭단위로 조합된 LCD 장치의 구동출력을 발생시키는 샘플 앤드 홀드/OP앰프회로와를 구비하여 원칩화함을 특징으로 하는 영상표시장치 구동용 집적회로.A control circuit for generating an internal control signal in response to input of a start pulse signal, a clock pulse signal, and a sample and hold control signal; A shift register for inputting the internal control signal and the synchronous clock pulse of the control circuit to shift the binary data information stored in the memory to the right or left; A D / A converter for performing data conversion by inputting N-bit image data; And a drive output of the LCD device combined in units of blocks by inputting the sample and hold control signal synchronized in the control circuit, the output signal shifted in the shift register and the N-bit data signals converted in the D / A converter. An integrated circuit for driving an image display device, comprising: a sample and hold / OP amplifier circuit for generating a chip. 제 1항에 있어서, 상기 샘플 앤드 홀드/OP앰프회로는 적어도 하나 이상의 인버터가 각각 게이트 단자에 양방향으로 공통접속되어 스위칭 모드동작을 하도록 하는 상보형 모스트랜지스터와, 상기 상보형 모스트랜지스터의 게이트 공통단자에 쉬프트 출력신호 및 샘플링 제언호를 로직화된 신호를 인가하기 위한 적어도 하나 이상의 인버터들을 포함하는 두개의 노어게이트와, 홀드제어신호에 따라 두개의 콘덴서를 통과한 샘플링된 신호를 홀드하기 위한 상보형 모스트랜지스터들과, 상기 상보형 모스트랜지스터들의 일방향성 게이트 단자에 각각 홀드제어신호를 인가하기 위한 또다른 인버터들과, 그리고 상기 쉬프트 출력신호, 샘플링 제어신호 및 홀드제어신호에 따라 영상 전압값으로 샘플링시간 홀드하고 샘플된 비디오 데이타 신호를 완층증폭하여 다수개의 LCD 구동출력단으로 출력하는 OP 앰프회로와를 포함하여 구성함을 특징으로 하는 영상표시장치 구동용 집적회로.The complementary MOS transistor of claim 1, wherein the sample and hold / OP amplifier circuit comprises: a complementary MOS transistor for allowing at least one inverter to be commonly connected to the gate terminal in both directions to perform a switching mode operation; Two NOR gates including at least one inverter for applying a logic signal to the shift output signal and a sampling suggestion signal, and a complementary type for holding the sampled signals passed through the two capacitors according to the hold control signal. MOS transistors, other inverters for applying a hold control signal to one-way gate terminals of the complementary MOS transistors, and sampling the image voltage value according to the shift output signal, the sampling control signal, and the hold control signal. Time hold and fully amplify the sampled video data signal A plurality of OP amplifier circuit that outputs the LCD driving output and the video display device driving integrated circuit, characterized in that comprises a. 제2항에 있어서, 상기 샘플 앤드 홀드/OP 앰프회로는 순차적으로 n비트수에 적합한 n단의 샘플 앤드 홀드/OP 앰프회로들로 데이지체인 구조로 구성됨을 특징으로 하는 영상표시장치 구동용 집적회로.3. The integrated circuit for driving an image display device according to claim 2, wherein the sample and hold / OP amplifier circuit has a daisy chain structure with n stage sample and hold / OP amplifier circuits suitable for the number of n bits. . 시스템의 외부신호인 개시펄스신호, 클럭펼스신호 및 샘플 앤드 홀드 제어신호에 따라 동기된 제어신호를 발생하는 컨트롤회로와, 상기 컨트롤회로의 동기된 제어신호에 따라 개시 동기데이터를 출력하는 쉬프트 레지스터와, 상기 쉬프트 레지스터의 출력신호와 상기 컨트롤회로의 동일한 제어신호에 따라 LCD 장치의 구동출력을 발생하기 위한 샘플 또는 홀드/OP 앰프회로와, 그리고 상기 샘플 앤드 홀드/OP 앰프회로에 N비트의 이미지 데이타 신호를 인가시켜 주기 위한 D/A컨버터(10)와로 구성됨을 특징으로 하는 영상표시장치 구동용 집적회로.A control circuit for generating a control signal synchronized with a start pulse signal, a clock spread signal, and a sample and hold control signal, which are external signals of the system, a shift register for outputting start synchronization data according to the control signal of the control circuit; A sample or hold / OP amplifier circuit for generating a drive output of the LCD device according to the output signal of the shift register and the same control signal of the control circuit, and N-bit image data in the sample and hold / OP amplifier circuit; And a D / A converter (10) for applying a signal. 매트릭스형태로 배열된 LCD 채널장치에 개개의 어레이소자를 선택하기 위한 N개의 게이트의 행 구동회로와 N개의 게이트의 열 구동회로를 병렬로 접속하고, 상기 행 및 열 구동회로의 각각에 동기제어신호 및 클럭펄스신호를 인가하기 위한 동기제어회로를 접속하여 구비함을 특징으로 하는 영상표시장치 구동용 집적회로.A row driving circuit of N gates and a column driving circuit of N gates are connected in parallel to an LCD channel device arranged in a matrix form, and a synchronous control signal is provided to each of the row and column driving circuits. And a synchronous control circuit for applying a clock pulse signal to the video display device driving integrated circuit. 제 5항에 있어서, 상기 열 구동회로는 샘플 앤드 홀드/OP 앰프회로로 고집적화 되어 N비트의 동기된 비디오테이타를 출력함을 특징으로 하는 영상표시장치 구동용 집적회로.6. The integrated circuit for driving a video display device according to claim 5, wherein the column driving circuit is highly integrated with a sample and hold / OP amplifier circuit to output N bits of synchronized video data. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019920004437A 1992-03-18 1992-03-18 Ic circuit for driving type in image display device KR940008712B1 (en)

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KR1019920004437A KR940008712B1 (en) 1992-03-18 1992-03-18 Ic circuit for driving type in image display device

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KR930020344A true KR930020344A (en) 1993-10-19
KR940008712B1 KR940008712B1 (en) 1994-09-26

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100556455B1 (en) * 1998-09-26 2006-05-25 엘지전자 주식회사 gate driving circuit of TFT-LCD

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101970181B1 (en) * 2018-10-23 2019-04-18 비즈 주식회사 Swing monitoring golf club apparatus and method of providing golf swing correction information using the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100556455B1 (en) * 1998-09-26 2006-05-25 엘지전자 주식회사 gate driving circuit of TFT-LCD

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