KR930014473A - Image Quality Compensation Circuit of Video Cassette Recorder - Google Patents

Image Quality Compensation Circuit of Video Cassette Recorder Download PDF

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Publication number
KR930014473A
KR930014473A KR1019910025681A KR910025681A KR930014473A KR 930014473 A KR930014473 A KR 930014473A KR 1019910025681 A KR1019910025681 A KR 1019910025681A KR 910025681 A KR910025681 A KR 910025681A KR 930014473 A KR930014473 A KR 930014473A
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KR
South Korea
Prior art keywords
signal
luminance
output
color
comparator
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KR1019910025681A
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Korean (ko)
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KR940003388B1 (en
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한홍규
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강진구
삼성전자 주식회사
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Priority to KR1019910025681A priority Critical patent/KR940003388B1/en
Publication of KR930014473A publication Critical patent/KR930014473A/en
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Publication of KR940003388B1 publication Critical patent/KR940003388B1/en

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor

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  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Processing Of Color Television Signals (AREA)
  • Television Signal Processing For Recording (AREA)

Abstract

내용 없음No content

Description

비디오 카세트 레코더의 화질보상회로Video Compensation Circuit of Video Cassette Recorder

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명에 따른 휘도 및 색신호 지연시간을 자동적으로 보상하기 위한 회로구성도.1 is a circuit diagram for automatically compensating for the luminance and color signal delay time according to the present invention.

제2도는 제1도 각부의 파형도.2 is a waveform diagram of each part of FIG.

제3도는 색신호가 지연될 경우 제1도 각부의 파형도.3 is a waveform diagram of each part of FIG. 1 when a color signal is delayed.

제4도는 휘도신호가 지연될 경우 제1도 각부의 파형도.4 is a waveform diagram of each part of FIG. 1 when a luminance signal is delayed.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

1 : 휘도신호 재생계 2,12 : 전압제어지연부1: luminance signal reproducing system 2,12: voltage control delay unit

3 : 휘도 및 색신호 혼합기 4 : 동기신호 분리기3: luminance and color signal mixer 4: synchronization signal separator

8,17 : 비교기 9 : D-플립플롭8,17 Comparator 9: D-Flip-flop

10 : 익스클루시브 오아게이트 11 : 색신호 재생계10: Exclusive Oagate 11: Color signal reproducing system

18 : 단안정 멀티바이브레이터 19,20 : 앤드게이트18: monostable multivibrator 19,20: endgate

Claims (2)

휘도 신호를 발생하는 휘도신호 재생계(1)와, 색신호를 발생하는 색신호 재생계(11) 및, 상기의 휘도신호와 색신호를 혼합하여 복합비디오 신호(Vout)를 발생하는 혼합기(3)를 구비한 비디오 카세트 레코더의 화질 보상회로에 있어서 ; 상기의 휘도신호에서 동기신호를 분리하기 위한 동기신호 분리기의 (4)와, 상기의 동기신호를 반전시키는 인버터(5)와, 상기의 반전된 동기신호를 적분하기 위해 콘덴서(7)와 저항(6)으로 된 적분회로와, 상기의 적분된 신호를 기준전압(VR1)과 비교하여 동기신호에 따른 펄스신호를 발생하는 비교기(8)로 구성된 동기 신호 펄스 발생수단과 ; 색기준 신호인 버어스트를 적분하기 위해 저항(15)과 콘덴서(16)로 된 적분회로와, 상기의 적분된 버어스트 신호를 기준 전압(VR2)과 비교하여 펄스신호를 발생하는 비교기(17)와, 상기 비교기(17)의 출력펄스 폭을 조정하여 상기 동기신호 펄스 발생수단의 비교기(8) 출력과 일치시키기 위한 단안정 멀티 바이브레이터(18)로 구성된 버어스트 펄스 발생수단과 ; 상기의 비교기(8)에서 출력된 동기신호 펄스와 상기 단안정 멀티 바이브레이터(18)에서 출력된 버어스트 펄스의 시간차를 감지하여 영상신호의 색신호와 휘도신호의 지연시간을 보상하는 신호를 발생하기 위한 휘도 및 색신호 시간차 감지수단 및 ; 상기의 휘도 및 색신호 시간차 감지수단에서 출력된 신호에 의해 동작하되 색신호가 휘도신호에 비해 지연되었을 경우에는 휘도신호를 지연시키도록 동작하는 휘도신호 전압제어지연부(2)와, 휘도신호가 색신호에 비해 지연되었을 경우에는 색신호를 지연시키도록 동작하는 색신호 전압제어지연부(12)로 된 지연수단으로 구성시켜서 됨을 특징으로 하는 비디오카세트 레코더의 화질 보상회로.A luminance signal reproducing system 1 for generating a luminance signal, a color signal reproducing system 11 for generating a color signal, and a mixer 3 for mixing the luminance signal and the color signal to generate a composite video signal Vout; In a picture quality compensation circuit of a video cassette recorder; (4) of the synchronizing signal separator for separating the synchronizing signal from the luminance signal, the inverter 5 for inverting the synchronizing signal, and the condenser 7 and the resistor (for integrating the inverted synchronizing signal); A synchronizing signal pulse generating means composed of an integrating circuit of 6) and a comparator 8 for generating the pulse signal according to the synchronizing signal by comparing the integrated signal with the reference voltage VR1; An integrating circuit comprising a resistor 15 and a condenser 16 for integrating a burst, which is a color reference signal, and a comparator 17 for generating a pulse signal by comparing the integrated burst signal with a reference voltage VR2. And a burst pulse generating means composed of a monostable multivibrator 18 for adjusting the output pulse width of the comparator 17 to match the output of the comparator 8 of the synchronizing signal pulse generating means; Detecting the time difference between the sync signal pulse output from the comparator 8 and the burst pulse output from the monostable multivibrator 18 to generate a signal for compensating the delay time of the color signal and the luminance signal of the video signal. Luminance and color signal time difference detecting means; The luminance signal voltage control delay unit 2, which is operated by the signal output from the luminance and color signal time difference detecting means, and delays the luminance signal when the color signal is delayed compared to the luminance signal, and the luminance signal is applied to the color signal. And a delay means comprising a color signal voltage control delay unit (12) which operates to delay the color signal when the delay is delayed. 제1항에 있어서, 상기의 휘도 및 색신호 시간차 감지수단은 상기 단안정 멀티 바이블이터(18)의 출력신호를 클럭입력으로 하고, 상기 비교기(8)의 출력을 데이터 입력으로 하는 D-플립플롭(9)과, 상기 단안정 멀티 바이브레이터(18)의 출력과 비교기(8)의 출력을 논리조합하는 익스클루시브 오아게이트(10)와, 상기 비교기(8), D-플립플롭(9) 및 익스클루시브 오아게이트(10)의 출력을 논리조합하여 색신호가 휘도신호보다 지연되었을 경우 상기의 휘도신호 전압제어지연부(2)를 작동시켜 휘도신호를 지연시키기 위한 앤드게이트(20)와, 상기 플립플롭(9)의 출력을 반전시키는 인버터(21)와 상기 인버터(21)의 출력과, 익스클루시브 오아게이트(10) 및 단안정 멀티 바이브레이터(18)의 출력을 논리조합하여 휘도신호가 색신호 보다 지연되었을 경우 상기의 색신호 전압제어지연부(12)를 작동시켜 색신호를 지연시키기 위한 앤드게이트(19)로 구성시켜서 됨을 특징으로 하는 비디오 카세트 레코더의 화질보상회로.2. The D-flip flop according to claim 1, wherein the luminance and color signal time difference detecting means uses the output signal of the monostable multivibrator 18 as a clock input and the output of the comparator 8 as a data input. 9), an exclusive oragate 10 that logically combines the output of the monostable multivibrator 18 with the output of the comparator 8, the comparator 8, the D-flip flop 9, and the ext. An AND gate 20 for delaying the luminance signal by operating the luminance signal voltage control delay unit 2 when the color signal is delayed from the luminance signal by logically combining the output of the exclusive oragate 10, and the flip By combining the inverter 21 which inverts the output of the flop 9, the output of the inverter 21, and the outputs of the exclusive oar gate 10 and the monostable multivibrator 18, the luminance signal is more than the color signal. The color signal voltage above when delayed Picture quality compensation circuit of a video cassette recorder by operating the mess edge (12), characterized by that consist of the AND gate 19, to delay the color signal. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910025681A 1991-12-31 1991-12-31 Picture quality compensating circuit for vcr KR940003388B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910025681A KR940003388B1 (en) 1991-12-31 1991-12-31 Picture quality compensating circuit for vcr

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019910025681A KR940003388B1 (en) 1991-12-31 1991-12-31 Picture quality compensating circuit for vcr

Publications (2)

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KR930014473A true KR930014473A (en) 1993-07-23
KR940003388B1 KR940003388B1 (en) 1994-04-21

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Publication number Priority date Publication date Assignee Title
KR101835316B1 (en) 2013-04-02 2018-03-08 주식회사 칩스앤미디어 Method and apparatus for processing video

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