KR930012143B1 - Printing apparatus which unify video and engine controller and it's engine controller circuit - Google Patents

Abstract

The video controller and the engine controller are integrally combined, and signal transmission between the controllers is controlled by interface circuit in the engine controller. The apparatus includes a unit for sending print instruction signal and paper detection signal between a video controller (100) and an engine mechanism (300), a unit for sending video transmission clock, video data, latch signal (LATCH), strobe signals (STR1-STR4) from an engine controller (200) to a LED head array (300), and a unit for sending video transmission clocks (VD, CLK, OB, 1B, 2B) to control video transmission speed, horizontal synchronous stop signal, and horizontal synchronous start signal to an engine controller.

Description

Video and engine controller integrated printing device and engine controller circuit

1 is a block diagram of a conventional separate LSU print.

2 is a block diagram showing a video controller and an engine controller integrated according to the present invention.

3 is an engine controller circuit diagram according to the present invention.

4 is an input / output timing diagram of each stage of the engine controller circuit according to the present invention.

5 is a block diagram of a scanning unit of a conventional LSU printer.

6 is a configuration diagram of the LED head array unit of the LED printer according to the present invention.

* Explanation of symbols for main parts of the drawings

10, 70: drive circuit

11, 12, 21, 22, 41, 43: D flip flop

13, 23, 43, 71, 72, 73, 74: AND gate 20: Synchronization signal generator

30: synchronization signal processing unit 40: video transmission clock generator

50: counting circuit 51, 52, 53: counter circuit

60: PAL 75: output circuit

80: strobe signal generator 81: latch signal generator

100: video controller 200: engine controller

300: engine mechanism 400: LED head array

The present invention relates to an LED print. More specifically, the engine controller design can be simplified by configuring the video controller and the engine controller integrally, and configuring the interface controller engine controller circuit for smooth signal transmission with the video and engine controller. A video and engine controller integrated printing device and an engine controller circuit are provided.

In general, a printer using a laser scanning unit (LSU) as a light source has an engine controller 200 and a video controller 100 separated from each other, as shown in FIG. ) Are present to transmit control signals to each other.

5 is a block diagram of a scanning unit of a conventional LSU printer, which employs a laser diode 3 as a light emitting source, a photo sensor 2, a polygon mirror 5, a focusing lens 6, and the like. The photo sensor 2 detects the light reflected from the polygen mirror 5 and generates a horizontal synchronization signal. The period of the horizontal synchronization signal generated here is determined by the rotation frequency of the polygen mirror 5, and the horizontal registration signal is used as a reference for grabbing the left margin of the page to be printed.

That is, when power is supplied to the engine system of the LSU print, a recognition signal (EPRDY) indicating that power is applied is transmitted from the engine controller 200 to the video controller 100, and the engine is in a printable state. . In addition, the signals MBSY informing each other of the current status of the engine and the video controllers 200 and 100 are exchanged, and the signals are transmitted in synchronization with the system click SCLK. In addition, the video controller 100 transmits a signal (CMSG) for transmitting one byte of data to the engine controller 200, while the engine controller 200 transmits a signal for transmitting one byte of data to the video controller 100 ( EMSG) will be sent.

By sending a print command to the engine controller 200 by exchanging such a command or status signal, the print paper is brought to an appropriate position, the sensor detects the arrival of the print point by the sensor, and the video controller 100 receives the paper detection recognition signal PSYNRQ. send. At this time, the video controller 100 issues a print command (PRINT) and at the same time outputs a signal (PSYNC) of the printable area, and the engine controller (200) rotates the motor of the LSU to detect the beam detection from the laser scanner. When the sensor detects and sends the beam detection signal BD to the video controller 100, the margin of the print paper is adjusted to send the actual video data VD to the engine for printing.

Such a conventional laser printer is a video controller and the engine controller is driven separately to inform each control state, and also because the data is transmitted and printed, the configuration is complicated, and requires a lot of time exchange information between each other The preparation time for printing is considerably taken, resulting in a problem of deterioration of the printing reliability.

The present invention is to solve the above problems, the object of the present invention is to configure the video controller and the engine controller integrally the system by miniaturizing, and to quickly respond to the exchange of data between the command and status of the main controller of the video controller It is to provide a video and engine controller integrated printing device that can increase the printing speed of the print while reducing the burden on the processing device to allocate more data processing time.

Another object of the present invention is to provide a print engine controller circuit having an interface function so that the control signal of the video controller can be quickly transmitted to the engine mechanism and the LED head array to realize the above object.

A feature of the present invention for achieving the above object is that in the LED printing apparatus, the video controller and the engine controller are integrally configured to transmit a print command and a paper detection signal between the video controller and the engine mechanism, and in the engine controller. Means for transmitting video transmission clocks, video data, latch signals, and strobe signals to the LED head array, and a number of video transmission clocks that control the horizontal sync start signal, horizontal sync stop signal, and video baud rate from the video controller to the engine controller. And a video and engine controller integrated printing device as a means of transmission.

In another aspect of the present invention, there is provided a D flip-flop in the engine controller circuit of the LED print, the driver circuit receiving a horizontal synchronous start signal (HSYNC START) from the video controller and controlling each circuit, and an output terminal of the drive circuit. A horizontal sync signal generator configured to be connected to a D flip-flop and output a horizontal sync signal (HSYNC), a video transmitter connected to a video controller to output a video transmission clock (VD TCLK), and a video controller. A counting circuit for counting the video transmission clock VD TCLK according to the output signal of the video transmission clock VD CLK 2B and the drive circuit, an arm PAL for generating a specific signal according to the counter value of the counting circuit, and A latch signal generation unit connected to an output terminal of the arm for outputting a latch signal, and a strobe for outputting a strobe signal by the output signal of the arm Consisting of parts of arc generated in the engine controller circuit of the printer device having an interface function between the video controller and the LED head array.

Hereinafter, an embodiment of a video and engine controller integrated printer device and an engine controller circuit thereof according to the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram of the printer device according to the present invention, the video controller 100 and the engine controller 200 are integrally formed to form the overall control unit, the print between the video controller 100 and the engine mechanism 300 The command and the sheet detection signal are exchanged, and the engine controller 200 sends the video transmission clock VD TCLK, the video data VD, the latch signal, and the strobe signal to the LED head array 400. In addition, a plurality of video transmission clicks (VD CLK 0B, 1B, 2B) for controlling the horizontal synchronization start signal (HSYNC START), the horizontal synchronization stop signal (HSYNC STOP), and the print speed from the video controller 100 to the engine controller 200. It is configured to send.

FIG. 3 is a detailed circuit diagram of the engine controller according to the present invention. The driving circuit 50 is driven by processing a video transmission clock VD CLK 1B having a synchronous signal and a predetermined period outputted from the video controller 100. A video transmission clock generator 40 for processing a video transmission clock VD CLK 0B having a predetermined period from the video controller 100 and a video transmission clock generator 40 for outputting a horizontal synchronization signal; A counting circuit 50 for counting a clock VD TCLK of the video transmission clock generator 40, an arm 60 connected to an output terminal of the counting circuit 50, and generating a control signal; 60) and a latch and strobe signal generator 80 connected to the synchronization signal processor 30 to output a latch signal and a strobe signal.

In addition, the synchronization signal processor 30 includes a D flip flop 11, 12, and an end gate 13, and a drive circuit 10 for controlling driving of the engine controller circuit 200, and a D flip flop ( A horizontal synchronous signal generator (21), (22), and an end gate (23) for outputting a synchronization signal by the output of the drive circuit (10) and the video transmission clock (VD CLK 1B) of the video controller ( 20). In addition, the video transmission clock generator 40 includes D flip-flops 41 and 42 and an end gate 43.

The latch and strobe signal generator 80 includes a latch signal generator 81 and a strobe signal generator 82, and the strobe signal generator 82 is again an AND gate 71 to 74. Drive circuit 70 and an output circuit 75 consisting of flip-flops 76-79, one end of the end gate 71-74 is connected to the arm 60, the other end of the horizontal synchronization signal generator 20 Is connected to the output terminal of the AND gate 13 of the drive circuit 10 of the circuit. The drive circuit 70 is configured such that the output signals of the AND gates 71 to 74 are applied to the clear terminal CLR of the flip-flops 76 to 79 which are the output circuits 75. In the counting circuit 50, three counter circuits 51 to 53 are connected in parallel, and the output terminal of the counting circuit 50 is connected to the arm 60.

6 is a configuration diagram of the LED printer according to the present invention, in which the LED head array unit 600 is installed in the drum 1, and the LED head array unit 600 is driven by the LED head array driver 700. It is. At this time, the LED head array unit 600 is composed of 2560 LED array to fit the size of A4.

In the engine controller circuit according to the present invention, as described above, the overall flow is shown by the block diagram of FIG. 2. When the print command (PRINT) is issued from the video controller 100, the feeding of the printing paper from the engine mechanism 300 is performed. ), And when the paper reaches the printable area, the sensor detects and notifies the video controller 100. In this case, as the video controller 100 transmits a start signal HSYNC START to the engine controller 200, the engine controller 200 generates a video transmission signal VD TCLK and generates video data VD according to the signal. To the LED head array 400. At this time, the transmission of the video data (VD) is countered to fit the cell (CELL) of the LED head to transmit 2560 data, and when the transmission is completed, a latch signal is generated and applied to the LED head array 400, while the LED head A strobe signal for turning on the LEDs of the array 400 is output.

The engine controller circuit diagram of FIG. 3 and the timing diagram of FIG. 4 will be described in detail. First, referring to the video transmission clock generated by the video controller 100, the first video transmission clock VD CLK 1B is a video transmission clock VD TCLK applied to the LED head array 400 as shown in FIG. 4. This is the same clock and only differs in latency.

In addition, the second video transmission clock (VD CLK 2B) is twice the first video transmission clock (VD CLK 1B) and the third video transmission clock (VD CLK 0B) is 1/2 of the first video transmission clock (VD CLK 1B). It is a ship. Therefore, when the drum speed of the engine is determined, the period of one line is determined, and the determination of the period determines the video data transmission clock. Thus, the counter circuits 51 to 53 of the counting circuit 50 in FIG. Determine the initial value of. Assuming that the drum speed of the LED print engine of this invention is 31.40 mm / sec, the period of one line is to be.

On the other hand, if the LED head specification (SPEC) has an optimal signal for each strobe of about 250μsec and allocates up to 300μsec, the minimum video data transfer rate is 1.7107 because 300μsec × 4 = 1.2msec must complete 2560 data transfers within 1.4964msec. It should be at least MHz. Therefore, in this invention, the video transmission rate is set to 2MHz. Therefore, the first video transmission clock (VD CLK 1B) is 0.5 μsec, the second video transmission clock (VD CLK 2B) is 1 μsec, and the third video transmission clock (VD CLK 0B) is 0.25 μsec. The time that all the counter circuits 51 to 53 can count is 4.096 ms.

In addition, since the first video transmission clock (VD CLK 1B) is 0.5 μsec, all data transmission times are 2560 × 0.5 msec. Therefore, the input of the counter circuits 51 to 53 to D00 to D11 of the counter circuits 51 to 53 is set to 5E8H since it is less than 1.4964 msec calculated above to sufficiently satisfy the normal condition. When the power is applied in this state, the reset occurs and the output of the D flip-flop 12 ( ) Becomes low and the counter circuits 51 to 53 load initial values, and the output of the D flip-flop 21 ( ) Is high, so the horizontal sync signal (HSYNC) is inactive. The reset signal makes the output of the D flip-flop 42 low and is applied to the clear terminal of the D flip-flop 41, so that the video transmission clock VD TCLK is kept in the high state. In addition, since the low voltage is applied to the clear terminal of the counter circuit 53, the strobe signals STR1 to STR4 also become inactive. In addition, since the output of the arm 60 is in a high state during reset, the latch signal Latch is also in an inactive state.

On the other hand, when all the outputs connected to the LED head array 400 are in an inactive state and the HSYNC START signal is received from the video controller 100, the output of the D flip-flop 11 goes high. Therefore, the counter circuits 51 to 53 start counting by the first video transmission clock VD CLK 1B. In addition, when the output of the D flip-flop 12 is converted to the “high” state, the output of the D flip-flop 21 ( ) Becomes active and after one clock of the first video transmission clock VD CLK 1B, the horizontal synchronizing signal HSYNC returns to the inactive state again.

Also, the output of the D flip-flop 22 Is applied to the clear end of the drop 41 so that the video transmission clock (VD TCLK) divided by the third video transmission clock (VD CLK 0B) is removed. Start making On the other hand, if the video transmission clock (VD TCLK) is counted in the counting circuit 50 and counting 1280 clocks, it becomes an active blow at P1 of the arm 60 and is applied to the clear terminal of the D flip-flop 42. The transmission clock (VD TCLK) goes into a high state to stop the transmission of the video data (VD). The latch signal is generated using the 1281 th clock, and the P3 stage of the arm 60 becomes the low level from the 1282 th to output the first strobe signal STR1, and the P4 of the arm 60 at the 1582 th clock which is 300 µsec later. Is outputted to the clear terminal of the flip-flop 76 to block the first strobe signal STR1.

In addition, the P5 output of the arm 60 goes low at 1585 th clock, which is 3 mu sec later, to generate the second strobe signal STR2, and the FLOW is output and flipped from P10 of the arm 60 at 2491 th clock which is 300 mu sec later. The generation of the fourth strobe signal STR4 is stopped by being applied to the clear terminal of the flop 79.

When the above process is completed, the printing of one line is finished, and when the counting circuit 50 completes the 2696 counting of the video transmission clock (VD TCLK), the carry output terminal RC0 of the counter circuit 51 goes high. Output of D flip-flop ( ) Signal becomes high, and the signal is applied to LD of the counter circuits 51 to 53 to load the initial value. When loading is complete, the output of the D flip-flop 21 ) Becomes low and the horizontal synchronizing signal (HSYNC) is activated again, and the above-described operation is repeated. When the horizontal synchronizing stop signal (HSYNC STOP) is enabled, all of the reset signals are applied as if the The state is inactivated to the initial state, and the state repeats the same operation when the next HSYNC START signal is enabled. Therefore, the engine controller circuit is realized by using the 12-bit counter circuits 51 to 53 to turn on and off 2560 data transfer and latch signals and the first to fourth strobe signals STR1 to STR4 in one line print period. Was optimized.

As described above, according to the video and engine controller integrated printer device and the engine controller circuit according to the present invention, the video controller and the engine controller are integrally configured to transmit a print command and a paper detection signal between the video controller and the engine mechanism. Means for transmitting video transmission clocks, video data, latch signals, and strobe signals from the engine controller to the LED head array, and a number of videos controlling the horizontal sync start signal, horizontal sync stop signal, and video transmission speed from the video controller to the engine controller. It consists of a printer device as a means for transmitting a transmission clock, a D flip flop, a drive circuit for receiving a horizontal synchronous start signal from a video controller and controlling each circuit, and a D flip flop connected to the output terminal of the drive. Horizontal A coefficient for counting the video transmission clock by a horizontal synchronous signal generator for outputting a signal, a video transmission clock generator connected to the video controller to output a video transmission clock, and a video transmission clock of the video controller and an output signal of the drive circuit A circuit, an arm for generating a specific signal according to the counter value of the counting circuit, a latch signal generator connected to an output terminal of the arm for outputting a latch signal, and a strobe for outputting a strobe signal by the output signal of the arm It is composed of a signal generator and has an engine controller circuit of a printer device having an interface function between a video controller and an LED head array. Therefore, 2560 video data transmissions are completed in one print cycle and a strobe signal is used. Simple circuit configuration Is to not only the input and output ports decreases many response speed is fast is that it provides an effect to increase the print speed of execution.

Claims (4)

A means for integrally configuring the video controller 100 and the engine controller 200 to transmit a print command and a paper sensing signal between the video controller 100 and the engine mechanism 300, and the LED head array in the engine controller 200. Means for transmitting the video transmission clock (VD TCLK), the video data (VD), the latch signal (LATCH), and the strobe signals (STR1 to STR4) to (300), and from the video controller (100) to the engine controller (200) horizontally. Video and engine controller all-in-one printing device as a means of transmitting the sync start signal (HSYNC START), the horizontal sync stop signal (HSYNC STOP), and the multiple video transmission clocks (VD CLK 0B, 1B, 2B) that control the video transmission speed . In the engine controller circuit of the LED printer, a horizontal synchronous start signal (HSYNC START) and a horizontal synchronous stop signal (HSYNC STOP) are supplied from the video controller 100 to control each circuit and output a horizontal synchronous signal (HSYNC). A video transmission clock connected to the horizontal synchronization signal processor 30 and the video controller 100 and configured to output a video transmission clock (VD TCLK) including a D flip-flop 41, 42, and an end gate 43. The counter 40 and the counter circuits 51 to 53 are connected in parallel to count the video transfer clock VD TCLK of the video controller 100, and the counter value of the counter circuit 50. Arm 60 for generating a specific signal, a latch signal generator 81 connected to an output terminal of the arm 60 to output a latch signal, and strobe signals STR1 to STR4 according to the output signal of the arm. Print of the strobe signal generator 82 outputting Jin controller circuit. 3. The driving circuit (10) according to claim 2, wherein the horizontal synchronous signal processing section (30) includes a D flip-flop (11), a (12), and an end gate (13) to control driving of an engine controller circuit; Horizontal sync signal composed of flip-flops 21, 22 and end gate 23 to output a synchronization signal by the output of the drive circuit 10 and the video transmission clock VD CLK 1B of the video controller 100. Engine controller circuit of the print consisting of a generation unit (20). 3. The strobe signal generating unit (82) according to claim 2, wherein the strobe signal generating unit (82) comprises a drive circuit (70) consisting of end gates (71-74) and an output circuit (75) of flip-flops (76-79). One end of the gate 71 to 74 is connected to the arm 60, and the other end is connected to the output terminal of the AND gate 13 of the drive circuit 10 of the horizontal synchronous signal processor 30, and the drive circuit 70 The output controller of the AND gate 71 to 74 is applied to the clear end of the flip-flops 76 to 79 of the output circuit 75.