KR930011986B1 - Fan switch of exchange for isdn and switching method - Google Patents

Abstract

The fast rearrangeable nonblocking (FAN) switch is used as self routing switch of a broad band ISDN exchange. The FAN switch comprises input switch unit (1) comprising a number of 2x4 elements to receive input data, an intermediate switch unit (2) for fouting input data to corresponding output switch, and a output switch unit (3) comprising a number of 4x2 elements (10,11) to output input data.

Description

FAN Switch and Switching Method in a Switch for Broadband ISDN

1 is a configuration diagram of a FAN switch according to the present invention.

2 is an input / output terminal name display diagram of a 2 × 4 element according to the present invention.

3 is an operating state diagram of a 2 × 2 element according to the present invention.

4 is an operational state diagram of a 4x2 element according to the present invention.

5 is a flowchart of a method of configuring a FAN switch according to the present invention.

6 is an embodiment of a FAN switch according to the present invention.

7 is a flowchart of a switching method according to the present invention.

8 is an exemplary view of a switching method according to the present invention.

* Explanation of symbols for main parts of the drawings

1: input switch 2: intermediate switch

3: Output switch 4, 5, 6, 7: N / 2 FAN switch

8, 9: 2 × 4 elements 10, 11: 4 × 2 elements

The present invention relates to a fast rearrangeable nonblocking (FAN) switch and a switching method that can be used as a self-routing switch in a switch for a broadband ISDN.

The self-routing switch, currently being widely studied as a switch for ATM (Asynchronous Transfer Mode) exchange, is a multi-stage access network (MIN) that connects 2 × 2 switch elements in multiple stages. It is a hardware switch that minimizes the control processor involvement during the exchange. However, since the self-routing switch is a single path switch having one path between specific inputs and outputs, internal blocking occurs according to the type of traffic input. There are many ways to solve the internal blocking, but one of them is to give multiple paths between input and output. Multi-path switches also have a sufficient blocking path between input and output, so that there is no blocking in any case, and there is a rearrangement network in which incoming traffic must be rearranged so that blocking does not occur over several paths between input and output. Fully non-blocking networks are rarely used as ATM switches because routing control is difficult and inefficient. In general, a multipath switch means a relocation network.

After C. Clos proposed a complete non-blocking network with less crosspoints and the same function as a crossbar switch, VE Benes developed rearrangeability for three-layer networks. ) Thus, it was concluded that the same size square switch should be symmetrically arranged around the center stage to form the relocation network with the fewest intersection points. That is, the switch network may be composed of many stages, and the smaller the grid switch size is, the better it is, and the middle stage means that the largest grid switch should be arranged.

Benes' proposed network uses crosspoint arrays as grid switches, whereas A. E. Joel defined the 2 × 2 switch element and used it to construct the network proposed by Benes. Therefore, today, the method originally proposed by Benes and using a 2 × 2 switch element instead of a crosspoint array is called a Benes network and is widely used as a representative example of a relocation network.

As described above, the Benes network is the simplest network having the same function as the crosspoint switch but having a few crossing points, but in order to perform the same function as the crosspoint switch, a well-defined relocation algorithm is applied to the nonblocking switch. However, since the relocation algorithm is not applicable to each switch element dimension and must be processed in software for the entire input traffic, the larger the switch size, the larger the computational amount, resulting in lowering the operation speed of the switch.

The present invention has been made to solve the above problems, while using a binary operation FAN switch of the wideband ISDN switch to solve the internal blocking by solving the determination of the self-routing in each element and It is an object of the present invention to provide a switching method.

In order to achieve the above object, the present invention provides a fast rearrangeable nonblocking (FAN) switch, which is used as a self-routing switch in an exchange for a broadband ISDN, comprising: a plurality of 2 × 4 elements and an input switch in which input information is input through an input terminal. Means, an intermediate switch means connected to said input switch means for routing input information to a corresponding output switch, and an output connected to said intermediate switch means and composed of a plurality of 4 × 2 elements to output the input information to an output terminal A first step of performing routing by inputting information input from a least significant bit (LSB) to a distributed network using a FAN switch configured as described above, and the information input from the LSB (Most) Significant Bit) is input to the routing network, characterized in that performed by the second step of performing routing.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention;

1 is a configuration diagram of a FAN switch according to the present invention, 1 is an input switch, 2 is an intermediate switch, 3 is an output switch, 4, 5, 6, 7 is an N / 2 FAN switch (N is the number of input and output terminals), 8 and 9 represent 2x4 elements, and 10 and 11 represent 4x2 elements, respectively.

The FAN switch according to the present invention has a three-stage structure, as shown in FIG. 1, an input switch 1 composed of 2 × 4 elements 8 and 9 and an N / 2 FAN switch 4, 5, 6, and 7 ) And an output switch 3 composed of 4x2 elements 10 and 11.

The FAN switch is the smallest unit when the number of input / output terminals is 4 × 4, and the expansion of the switch is made in units of 2 ⁿ × 2 ⁿ (n is log ₂ N) such as 8 × 8 and 16 × 16.

If N = 4, the input switch consists of 2 × 4 elements, the middle switch consists of 2 × 2 elements, and the output switch consists of 4 × 2 elements. After that, the 8 × 8 switch is the N / 2 FAN switch (4, 5, 6, 7) constituting the intermediate switch 2 in FIG. 1 as the 4 × 4 FAN switch, and the 16 × 16 switch is the N / 2 FAN. The switch scale is expanded by replacing it with an 8 × 8 fan switch instead of the switches 4, 5, 6 and 7.

Therefore, the number of input / output terminals N × N FAN switch is the input switch N / 2 2 × 4 elements, the middle switch is the N / 2 FAN switch (2 × 2 switch element when N = 4) and the output switch It consists of N / 2 4 × 2 elements.

Figure 2 defines the input and output terminal names in order to explain the operation of the 2 × 4 elements according to the present invention, the input terminal is referred to as (A) below the (B), the output terminal from top to bottom respectively A, B, C, D are called output terminals.

Referring to Table 1 below, the operation of the 2 × 4 element will be described.

TABLE 1

Unlike a self-routing switch element, a 2x4 element performs routing in two bits instead of one bit. When two inputted information are different or one inputted information, '00' is 'a', '01' is 'I', '10' is 'da', and '11' is 'la' Headed to. If the input information is the same, the operation method is determined according to the type of the input. In other words, if all inputs are '00', one is' A ', the other is' A', '01' is' I ',' D ',' 10 'is' I', 'D', ' 11 'is divided into' A 'and' D '. When the two inputs are the same, you don't have to go to one of the two outputs, but you can go anywhere. That is, there is no restriction that input information A must be directed to the upper output terminal.

3 is an operational state diagram of a 2x2 element according to the present invention. The 2 × 2 switch element operates with 1 bit and operates in the same manner as the 2 × 2 switch element used in the existing self-routing switch. As shown in FIG. 3, when the input information is '0', the 2 × 2 switch element heads to the upper output terminal. If input information is '1', it goes to lower output terminal.

4 is an operating state of the 4x2 element according to the present invention, the input terminals are referred to as C, D, E, and F input terminals from the top, respectively, and the output terminals are referred to as the bar output terminals from the top. The 4 × 2 element has a maximum of 2 terminals that can simultaneously receive information from 4 input terminals. If the header information is '0', it is routed to the output terminal 'e', and if it is '1', it is routed to the output terminal 'bar'. If '0' or '1' is entered at the same time, both will be routed to 'ma' or 'bar'.

5 is a flowchart of a method for configuring a FAN switch according to the present invention. In order to explain the method for configuring a FAN switch, Lij is an output line of an input switch and an input line of an output switch, that is, an i-th output line and an i-th of an i-th input switch. The j-th input line (i = 1 to N / 2 and j = 1, 3) of the output switch is defined, and Kji is defined as the input / output line of the intermediate switch, that is, the i-th input / output line of the j-th intermediate switch.

First, N / 2 2 × 4 elements are placed at the input terminal, and serial numbers from 0 to N / 2 −1 are assigned, and serial numbers from 0 to 3 are attached to each 2 × 4 element output terminal (51). Put four N / 2 FAN switches in the middle and attach serial numbers from 0 to 3, and attach serial numbers from 0 to N / 2 -1 to each N / 2 FAN switch input / output terminal (52).

Place N / 2 4 × 2 elements at the output and attach the serial number from 0 to N / 2 −1 and assign the serial number from 0 to 3 to each 4 × 2 element input terminal (53).

According to the serial number, Kji is sequentially connected to Lij until I starts from 0 to N / 2-1 and j starts from 0 to 3 (54 to 59).

6 is a diagram showing an embodiment of a FAN switch according to the present invention, in which the number of input / output terminals N is eight.

The number of stages of the FAN switch is 2n-1 (n = log + N) and 0, 1,... , Numbers 2n-2 and 0, 1,… from the input side. In other words, the n-2 stage is referred to as a distributed network for distributing traffic, and the n-1 stage to a 2n-2 stage is referred to as a routing network.

7 is a flowchart of a switching method according to the present invention, which shows an algorithm for rearranging input information to make a FAN switch nonblocking.

Each end of the distributed network and routing network is defined as Di (o≤i≤n-2) and Ri (0≤i≤n-1), and the input and output terminal numbers are expressed in binary as follows.

Input terminal

Output terminal

In addition, routing information input to the FAN switch is displayed in binary as follows.

R = [r _n-1 r _n-2 ... r ₁ r ₀ ]

First, in the distributed network, the input routing information is input in reverse. That is, each output terminal number is displayed as a binary number and input from the LSB (Least Significant Bit) (71).

R = [r _n-1 r _n-2 ... r ₁ r ₀ ]

= [y _n-1 y _n-2 ... y ₁ y ₀ ]

In distributed network Di, it is routed by 2 bits r _{n + 1} r ₁ and continues routing from D ₀ to D _n-2 (72, 73, 74). Since the distributed network is composed of 2 × 4 elements, the routing method is the same as the 2 × 4 element described above.

In the routing network, the incoming routing information is returned to its original position and inputted from the MSB (Most Significant Bit) to the routing network (75). In other words

R = [r _n-1 r _n-2 ... r ₁ r ₀ ]

R = [y ₀ y ₁ ... y _n-2 y _n-1 ]

In the routing network Ri, routing is done with r ₁ 1 bits and routing continues from R ₀ to R _n-1 (76,77,78). Since the routing network is composed of 4 × 2 elements, the routing method is the same as the 4 × 2 element described above.

A detailed operation method of the FAN switch configured as described above will be described with reference to the following table.

Table 2 below shows the type of input traffic.

TABLE 2

Table 3 below shows the routing process in the distributed network 0 stage.

TABLE 3

Table 4 below shows the routing process in the first stage of distributed network.

TABLE 4

Table 5 below shows the routing process in the routing network 0 stage.

TABLE 5

Table 6 below shows the routing process in the first stage of the routing network.

TABLE 6

Table 7 below shows the routing process in the second stage of the routing network.

TABLE 7

8 is an exemplary embodiment of a switching method according to the present invention, and shows a process routed by Tables 2 to 7.

The present invention configured and operated as described above has an application effect of being used as a switch element of a broadband ISDN exchange to prevent internal blocking of the switch.

Claims (8)

In a fast rearrangable nonblocking (FAN) switch used as a self-routing switch in a wideband ISDN switch, an input switch means (1, 8) composed of a plurality of 2 × 4 elements (8, 9) for input information through an input terminal (1) ), An intermediate switch means (2) connected to the input switch means (1) for routing input information to a corresponding output switch, and a plurality of 4x2 elements (10, 11) connected to the intermediate switch means (2); And an output switch means (3) for outputting the input information to the output terminal. 2. A FAN switch according to claim 1, wherein said input switch means (1) is composed of 2 x 4 elements of N / 2 (where N is the number of input and output terminals). 2. FAN switch according to claim 1, characterized in that the output switch means (3) consists of N / 2 4 × 2 elements. FAN switch according to claim 1, characterized in that the intermediate switch means (2) consists of N / 2 FAN switches (4, 5, 6, 7). 5. The FAN switch according to claim 4, wherein the N / 2 FAN switch (4, 5, 6, 7) is composed of 2 x 2 elements when the number of input / output terminals is four. An input switch means 1 composed of a plurality of 2 × 4 elements 8 and 9 and connected to the input switch means 1 for inputting input information through an input terminal for routing the input information to a corresponding output switch. An intermediate switch means (2), and an output switch means (3) connected to the intermediate switch means (2) and composed of a plurality of 4x2 elements (10, 11) for outputting inputted information to an output terminal A method for switching a switch of a FAN; First step (71,72,73,74) to perform the routing by inputting the input information from the LSB (L east Significant Bit) to the distributed network, and routing information input from the LSB from the Most Significant Bit (MSB) A method of switching a FAN switch, characterized in that performed by a second step (75, 76, 77, 78) to perform routing by inputting into a network. The method of claim 6, wherein the first steps (71, 72, 73, 74) of performing routing in the distributed network include '00' when the two inputted informations are different or the inputted information is one. Output terminal (a), '01' is directed to the second output terminal (b), '10' is directed to the third output terminal (c), and '11' is directed to the fourth output terminal (d). In the case of '00', first and fourth output terminals (a, d), '01' are second and third output terminals (b), and '10' are second and third output terminals (b, d). ), And '11' is performed to face the first and fourth output terminals (a, d). 7. The second step (75, 76, 77, 78) of performing routing in the routing network is the first output terminal (e) if the header information is '0', the second output if the '1' And routing to a terminal (bar) and routing to the first or second output terminal (e.g., bar) when '0' or '1' is input at the same time.