KR930011715A - Interlaced / sequential scan switching circuit and method - Google Patents

Interlaced / sequential scan switching circuit and method Download PDF

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Publication number
KR930011715A
KR930011715A KR1019910021648A KR910021648A KR930011715A KR 930011715 A KR930011715 A KR 930011715A KR 1019910021648 A KR1019910021648 A KR 1019910021648A KR 910021648 A KR910021648 A KR 910021648A KR 930011715 A KR930011715 A KR 930011715A
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South Korea
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pixels
pixel
interlaced
value
interpolated
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KR1019910021648A
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Korean (ko)
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KR0166713B1 (en
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주재홍
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강진구
삼성전자 주식회사
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Priority to KR1019910021648A priority Critical patent/KR0166713B1/en
Publication of KR930011715A publication Critical patent/KR930011715A/en
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Publication of KR0166713B1 publication Critical patent/KR0166713B1/en

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N7/00—Television systems
    • H04N7/01—Conversion of standards, e.g. involving analogue television standards or digital television standards processed at pixel level

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  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Television Systems (AREA)

Abstract

본 발명은, TV의 주사방식을 비월주사에서 순차주사로 전환할 경우에 보간되는 라인의 화소값을 결정하는 비월/순차주사전환회로 및 그 방법에 관한 것으로, 보간하고자 하는 화소의 주변화소들을 추출하기 위한 주변화소추출수단과, 상기 추출된 주변화소들을 서로 비교하여 최소차이값을 갖는 한쌍의 주변화소를 검출하기 위한 검출수단과, 상기 검출된 한쌍의 화소와 전 필드의 화소의 중간값으로 보간될 화소의 값을 결정하는 중간값 연산수단으로 구성된다. 보간되는 화소의 값을 결정하는데 있어서, 보간될 화소주변에 있는 화소들 즉 경계면 정보를 이용하고, 그 값과 상관성이 많은 전 필드의 화소에 중간값을 취하여 보간함으로써 고화질의 화면을 구성할 수 있는 효과가 있다.The present invention relates to an interlaced / sequential scan switching circuit and a method for determining a pixel value of an interpolated line when the TV scanning method is switched from interlaced scanning to progressive scanning, and extracting peripheral pixels of pixels to be interpolated. Peripheral pixel extracting means for comparing the extracted peripheral pixels with each other and detecting means for detecting a pair of peripheral pixels having a minimum difference value, and interpolating between the detected pair of pixels and pixels of all the fields. Intermediate value calculating means for determining a value of a pixel to be used. In determining the value of the interpolated pixel, it is possible to compose a high-quality screen by using pixels around the pixel to be interpolated, that is, interface information, and interpolating by taking an intermediate value in all fields of the pixel having a high correlation with the value. It works.

Description

비월/순차주사전환회로 및 그 방법Interlaced / sequential scan switching circuit and method

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 본 발명에 따른 비월/순차주사전환회로도.1 is an interlaced / sequential scan switching circuit according to the present invention.

제2도는 본 발명의 보간될 화소와 그 주변화소들을 나타낸 표시도.2 is a display diagram showing a pixel to be interpolated and its surrounding pixels of the present invention.

제3도는 본 발명을 설명하기 위한 풀로우챠트.3 is a pull chart for explaining the present invention.

Claims (4)

제1및 제2입력단을 구비하여 비월주사방식의 영상신호를 순차주사로 변환하는 비월/순차주사전환회로에 있어서, 상기 제1입력단으로부터 비월주사방식의 영상신호를 인가받아 보간하고자 하는 화소에 대한 다수의 주변화소를 추출하기 위한 주변화소추출수단과, 상기 추출수단으로부터 인가되는 다수의 주변화소들중에서 최소차이값을 갖는 한쌍의 주변화소를 검출해내기 위한 검출수단과, 상기 검출수단으로부터 한쌍의 주변화소를 인가받아 상기 제2입력단으로부터 인가되는 전 필드의 화소와 중간값을 연산하여 출력단으로 공급하기 위한 중간값 연산수단을 포함하는 것을 특징으로 하는 비월/순차주사전환회로.An interlaced / sequential scan switching circuit having a first and a second input stage for converting an interlaced video signal into a sequential scan, wherein the interlaced video signal is applied from the first input terminal to the pixel to be interpolated Peripheral pixel extracting means for extracting a plurality of peripheral pixels, detection means for detecting a pair of peripheral pixels having a minimum difference value among the plurality of peripheral pixels applied from the extracting means, and a pair of pairs from the detecting means And an intermediate value calculating means for calculating a pixel and an intermediate value of all fields applied from the second input terminal to the output terminal by receiving a peripheral pixel. 제1항에 있어서, 주변화소추출수단은 인가되는 영상신호의 한 화소를 기준으로 시간적인 지연에 의해 다수의 주변화소들을 추출해내기 위한 지연수단을 포함하는 것을 특징으로 하는 비월/순차주사전환회로.2. The interlaced / sequential scan switching circuit according to claim 1, wherein the peripheral pixel extracting means includes delay means for extracting a plurality of peripheral pixels by a time delay with respect to one pixel of an image signal to be applied. 제2항에 있어서, 지연수단은 주변화소를 추출하기 위해 수직방향으로 지연하기 위한 라인지연기와, 수평방향으로 지연하기 위한 다수의 화소지연기를 포함하는 것을 특징으로 하는 비월/순차주사전환회로.3. The interlaced / sequential scan switching circuit according to claim 2, wherein the delay means includes a line delay for delaying in the vertical direction to extract peripheral pixels, and a plurality of pixel delays for delaying in the horizontal direction. 영상신호로부터 보간될 화소의 값을 결정하는 비월/순차주사전환방법에 있어서, 상기 영상신호를 인가받아 보간될 화소의 주변에 있는 다수의 화소들을 추출하는 단계, 추출된 다수의 화소들중 보간될 화소를 기준으로 서로 대칭되는 두 화소들의 차이값을 감산하여 최소차이값을 갖는 두 화소를 선택하는 단계, 및 선택된 두 화소와 보간될 화소 전 라인에 있는 화소의 중간값을 연산하여 보간될 화소의 값을 결정하는 단계를 포함하는 비월/순차주사전환방법.An interlaced / sequential scan switching method for determining a value of a pixel to be interpolated from an image signal, the method comprising: extracting a plurality of pixels around the pixel to be interpolated by receiving the image signal, wherein the plurality of extracted pixels are to be interpolated Selecting two pixels having a minimum difference value by subtracting a difference value between two symmetrical pixels based on the pixel; and calculating a median value of pixels on the line before all the pixels to be interpolated with the selected two pixels. Interlaced / sequential scan conversion method comprising the step of determining a value. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910021648A 1991-11-29 1991-11-29 Interlace/non-interlace scanning transfer circuit and method thereof KR0166713B1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019910021648A KR0166713B1 (en) 1991-11-29 1991-11-29 Interlace/non-interlace scanning transfer circuit and method thereof

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Application Number Priority Date Filing Date Title
KR1019910021648A KR0166713B1 (en) 1991-11-29 1991-11-29 Interlace/non-interlace scanning transfer circuit and method thereof

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KR930011715A true KR930011715A (en) 1993-06-24
KR0166713B1 KR0166713B1 (en) 1999-03-20

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