KR930010929B1 - Digital audio equalizer apparatus - Google Patents

Abstract

The device comprises a CPU (30) for detecting the gain data of the central frequency and generating reset signals when the central frequency is updated, a level detector (40) for comparing digital audio input signal with the CPU's gain data and detecting the audio level, an attenuator (60) for attenuating the digital audio signal according to the detected signal of the level detector (40), and an equalizing process or (70) for equalizing the attenuated audio signal according to the central frequency and the gain data of the CPU (30).

Description

Digital audio equalizer device

1 is a frequency characteristic diagram when performing conventional equalization.

2 is a circuit diagram according to the present invention.

3 is a detailed circuit diagram of the level detector 40 in FIG.

* Explanation of symbols for main parts of the drawings

10: analog / digital converter 20: switch

30: CPU 40: level detector

50: display unit 60: attenuation unit

70: equalizer processing unit 80: digital / analog converter

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital equalizer device in an audio system, and more particularly, to a digital audio equalizer device that automatically detects a level of an audio signal and prevents overflow caused when boosting the equalizer.

In general, the equalizer function is to amplify a specific frequency of the input signal. When a digital equalizer is used, an overflow occurs in the digital equalizer, causing the output sound to be clipped.

For example, if the size of the digitally converted audio signal is 3 and the internal maximum data of the digital equalizer is 5, and the volume of the graphic equalizer is selected and doubled, the output data should be 6 as shown in FIG. 1a. Since the maximum data of is 5, clipping occurs when overflow occurs as shown in FIG.

As described above, when an overflow as shown in FIG. 1B occurs, the overflow state of the digital equalizer is displayed through the LED, and the user detects it to lower the input volume of the digital equalizer or the gain of the equalizer. There was a problem that the clipping phenomenon occurs during the boost up.

Accordingly, an object of the present invention is to provide a digital audio equalizer device that detects a level of an audio signal in an audio system and prevents a clipping phenomenon during boost up by the equalizer.

Another object of the present invention is to provide a digital audio equalizer device that prevents overflow by lowering the audio level when the boost up gain by the equalizer in the audio system exceeds the maximum value.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is a circuit diagram according to the present invention, in which an analog / digital converter 10 for converting an analog audio signal into a digital audio signal, a switch 20 for adjusting an equalizer, and an equalizer adjustment state of the switch 20 are shown. The CPU 20 detects and outputs a center frequency fo and gain data and generates a reset signal when the center frequency fo is updated, and an audio signal digitally converted by the analog / digital converter 10. A level detector 40 for inputting and detecting an audio level compared to the gain data sensed by the CPU 10, a display unit 50 for displaying the audio level detected by the level detector 40, and the analog / An attenuator 60 for attenuating the audio signal digitally converted by the digital converter 10 according to the audio level of the level detector 40 and an audio attenuated by the attenuator 60. An equalizer processor 70 performing equalization processing according to the center frequency fo and the gain data detected by the CPU 30, and a digital audio signal equalized by the equalizer processor 70 as an analog audio signal. It consists of the digital-to-analog converter 80 which converts and outputs.

3 is a detailed circuit diagram of the level detector 40 in FIG. 2, which includes an absolute value calculator 41 for inputting and outputting an absolute value by inputting a digital audio signal input through the input terminal P1, and the absolute value calculator 41. Inputs the memory 42 for sequentially storing the audio signal having an absolute value in s, an adder 43 for adding and outputting data sequentially stored in the memory 42, and the added data of the adder 43 A divider 44 for dividing a predetermined number and outputting averaged audio data, a decoder 45 for decoding and outputting gain data input through the input terminal P2, and an average processing output from the divider 44 And a clipping stage discriminating signal output from the comparator 46 and a comparator 46 for outputting a clipping generation discrimination signal by comparing the extracted audio data with the gain data decoded by the decoder 45. And flip-flops 47 for detecting the level of audio data.

One embodiment of the present invention based on the above-described configuration will be described in detail with reference to FIGS.

The analog audio signal input through the audio input terminal IN is converted into a digital audio signal by the analog / digital converter 10 and output. At this time, when the equalizer is boosted up by the switch 20, the CPU 30 senses and outputs the boosted center frequency fo and gain data.

Therefore, the level detector 40 which inputs the audio signal digitally converted by the analog / digital converter 10 detects the level of the audio signal in comparison with the gain data sensed and output by the CPU 30. At this time, the CPU 30 generates a reset signal whenever the center frequency fo is updated (Up Data). The level detecting unit 40 detects the level of the audio signal. Referring to FIG. 3, when the digital audio signal is input through the input terminal P1, the absolute value calculating unit 41 takes an absolute value and outputs the absolute value. The audio signal obtained by the absolute value calculating section 41 is stored in the memory 42 sequentially. The audio data sequentially stored in the memory 42 is input to the adder 43, and the current data and data up to (K-1) before are added and output. The divider 44, which inputs the audio data added by the adder 43, divides it into a predetermined number K and outputs the averaged processed audio data. When the gain data sensed and output from the CPU 30 is input through the input terminal P2, the decoder 45 decodes and outputs the gain data. The comparator 46 comparing the gain data decoded by the decoder 45 with the averaged audio data processed by the divider 44 outputs a clipping occurrence determination signal.

That is, when the averaged processed audio data is larger than the decoded gain data, the comparator 46 outputs a high signal so that clipping occurs and the averaged processed audio data is smaller than the decoded gain data. In this case, a low signal is output and no clipping occurs. When the output high signal of the comparator 46 becomes the output, the flip-flop 47 is not clocked, and thus outputs a low signal to the output terminal Q, which is reset during system initialization or by the reset signal of the CPU 30. State is maintained. In addition, the flip-flop 47 is reset by applying a reset signal to the AND gate AN1 through the input terminal P3 whenever the center frequency fo is updated.

When the level detector 40 detects the level of the audio signal as described above, the level of the detected audio signal is displayed on the display unit 50 and applied to the attenuator 60. Therefore, when the high signal is output from the level detector 60, the attenuator 60 shifts the digitally converted audio signal to the right by 1 bit and attenuates it to 1/2.

The equalizer processor 70 for inputting the audio signal attenuated by half in the attenuator 60 performs an equalization process by the center frequency fo and the gain data sensed and output by the CPU 30.

However, when the low signal is output from the level detector 40, the attenuator 60 outputs the digitally converted audio signal without attenuation. The equalizer processor 70 for inputting the audio signal that is not attenuated by the attenuator 60 performs an equalization process by the center frequency fo and the gain data detected and output by the CPU 30.

The digital audio signal equalized by the equalizer processor 70 is input to the digital / analog converter 80 and converted into an analog audio signal.

As described above, when the audio signal exceeds the maximum of the boost-up gain by the equalizer, the audio signal is attenuated by half to perform an equalizer to prevent overflow or clipping during boost-up by the equalizer. There is an advantage to that.

Claims (3)

A digital audio equalizer device of an audio system, comprising: a CPU 30 for detecting and outputting gain data of a center frequency fo according to an equalization adjustment state and generating a reset signal when the center frequency fo is updated; A level detector 40 for inputting a digital audio signal and comparing the gain data detected by the CPU 30 to detect an audio level, and attenuating the digital audio signal by attenuating the detected signal from the level detector 40. And an equalizer processor 70 for equalizing the audio signal attenuated by the attenuator 60 according to the center frequency fo and the gain data detected by the CPU 30. Characterized in that the device. The absolute value calculator 41 of claim 1, wherein the level detector 40 inputs and outputs an absolute value by inputting a digital audio signal input through the input terminal P1, and an absolute value from the absolute value calculator 41. A memory 42 for sequentially storing the audio signal obtained by the step S, an adder 43 for adding and outputting data sequentially stored in the memory 42, and the added data of the adder 43 to be inputted in a predetermined number. A divider 44 that divides and outputs averaged audio data, a decoder 45 that decodes and outputs gain data input through the input terminal P2, and averaged audio data that is an output of the divider 44; A comparator 46 which compares the gain data decoded by the decoder 45 and outputs a clipping occurrence determination signal, and inputs a clipping occurrence determination signal output from the comparator 46 to a clock stage. And a flip-flop (47) for detecting the level of audio data. 4. The apparatus of claim 3, wherein the attenuator (60) attenuates the digital audio signal when the level detection signal is high.