KR930009653B1 - Recording mode discriminating circuit - Google Patents

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Description

Record Mode Discrimination Circuit

1 is a block diagram of a circuit according to a first embodiment of the present invention.

2 is a block diagram of a circuit according to a second embodiment of the present invention.

3A is a scanning track explanatory diagram of a track pattern in which linearity is deteriorated.

3B and 3C show tracking error signal waveforms and shaped waveforms in the scan track of FIG. 3A.

4A to 4C show scanning tracks, signal waveforms and shaped waveforms when the recording pattern in the long time mode is reproduced in the standard mode.

5A to 5C show scanning tracks, signal waveforms, and stereo waveforms when the recording pattern in the standard mode is reproduced as 8 mm video having a stage difference in the head.

6A and 6B show comparisons of the output cycles and duty cycles of the integral circuit and the winding comparator, respectively.

7 is a waveform diagram of a tracking error signal according to a manufacturing error.

* Explanation of symbols for main parts of the drawings

1: band pass filter 2: mixer

3: injection oscillation circuit 4: 16k detection circuit

5: 46k detection circuit 6, 10: comparator

7 switching circuit 8 sampling pulse generating circuit

9: sample holding circuit 11: reverse switch

12 integral circuit 13 winding comparator

14: 15 Hz detection circuit 15: 7.5 Hz detection circuit

16: Flim-Flop 17, 18: Analog Switch

19: gate circuit 20: clock pulse generation circuit

The present invention relates to a recording mode discrimination circuit adopted for an 8mm video recordable in two modes, a standard mode and a long time mode.

In general, 8mm video records a pilot pilot signal on an FM picture signal without forming a control track. In reproduction, the tracking error signal is formed in accordance with the level ratio of the injection pilot signal and the specific two beat components of the reproduction pilot signal. Upon reproducing, the tracking error signal is normally supplied to the capstan servo so that the tape runs at the same constant speed as when recording.

On the other hand, this 8mm video has twice as long recording mode as the standard recording mode. When a tape recorded in the standard recording mode is played back in the long time mode, the tracking error signal changes in 8 filt cycles, and when the tape recorded in the long play mode is accidentally played back in the standard playback mode, the tracking error signal is in 4 filt cycles. Change. The tape recording speed discrimination circuit for 8mm video was introduced on February 8, 1985 by Sachio Yamashita.

And U.S. Patent Application No. 699,628 filed by Sanyo ELECTRIC CO., LTD.

When the period of the tracking error signal is counted, the tracking error signal preferably has a square wave. Therefore, it is preferable that the waveform is shaped to a threshold as a border by the comparator, but when the reproduction output level changes, the tracking error level changes greatly, so that it is difficult to set the threshold level and the linearity of the recording track is bad. It is difficult to shape an accurate waveform because a number of intersections, which are mostly 1, occur between the threshold level and the tracking error signal.

In addition, considering the reproduction characteristics of the video head, the reproduction level of the signal to be provided through the direct scanning operation of the track by the head gap has a characteristic of 6 dB / oct with respect to the reproduction signal frequency, and the reproduction pilot signal level is a reproduction file. It is directly proportional to the lot signal frequency. The reproduction level of the signal to be reproduced by the track deviated from the head gap varies with the signal frequency. Therefore, even if an ideal recording track is ideally scanned, the tracking error signal does not go to zero, and a change having a predetermined periodicity is assumed to change in accordance with the reproduction pilot signal frequency.

In addition, in actual 8mm video production, the width of the head gap is lower than the initial value due to the deterioration in quality during the head production. In addition, the mounting step may be caused even during the head mounting operation. Since the tracking error signal also changes with this change in the manufacturing process, the head scans the video track so that the average value of the tracking error signal is zero.

The change in the tracking error signal is then tested through the change in the head gap width, the head gap width and various changes in the head mounting step. FIG. 7 shows the tracking error signal waveform of the four-filtration portion when a recording track in an ideal standard mode with a track pitch of 20.5 mu m is reproduced in the standard mode. The signal waveform of the first stage shows the tracking error signal shape when the head gap width is 24 mu m, and the signal waveforms of the second and third stages are irregular at 23 mu m of the head gap width pair, which should be 24 mu m first. The tracking error signal waveform at the time is shown, and the signal waveforms at the fourth and fifth stages are the tracking error signal waveforms when the head gap width pair is extended to 28 m and 38 m. Incidentally, the tracking error signal waveform of each stage is a signal waveform when the second column has a step of 1 μm and the step of 2 μm of the third column when the first column does not have any step. The tracking error signal waveform can be obtained by known formulas.

As can be clearly seen from Fig. 7, when the head has a gap and the head has a mounting step, a tracking error signal waveform of 15 Hz is provided. However, if this unnecessary change of 15 Hz generates a tracking error signal when the recording pattern in the standard mode is correctly reproduced in the standard mode, the discriminant error is detected as in the case where the recording mode discrimination circuit watches the recording track in the long mode. Generate. In order to prevent this discrimination error, it is better to improve the discrimination circuit so that the discrimination output can only be transmitted when the tracking error signal changes to 15 Hz significantly exceeding the threshold level. Because the reproduction output level changes by about 10 dB, it is difficult to specify the threshold level because the variation width of the tracking error signal may change depending on the reproduction output level.

Therefore, the present invention provides a tracking error signal waveform shaping circuit suitable for shaping the waveform stably and reliably regardless of the linearity of the recording track for removing the above-mentioned defects.

The present invention also provides a recording mode discrimination circuit for tracking error signals that can stably and reliably shape waveforms regardless of changes in head gap widths, head mounting steps, and the like.

Thus, in the circuit of the present invention, the tracking error signal is sampled in the field period to input the sample retention output to the hysteresis comparator.

In addition, the present invention records by identifying the waveform by focusing on the fact that the tracking error signal waveform when the recording track in the long time mode is reproduced is a symmetric waveform and the unnecessary component of 15 Hz that will generate the tracking error signal due to the above-mentioned causes is an asymmetric waveform. It is suitable to eliminate the malfunction of the mode discrimination circuit. Therefore, in the present invention, the tracking error signal is input into the comparator, the period of the comparator output is identified, the duty cycle of the comparator output is identified and the long time mode is recorded during standard mode reproduction according to these two identification outputs. Identifying the playback of the track.

Hereinafter, with reference to the accompanying drawings will be described in detail with respect to objects and embodiments of the present invention.

The present invention will be described with reference to one embodiment adopted in a recording mode discrimination circuit suitable for discriminating between a tape recorded in a standard mode and a tape recorded in a double long time mode such that a normal playback operation is executed. 1 shows a circuit block diagram of a first embodiment of the present invention.

First, the reproduction pilot signal to be input into the mixer 2 through the band pass filter 1 is mixed with the injection pilot signal. An injection oscillation circuit comprising a 2-bit counter supplied with a head output changeover pulse (RF) as a counter input and suitable for sequentially switching the oscillation frequency to four values as recorded in response to the counter output (3). The injection pilot signal flows from). Of the bit components to be obtained from the mixer 2, the 16KHz component and the 46KHz component are input into the 16K detection circuit 4 and the 46K detection circuit 5, respectively, so that two detection outputs can be input into the comparator circuit 6. The comparison output is a kind of discontinuity wave in which the polarity of each field is reversed. Therefore, the switch circuit 7 having the head output changeover pulse RF as a control input introduces a continuous tracking error signal by alternately selecting the comparison output and the inverted output of the comparison output.

The tracking error signal has a waveform as shown by A ₁ and A ₂ in FIG. 3 when the linearity of the recording track is poor. In the first embodiment, this tracking error signal is sampled at the center of the scanning operation. Therefore, the sampling pulse generation circuit 8 generates a pulse delayed by 1/120 second when the head output switching pulse rises and falls as the sampling pulse. The sample holding circuit 9 accurately samples-holds the tracking error signal at the center of the scan (this corresponds to the center of the picture). Points P ₁ to P _{8 in} FIG. 3 are sampling points associated with waveforms A ₁ and A ₂ .

These sample holding outputs become waveforms shown by B ₁ and B ₂ in FIG. 3 and abrupt amplitude changes are eliminated. These sample retention outputs become the compare-side input of the comparator circuit 10 configured as a comparator of hysteresis. Positive-side threshold voltage V _H and negative-side threshold voltage V _L are optionally input by inverting switch 11 as a reference input of comparator circuit 10. . The inversion switch 11 selects the sub-side threshold voltage V _L when the output of the comparator circuit is high level, and selects the forward-side threshold voltage V _H when the output of the comparator circuit is low level.

Therefore, the output of the comparator circuit changes stably at a predetermined period. This comparator output is counted at a predetermined period in the discriminating circuit D by a clock pulse, and flows in the discriminating output to discriminate the recording mode.

This discriminant output is used to switch the rotational speed of the capstan motor, but this switching operation is omitted since it is known in the conventional 0.5 inch cassette type VYR field.

Next, the structure of the discriminating circuit D will be described in detail.

In general, an unnecessary component of 15 Hz of the tracking error signal causes the duty cycle to be 25% or 75% due to the asymmetry of the signal waveform.

In addition, the tracking error signal waveform when the recording pattern in the table reproduction mode is reproduced in the long time mode causes the duty cycle of the output of the hysteresis comparator circuit to be 50% due to symmetry. Therefore, in the first embodiment, the period is determined only when the duty cycle is 50%.

1 shows a circuit block diagram of a first embodiment of the present invention. In this embodiment, a tracking error signal is first input to a hysteresis comparator 10 suitable for switching to a two-value threshold level in accordance with the output state to shape the waveform. The integrating circuit 12 into which the output of this comparator circuit is input generates an integral output in accordance with the duty cycle. The winding comparator 13 to which this integral output is input transmits a high level output when the duty cycle of the integral output level is an output level corresponding to 40 to 60%. The analog switch 17 to be closed in the circuit by the high level output causes the output of the hysteresis comparator to be input into the 15 Hz detection circuit 14 and the 7.5 Hz detection circuit 15. These two detection circuits generate an output in the output period of the hysteresis comparator when the period coincides with the detection period by the counting operation of the output of the clock pulse generation circuit 20. These two detection outputs are input into the reset terminal and the set terminal of the next stage flip-flop 16. The output of the flip-flop is at a high level by reproducing the recording pattern in the standard mode, but at a low level by reproducing the recording pattern in the long mode, this output is a mode determination output. In FIG. 1, the analog switch 18 normally supplies the hysteresis comparator output to the integrating circuit 12 only in the normal regeneration mode to prohibit mode discrimination during special regeneration.

In the first embodiment, the integration circuit 12 and the winding comparator 13 correspond to the duty identification circuit, the 15 Hz detection circuit 14 and 7.5 Hz, the detection circuit 15 correspond to the period identification circuit, and the analog switch 17 and flip-flop 16 correspond to the discriminant output generating circuit.

Then, in the second embodiment shown in FIG. 2, the hysteresis comparator output is simultaneously input to the duty identification circuit and the period identification circuit so that the output of the period identification circuit can be controlled by the output of the duty identification circuit.

Therefore, in the second embodiment, the gate circuit 19 in which the 15 Hz detection output is provided as the signal input so that the output of the winding comparator 13 can be the control input of the gate circuit 19 is connected to the flip-flop 16. It is placed at the front end. Thus, the 15Hz detection output comes only when the duty cycle is 50%.

When the recording pattern mode and the reproduction mode are different, the FG signal, which is the rotation detection signal of the capstan motor, has a predetermined relationship with the tracking error period. That is, the count value when 7.5 Hz is counted in the long playback mode by the FG signal is the same as the count value when 15 Hz is counted by the FG signal in the standard playback mode. Therefore, the detection circuits 14 and 15 in the first and second embodiments can commonly input the FG signal when the FG signal is inputted instead of the fixed clock. That is, in the detection circuits 14 and 15, the period of the hysteresis comparator output is counted by the FG signal. The detection output inverts the T-type flip-flop 16 through the gate circuit 19.

The operation and effects of the recording mode determination circuit having the above-described structure will be described with reference to the following various waveforms.

First, the tracking error output becomes waveforms _shown by A ₁ and A ₂ in FIG. 3 when a recording track having poor linearity is scanned in the direction as shown in FIG. It should be noted that the waveform A ₂ shown by the dotted line is waveforms when the reproduction output level is larger than the waveform A ₁ shown by the solid line. When these waveforms are input to the hysteresis comparator and converted according to the output state, i.e., the threshold levels (V _H , V _L ) of the two positive and negative values, the comparator output waveforms become C ₁ , C ₂ .

The present invention does not cause any problem when the waveform A is input since the sample holding output samples the tracking error signal in the field period for input into the hysteresis comparator. Also, even when waveform B is inputted, this waveform is accurately shaped. Thus, since the tracking error signal is sampled in the longitudinal direction of the recording tape even if the linearity of the recording track is poor, by providing a positive waveform, a larger effect is provided.

Then, the case where the linearity of the recording track is excellent is provided.

4 shows the scanning track, the tracking error signal waveform, the sample holding output B ₃ and the output waveform of the hysteresis comparator when the recording track pattern recorded in the long time mode is reproduced in the standard mode. The tracking error signal waveform A ₃ is converted by the sample holding circuit to the sample holding output B ₃ . As is apparent from FIG. 4, the waveform A ₃ of the tracking error signal when the long time mode recording pattern is reproduced and scanned as shown by T ₃ is a symmetrical signal waveform. When the sample retention output B ₃ is input to the hysteresis comparator, the waveform C ₃ of the comparator output has a 50% duty cycle due to the symmetry of the input signal.

Next, FIG. 5 is a scanning track, tracking error signal waveform A ₄ when the reference track is recorded in the reference mode and the ideal track pattern is recorded in the 8 mm video standard mode with a headgear width of 24 µm and a mounting step of 2 µm. The output waveform of the sample retention output B ₄ and the hysteresis comparator is shown. The tracking error signal waveform A ₄ is converted by the sample holding circuit to the sample holding output B ₄ . As can be clearly seen from FIG. 5, when the scanning track T ₄ as shown in the 8 mm video is reproduced, the waveform A ₄ of the tracking error signal becomes an irregular waveform as shown, and the hysteresis comparator The duty cycle of the waveform of C ₄ is 75% due to asymmetry. Therefore, in the present invention, when the duty identification circuit detecting the duty cycle does not detect 50% of the duty when the change component of 15 Hz is generated within the tracking error component, the unnecessary component of 15 Hz may cause the switching operation of the reproduction mode to fail. Forbidden.

Therefore, according to the present invention, when unnecessary components of the tracking error signal of 15 Hz are identified to control the mode discrimination circuit, error discrimination caused by an error to be generated during the head manufacturing process or the head mounting process is eliminated, thus having a greater effect. Will be generated.

Although the present invention has been described in connection with the preferred embodiments with reference to the accompanying drawings, those skilled in the art can make various changes and modifications to the present invention. For example, a pair of 15 Hz and 7.5 Hz detection circuits 14, 15 may be driven by a head switch pulse RF instead of a clock pulse generated from the clock pulse generator 20. Such changes and modifications are intended to be included within the scope of the invention as defined by the appended claims.

Claims (3)

Tracking that outputs a tracking error signal formed by the level comparison of specific bit components generated by mixing an injection pilot signal and a reproduction pilot signal obtained by a tape of tracking pilot signals disposed and recorded on a video track An error signal circuit, and a mode discrimination circuit for outputting a mode discrimination output to discriminate two modes of a standard recording mode and a double long time recording mode by counting a change period of the tracking error signal, wherein the recording is performed. In an 8mm video that controls the rotational phase of the capstan motor to switch the rotational speed of the capstan motor in accordance with the output of the mode discrimination circuit, the recording mode discrimination circuit includes a sample holding circuit for sample-holding a tracking error signal in a field period. 9, the sample holding output of the comparator Comparator circuit 10 for converting the threshold level of the reference input according to the comparator output for input to the output, duty identification circuits 12 and 13 for identifying the duty cycle of the comparator output, mode according to the comparator output Mode discrimination output generating means for transmitting the discrimination output, and when the duty cycle is identified in the duty identification circuit, if the duty cycle is about 50%, a comparator output is sent to the mode discriminating output generating means, and the duty cycle is approximately And a switching circuit (17) for switching the duty identification circuit output in such a manner that the comparator output is cut off from being transmitted into the mode discrimination output generating means. Outputting a tracking error signal formed by comparing the levels of specific bit components generated by mixing a reproduction pilot signal and an injection pilot signal obtained by a tape composed of tracking pilot signals disposed and recorded on a video track. And a recording mode discrimination circuit for outputting a mode discrimination output for discriminating two modes of a standard recording mode and a double long time recording mode by counting a tracking error signal and a change period of the tracking error signal. In the 8mm video controlling the rotational phase of the capstan motor to switch the rotation speed of the capstan motor in accordance with the output of the mode discrimination circuit, a sample holding circuit 9 for holding a sample of the tracking error signal in the field period, the sample holding output To the comparator output Comparator circuit 10 for converting the threshold level of the reference input accordingly, duty identification circuits 12 and 13 for identifying the duty cycle of the comparator output, and period identification circuit 14 for identifying the period of the comparator output. 15) a mode discrimination output generation circuit 16 for transmitting a mode discrimination output in accordance with the period identification circuit output, and when the duty cycle is identified in the duty identification circuit, if the duty cycle is about 50%, the comparator output is And a switching circuit 17 for switching the duty identification circuit output in such a way that the comparator output is blocked from being transmitted to the period identification circuit if it is transmitted to the period identification circuit and the duty cycle is not about 50%. Record mode determination circuit. Tracking that outputs a tracking error signal formed by the level comparison of specific bit components generated by mixing an injection pilot signal and a reproduction pilot signal obtained by a tape of tracking pilot signals disposed and recorded on a video track An error signal circuit and a recording mode discrimination circuit for outputting a mode discrimination output to discriminate two modes of a standard recording mode and a double long time recording mode by counting a change cycle of the tracking error signal, In 8mm video, in which the rotational phase of the capstan motor is controlled to switch the rotational speed of the capstan motor in accordance with the output of the recording mode circuit, the recording mode discrimination circuit includes a sample holding circuit for sample holding a tracking error signal in a field period 9, the comparator input to the sample holding output A comparator circuit 10 for converting a threshold level of a reference input according to a comparator output for input, a duty identification circuit 12, 13 for identifying a duty cycle of the comparator output for identifying a period of the comparator output When the duty cycle is identified in the period identification circuit 14, 15, the mode discrimination output generating circuit 16 for transmitting the mode discrimination output in accordance with the period identification circuit output, and the duty identification circuit, the duty cycle is about 50%. If the period identification circuit output is sent to the mode discrimination output generating circuit, and the duty cycle is not about 50%, the duty cycle is switched off in such a way that the output is blocked from sending the output to the mode discrimination output generating circuit. Recording mode discrimination circuit comprising: a switching circuit (19).

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