KR930008807A - LDP screen stabilization circuit and method - Google Patents
LDP screen stabilization circuit and method Download PDFInfo
- Publication number
- KR930008807A KR930008807A KR1019910017204A KR910017204A KR930008807A KR 930008807 A KR930008807 A KR 930008807A KR 1019910017204 A KR1019910017204 A KR 1019910017204A KR 910017204 A KR910017204 A KR 910017204A KR 930008807 A KR930008807 A KR 930008807A
- Authority
- KR
- South Korea
- Prior art keywords
- signal
- video
- ldp
- screen
- clv
- Prior art date
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Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11B—INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
- G11B20/00—Signal processing not specific to the method of recording or reproducing; Circuits therefor
- G11B20/22—Signal processing not specific to the method of recording or reproducing; Circuits therefor for reducing distortions
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- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Television Signal Processing For Recording (AREA)
- Studio Devices (AREA)
Abstract
LDP 화면안정화회로 및 방법은 LD에 기록된 비디오정보를 재생하는 픽업과, 재생된 RF 신호를 영상신호로 변환하는 비디오 IC와, 시스템의 각부를 제어하는 시스템제어부와, 모드선택시 점프신호를 발생하는 발진부와, 점프신호의 발생과 동시에 CLV스캔신호발생부와, CLV스캔신호가 입력되는 동안 비디오 IC의 출력 영상신호를 클리핑하여 화면을 뮤팅시키는 클리핑부를 구비하여 하드웨어적으로 구현한 회로로서 이는 소프트웨어적으로도 가능하다.The LDP screen stabilization circuit and method include a pickup for reproducing video information recorded in the LD, a video IC for converting the reproduced RF signal into a video signal, a system controller for controlling each part of the system, and a jump signal for selecting a mode. A circuit implemented in hardware is provided with an oscillator, a CLV scan signal generator and a clipping unit for muting the screen by clipping the output video signal of the video IC while the CLV scan signal is input. It is also possible.
이와 같은 LDP 화면안정화회로 및 방법은 CLV스캔시 초래되는 화면의 열화를 방지할 수 있으며, 메모리 및 게이트어레이 등을 사용하지 않으므로 회로의 단가를 저하시킬수 있다.Such an LDP screen stabilization circuit and method can prevent screen deterioration caused by CLV scanning, and can reduce the unit cost of a circuit since a memory and a gate array are not used.
Description
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.
제1도는 종래의 LDP 화면안정화회로를 도시한 블록도,1 is a block diagram showing a conventional LDP screen stabilization circuit,
제2도는 본 발명에 따른 LDP 화면안정화회로를 도시한 블록도,2 is a block diagram showing an LDP screen stabilization circuit according to the present invention;
제3도는 제2도의 LDP 화면안정화회로의 주요부분에 대한 파형도.3 is a waveform diagram of a main part of the LDP screen stabilization circuit of FIG.
Claims (2)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910017204A KR930012165B1 (en) | 1991-10-01 | 1991-10-01 | Ldp picture stablizing circuit and method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1019910017204A KR930012165B1 (en) | 1991-10-01 | 1991-10-01 | Ldp picture stablizing circuit and method |
Publications (2)
Publication Number | Publication Date |
---|---|
KR930008807A true KR930008807A (en) | 1993-05-22 |
KR930012165B1 KR930012165B1 (en) | 1993-12-24 |
Family
ID=19320632
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1019910017204A KR930012165B1 (en) | 1991-10-01 | 1991-10-01 | Ldp picture stablizing circuit and method |
Country Status (1)
Country | Link |
---|---|
KR (1) | KR930012165B1 (en) |
-
1991
- 1991-10-01 KR KR1019910017204A patent/KR930012165B1/en not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
KR930012165B1 (en) | 1993-12-24 |
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