KR930006833Y1 - Dual oscillator using differential amp - Google Patents
Dual oscillator using differential amp Download PDFInfo
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- KR930006833Y1 KR930006833Y1 KR2019900016548U KR900016548U KR930006833Y1 KR 930006833 Y1 KR930006833 Y1 KR 930006833Y1 KR 2019900016548 U KR2019900016548 U KR 2019900016548U KR 900016548 U KR900016548 U KR 900016548U KR 930006833 Y1 KR930006833 Y1 KR 930006833Y1
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- circuit
- differential amplifier
- transistor
- oscillation
- dual
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- 230000009977 dual effect Effects 0.000 title claims description 13
- 230000010355 oscillation Effects 0.000 claims description 30
- 230000006641 stabilisation Effects 0.000 claims description 11
- 238000011105 stabilization Methods 0.000 claims description 11
- 239000003990 capacitor Substances 0.000 claims description 6
- 238000000034 method Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 7
- 230000003321 amplification Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/08—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance
- H03B5/12—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device
- H03B5/1206—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification
- H03B5/1212—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair
- H03B5/1215—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising lumped inductance and capacitance active element in amplifier being semiconductor device using multiple transistors for amplification the amplifier comprising a pair of transistors, wherein an output terminal of each being connected to an input terminal of the other, e.g. a cross coupled pair the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03B—GENERATION OF OSCILLATIONS, DIRECTLY OR BY FREQUENCY-CHANGING, BY CIRCUITS EMPLOYING ACTIVE ELEMENTS WHICH OPERATE IN A NON-SWITCHING MANNER; GENERATION OF NOISE BY SUCH CIRCUITS
- H03B5/00—Generation of oscillations using amplifier with regenerative feedback from output to input
- H03B5/20—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator
- H03B5/24—Generation of oscillations using amplifier with regenerative feedback from output to input with frequency-determining element comprising resistance and either capacitance or inductance, e.g. phase-shift oscillator active element in amplifier being semiconductor device
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L1/00—Stabilisation of generator output against variations of physical values, e.g. power supply
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
Abstract
내용 없음.No content.
Description
제1도는 종래의 듀얼 발진 회로의 블록 구성도.1 is a block diagram of a conventional dual oscillation circuit.
제2도는 본 고안의 듀얼 발진 회로의 블록 구성도.2 is a block diagram of a dual oscillation circuit of the present invention.
제3도는 본 고안의 상세한 회로 구성도.3 is a detailed circuit diagram of the present invention.
제4도는 역위상을 갖는 듀얼 발진신호의 파형도.4 is a waveform diagram of a dual oscillation signal having an antiphase.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
10 : 위상 지연회로 20 : 차동증폭기10: phase delay circuit 20: differential amplifier
30 : 피드백회로 40 : 전류 안정화회로30: feedback circuit 40: current stabilization circuit
본 고안은 차동증폭기를 이용한 듀얼 발진회로에 관한 것으로, 특히 차동증폭기의 제1입력과 제2출력이 동위상인 점을 이용 발진회로의 기본 원리인 포지티브 피드백을 시켜 서로 역위상인 2개의 발진신호를 얻도록 한 듀얼 발진회로에 관한 것이다.The present invention relates to a dual oscillation circuit using a differential amplifier. In particular, the first input and the second output of the differential amplifier are in phase to give positive feedback, which is the basic principle of the oscillation circuit, to generate two oscillation signals that are out of phase with each other. To a dual oscillation circuit.
통신분야에서 발진회로는 송신과 수신을 위해서 반드시 필요한 회로중 하나이며, 통신방식에 따라 서로 위상이 틀린 동일 주파수의 2개의 발진신호를 필요로 하는 경우가 있다.In the communication field, an oscillator circuit is one of circuits necessary for transmission and reception, and there are cases where two oscillation signals of the same frequency are out of phase with each other according to a communication method.
제1도는 일반적인 듀얼 발진회로의 기본적인 회로 구성도로써 증폭회로(A)에 피이드백 회로(β)를 걸어 발진회로를 구성하고 이를 발진회로의 출력단에 위상지연회로(10)를 설치하여, 상호간에 90° 또는 180°등의 위상차를 갖는 두개의 발진신호(V1, V2)를 얻고 있다.FIG. 1 is a basic circuit diagram of a general dual oscillation circuit. The feedback circuit β is applied to the amplification circuit A to form an oscillation circuit, and the phase delay circuit 10 is installed at the output terminal of the oscillation circuit. Two oscillation signals V 1 and V 2 having a phase difference of 90 ° or 180 ° are obtained.
따라서, 종래에는 두 위상차 신호를 얻기 위하여 별도의 위상지연회로가 부가되어 원가상승의 원인이 되었다.Therefore, conventionally, a separate phase delay circuit is added to obtain two phase difference signals, causing a cost increase.
본 고안은 상기한 종래의 단점을 개선하기 위하여 안출한 것으로, 두 위상차 신호를 얻기 위하여 별도의 위상지연회로 없이 차동증폭기를 이용하여 서로 역위상인 2개의 발진신호를 얻는 듀얼 발진회로를 제공함에 있다.The present invention has been made to improve the above-mentioned disadvantages, and provides a dual oscillation circuit which obtains two oscillation signals that are out of phase with each other using a differential amplifier without a separate phase delay circuit to obtain two phase difference signals. .
상기한 본 고안의 목적을 달성하기 위한 기술적 구성으로는, 제1, 제2입력과 제1, 제2출력을 갖는 차동증폭기와, 상기 제2출력을 제1입력에 피드백시키는 피드백회로와, 상기 차동증폭기의 AC 임피던스는 크게 하고 소망하는 바이어스 전류를 제공해주는 전류 안정화 회로로 구성하고, 상기 차동증폭기는 2개의 차동트랜지스터 콜렉터에서 2개의 출력을 인출하고 피드백회로내의 콘덴서와 출력단에 연결된 콘덴서의 비율에 의해 발진레벨조정이 가능하도록 하며, 상기 전류 안정화 회로는 트랜지스터에 제너 다이오드를 연결하여, 제너다이오드가 항시 제너전압 이상으로 바이어스되어 트랜지스터의 에미터 저항에 걸리는 전압을 일정하게 유지시켜 주도록 함에 특징이 있다.The technical configuration for achieving the object of the present invention is a differential amplifier having a first, second input and the first, second output, a feedback circuit for feeding back the second output to the first input, and The differential amplifier consists of a current stabilization circuit which increases the AC impedance and provides the desired bias current. The differential amplifier draws two outputs from two differential transistor collectors and is proportional to the ratio of the capacitors in the feedback circuit to the capacitors connected to the output stage. By controlling the oscillation level, the current stabilization circuit is characterized in that the zener diode is connected to the transistor so that the zener diode is always biased above the zener voltage to keep the voltage applied to the emitter resistance of the transistor constant. .
이하 첨부된 도면에 의하여 본 고안의 바람직한 실시예를 상세히 설명하면 다음과 같다.Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.
제2도는 본 고안의 전체 회로도로서 제1입력(1)과 제2입력(2), 제1출력(3)과, 제2출력(4)를 갖는 차동증폭기(20)와 상기 제2출력(4)을 피드백시켜 제1입력(1)에 연결하는 피드백 회로(30)로 구성된다.2 is an overall circuit diagram of the present invention, and the differential amplifier 20 having the first input 1, the second input 2, the first output 3, and the second output 4 and the second output ( And a feedback circuit 30 for feeding back 4) to the first input 1.
제3도는 본 고안의 구체적인 회로구성도로써, 상기 차동증폭기(20)는 Vcc전압단에 연결된 콜렉터 저항(RC1) 및 전류 안정화 회로(40)를 거쳐 -VEE전압단에 연결된 에미터 저항(RE1)을 갖는 제1트랜지스터(Q1)와 또다른 콜렉터 저항(RC2) 및 에미터 저항(RE1)을 갖는 제2트랜지스터(RE2)를 대칭시켜 구성하고, 상기 제1, 2 트랜지스터(Q1,Q2)의 각 콜렉터단에서 제1, 2발진 신호(V1, V2)가 출력되게 구성한다.3 is a detailed circuit diagram of the present invention, wherein the differential amplifier 20 has an collector resistor RC 1 connected to the Vcc voltage terminal and an emitter resistor connected to the -V EE voltage terminal via the current stabilization circuit 40. RE 1) a first transistor (Q 1) and another collector resistor (RC 2) and the emitter resistance (second transistor (RE 2) symmetrically to configure, and the first and second transistors having a RE 1) having a The first and second oscillation signals V 1 and V 2 are configured to be output at each collector terminal of (Q 1, Q 2 ).
또한 상기 제2트랜지스터(Q2)의 제2발진신호(V2)는 코일(L) 및 콘덴서(C1)로 구성되며 발진주파수를 결정하는 피이드백 회로(30)를 통하여 제1트랜지스터(Q1)의 베이스로 입력되게 구성하고, 제2트랜지스터(Q2)의 베이스는 그라운드시켜 구성한다.In addition, the second oscillation signal (V 2 ) of the second transistor (Q 2 ) is composed of a coil (L) and a capacitor (C 1 ) and through the feedback circuit 30 to determine the oscillation frequency of the first transistor (Q) 1 ) and the base of the second transistor Q 2 is grounded.
한편 상기 전류 안정화 회로(40)는 그라운드된 베이스 저항(RB) 및 -VEE전압을 트랜지스터(Q3)의 베이스로 제공하기 위한 제너다이오드(ZD)로 구성된다.Meanwhile, the current stabilization circuit 40 is composed of a zener diode ZD for providing a grounded base resistor R B and a -V EE voltage to the base of the transistor Q 3 .
이와같이 구성된 본 고안의 작용 및 효과를 설명하면 다음과 같다.Referring to the operation and effects of the present invention configured as described above are as follows.
상기 차동증폭기(20)의 발진 동작원리를 설명하면, 제1트랜지스터(Q1)의 베이스에는 공중의 미세한 노이즈성분이 입력되어 증폭되므로 제1,2트랜지스터(Q1, Q2)의 콜렉터단에서는 각각의 증폭된 노이즈 신호가 나타나게 된다.Referring to the oscillation operation principle of the differential amplifier 20, since the fine noise component of the air is input to the base of the first transistor Q 1 and amplified, the collector stages of the first and second transistors Q 1 and Q 2 Each amplified noise signal will appear.
이중에서 상기 제2트랜지스터(Q2)의 출력단에 나타나는 출력신는 피드백회로(30)를 통하여 제1트랜지스터(Q1)의 베이스에 포지티브 피드백 되므로 비로서 발진이 일어나게 되며 이때 전류 안정화회로(4)에 의해 서로 180°(〈)의 위상차를 갖는 동일 주파수의 듀얼 발진신호(V1, V2)가 제1,2트랜지스터(Q1, Q2)의 각 콜렉터단에서 출력되게 된다.(제4도 참조).Among them, the output signal appearing at the output terminal of the second transistor Q 2 is positively fed back to the base of the first transistor Q 1 through the feedback circuit 30, so that oscillation occurs at a rate. As a result, the dual oscillation signals V 1 and V 2 of the same frequency having a phase difference of 180 ° (<) are output from each collector terminal of the first and second transistors Q 1 and Q 2 . Reference).
이때 주파수성분을 선택하여 발진주파수를 결정하게 되는 상기 피드백회로(30)의 콘덴서(C1)와 제2트랜지스터(Q2)의 콜렉터 출력단에 연결된 콘덴서(C2)의 비율에 의해 피드백 비율이 달라지므로 발진레벨의 조정이 가능하게 되며, 제1, 2트랜지스터(Q1, Q2)의 에미터단에 연결된 저항값(RE1, RE2)에 의해 이득 안정화 및 입력 임피던스가 커지게 되어 선형발진영역이 넓어지게 된다.At this time, the feedback ratio varies depending on the ratio of the capacitor C 1 of the feedback circuit 30 and the capacitor C 2 connected to the collector output terminal of the second transistor Q 2 to determine the oscillation frequency by selecting a frequency component. As the oscillation level can be adjusted, gain stabilization and input impedance are increased by the resistance values RE 1 and RE 2 connected to the emitter terminals of the first and second transistors Q 1 and Q 2 . This widens.
이때 차동증폭기(20)의 동작은 상기 차동 트랜지스터(Q1, Q2)의 공통 에미터 접점(21)에서의 AC 임피던스가 클수록 안정하게 되므로 -VEE전압이 큰 저항을 통하여 상기 공통 에미터 접점(21)에 인가되게 하기도 하는데, 이 경우 에미터 바이어스 전류가 줄어들게 되어 차동증폭기(20)의 안정된 동작이 보장되지 않게 된다.At this time, the operation of the differential amplifier 20 becomes more stable as the AC impedance at the common emitter contact 21 of the differential transistors Q 1 and Q 2 increases, so that the common emitter contact is made through a resistor having a large -V EE voltage. It is also applied to (21), in which case the emitter bias current is reduced so that the stable operation of the differential amplifier 20 is not guaranteed.
이점을 고려하여 본 고안에서는 상기 차동증폭기(20)의 AC 임피던스를 크게 하고 적당한 바이어스 전류를 공급해주기 위해 전류 안정화 회로(40)를 채택하고 있다.In consideration of this, the present invention adopts the current stabilization circuit 40 to increase the AC impedance of the differential amplifier 20 and to supply an appropriate bias current.
상기 전류 안정화회로(40)의 동작은 제너다이오드(ZD)가 항시 제너전압(Vz)이상으로 역 바이어스 되어 트랜지스터(Q3)의 에미터 저항(RE)에 걸리는 전압을 항상 일정하게 유지시켜 주게 되므로 안정된 바이어스전류를 에미터 공통접점(21)에 공급하게 된다.In the operation of the current stabilization circuit 40, the zener diode ZD is always reverse biased above the zener voltage Vz so that the voltage applied to the emitter resistance RE of the transistor Q 3 is always kept constant. The stable bias current is supplied to the emitter common contact 21.
이상에서 설명한 바와같은 본 고안은 차동증폭기와 피이드백 회로와 제너다이오드를 가지는 전류 안정화 회로를 유기적으로 결합시켜 위상변환기 없이 180°의 위상차를 가지는 동일주파수의 발진신호를 출력시킬 수 있게 되므로, 통신 시스템의 신호변, 복조시 듀얼 발진신호가 요구되는 경우에 회로 구성의 간략화에 따른 세트 사이즈 축소 및 원가절감을 기대할 수 있게 된다.As described above, the present invention organically combines a differential amplifier, a feedback circuit and a current stabilization circuit having a zener diode to output an oscillation signal of the same frequency having a phase difference of 180 ° without a phase shifter. When dual oscillation signals are required for signal modulation and demodulation, the set size and cost reduction can be expected according to the simplified circuit configuration.
Claims (3)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019900016548U KR930006833Y1 (en) | 1990-10-31 | 1990-10-31 | Dual oscillator using differential amp |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR2019900016548U KR930006833Y1 (en) | 1990-10-31 | 1990-10-31 | Dual oscillator using differential amp |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR920008522U KR920008522U (en) | 1992-05-20 |
| KR930006833Y1 true KR930006833Y1 (en) | 1993-10-07 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019900016548U KR930006833Y1 (en) | 1990-10-31 | 1990-10-31 | Dual oscillator using differential amp |
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| Country | Link |
|---|---|
| KR (1) | KR930006833Y1 (en) |
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1990
- 1990-10-31 KR KR2019900016548U patent/KR930006833Y1/en not_active IP Right Cessation
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| Publication number | Publication date |
|---|---|
| KR920008522U (en) | 1992-05-20 |
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