KR930006727A - Sense Amplifiers in Memory Cells - Google Patents

Sense Amplifiers in Memory Cells Download PDF

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Publication number
KR930006727A
KR930006727A KR1019910015347A KR910015347A KR930006727A KR 930006727 A KR930006727 A KR 930006727A KR 1019910015347 A KR1019910015347 A KR 1019910015347A KR 910015347 A KR910015347 A KR 910015347A KR 930006727 A KR930006727 A KR 930006727A
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South Korea
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channel mosfet
drain
source
gate
channel
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KR1019910015347A
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Korean (ko)
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KR940005687B1 (en
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장성준
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정몽헌
현대전자산업 주식회사
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
  • Amplifiers (AREA)

Abstract

본 발명은 메모리의 셀(Cell)에 쓰여진 데이타를 읽을때 사용되는 감지증폭기(Sense Amplifier)에 관한 것으로, MOSFET의 턴온(turn on)정도와 전류를 조절하고 궤환시켜 더욱 큰 전압차를 발생시켜 전력의 소모 및 지연시간을 감소시키기 위한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a sense amplifier used to read data written to a cell of a memory. The present invention controls a turn-on degree and a current of a MOSFET to generate a larger voltage difference, thereby generating power. To reduce the consumption and delay time of the.

따라서, 본 발명은 메모리의 셀에 쓰여진 데이타를 감지하기 위한 감지 증폭기에 있어서, PCM(Paired Current Mirror)센스 증폭수단(10), 제1및 제2 신호 전달 수단(20,30), 피드백 수단(40), 및 드라이빙수단(50)으로 구성되는 것을 특징으로 한다.Accordingly, the present invention provides a sense amplifier for sensing data written to a cell of a memory, comprising: a paired current mirror (PCM) sense amplifying means (10), first and second signal transmitting means (20, 30), and a feedback means ( 40, and the driving means 50 is characterized in that.

Description

메모리셀의 감지 증폭기Sense Amplifiers in Memory Cells

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 감지 증폭기의 회로도.2 is a circuit diagram of a sense amplifier according to the present invention.

Claims (5)

메모리의 셀에 쓰여진 데이타를 감지하기 위한 감지 증폭기에 있어서; 상기 메모리의 셀에 저장된 데이타가 전달되는 비트선/ 비트바선(bit/bitB)연결되고 제1인에이블 신호(SAE1)가 입력되는 PCM(Paired Current Mirror)센스 증폭수단(10), 상기 PCM 센스 증폭수단(10)에 연결되어 상기 PCM 센스 증폭수단(10)으로 부터 출력되는 신호(S, SB)를 입력으로 하는 제1및 제2신호 전달 수단(20, 30), 상기 제 1및 제2신호전달수단(20, 30)에 연결되어 상기 PCM 센스 증폭수단(10)으로 부터 출력되는 신호(S, SB)를 피드백시켜 중폭시키는 피드백 수단(40), 및 상기 제1및 제2신호 전달 수단(20, 30)과 피드백 수단(40)에 연결되고 제2인에이블 신호(SAE2)가 입력되어 상기 제2인에이블 신호(SAE2)에 따라 동작되는 드라이빙수단(50)으로 구성되는 것을 특징으로 하는 감지 증폭기.13. A sense amplifier for sensing data written to cells in a memory; Paired current mirror (PCM) sense amplification means (10) connected to a bit line / bit bar (bit / bitB) through which data stored in a cell of the memory is transferred and a first enable signal SAE1 is input, and the PCM sense amplification means. First and second signal transmitting means (20, 30), the first and second signals being connected to the means (10) and receiving the signals (S, SB) output from the PCM sense amplifying means (10). A feedback means 40 which is connected to the transmission means 20 and 30 and feeds back the signals S and SB output from the PCM sense amplification means 10 and amplifies it, and the first and second signal transmission means ( 20, 30 and a feedback means 40, the second enable signal (SAE2) is input, the sensing means characterized in that it comprises a driving means 50 is operated in accordance with the second enable signal (SAE2) amplifier. 제1항에 있어서, 상기 PCM 센스 증폭수단(10)은 전원에 소오스가 연결되고 드레인으로 상기 신호(S)를 출력하는 제1 P채널 MOSFET(P12), 전원에 소오스가 연결되고 상기 제1P채널 MOSFET(P12)의 게이트에 드레인과 게이트가 연결된 제2P채널 MOSFET(P11), 상기 제2P채널 MOSFET(P11)의 드레인에 드레인이 연결되고 상기 비트선(bit)에 게이트가 연결된 제 1 n채널 MOSFET(N25), 상기 제1P채널 MOSFET(P12)의 드레인에 드레인이 연결되고 상기 비트바선(bitB)에 게이트가 연결되고 상기 제1n채널 MOSFET(N25)의 소오스에 소오스가 연결된 제2n채널 MOSFET(N26), 상기 제2 n채널 MOSFET(N26)의 소오스에 드레인이 연결되고 상기 제1 인에 이블 신호(SAE1)를 게이트 입력으로 하고 소오스는 접지된 제3 n채널 MOSFET(M27), 전원에 소오스가 연결되고 드레인으로 상기 신호(SB)를 출력하는 제3P채널 MOSFET(P13), 전원에 소오스가 연결되고 상기 제3 P채널 MOSFET(P13)의 게이트에 드레인과 게이트가 연결된 제4 P채널 MOSFET(P14), 상기 제3 P채널 MOSFET(P13)의 드레인에 드레인이 연결되고 상기 비트선(bit)에 게이트가 연결된 제4 n채널 MOSFET(N28), 상기 제4 P채널 MOSFET(P14)의 드레인에 드레인이 연결되고 상기 비트바선(bitB)에 게이트가 연결되고 상기 제4 n채널 MOSFET(N28)의 소오스에 소오스가 연결된 제5n채널 MOSFET(N29), 및 상기 제5 n채널 MOSFET(N29)의 소오스에 드레인이 연결되고 상기 제1 인에이블 신호(SAE1)를 게이트 입력으로 하고 소오스는 접지된 제6n채널 MOSFETN(N30)로 구성되는 것을 특징으로 하는 감지 증폭기.The PCM sense amplifying means (10) of claim 1, wherein the PCM sense amplifying means (10) has a first P-channel MOSFET (P12) having a source connected to a power source and outputting the signal (S) to a drain, and a source connected to a power source and the first P channel. A second P-channel MOSFET P11 having a drain and a gate connected to a gate of the MOSFET P12, a first n-channel MOSFET having a drain connected to a drain of the second P-channel MOSFET P11 and a gate connected to the bit line; (N25), a second n-channel MOSFET N26 having a drain connected to a drain of the first P-channel MOSFET P12, a gate connected to the bit bar line bitB, and a source connected to a source of the first n-channel MOSFET N25. ), A drain is connected to the source of the second n-channel MOSFET (N26), the first enable signal (SAE1) is a gate input, and the source is a grounded third n-channel MOSFET (M27). A third P-channel MOSFET P13 connected to and outputting the signal SB to a drain; A fourth P-channel MOSFET P14 having a source connected thereto and a drain and a gate connected to a gate of the third P-channel MOSFET P13, a drain connected to a drain of the third P-channel MOSFET P13, and the bit line ( a fourth n-channel MOSFET N28 having a gate connected to a bit, a drain connected to a drain of the fourth P-channel MOSFET P14, a gate connected to the bit bar line bitB, and a fourth n-channel MOSFET N28. The fifth n-channel MOSFET N29 having a source connected to the source of the N / N, and a drain connected to the source of the fifth n-channel MOSFET N29, the first enable signal SAE1 being a gate input, and the source being grounded. And a sixth n-channel MOSFET N (N30). 제1항에 있어서, 상기 제1및 제2신호 전달수단(20, 30)은 전원(Vdd)에 소오스가 연결되고 상기 PCM 센스 증폭수단(10)의 출력 신호(S 또는 SB)를 게이트 입력으로 하고 상기 피드백 수단(40)에 드레인이 연결된 P채널 MOSFET(P20, P21), 및 상기 P채널 MOSFET(P20, P21)의 드레인에 드레인이 연결되고 상기 PCM 센스 증폭수단(10)의 출력 신호 (S또는 SB)를 게이트 입력으로 하고 상기 드라이빙 수단(50)에 소오스가 연결된 n채널 MOSFET (N20, N23)으로 구성되는 것을 특징으로 하는 감지 증폭기.2. The first and second signal transfer means (20, 30) of claim 1, wherein the source is connected to a power supply (Vdd) and the output signal (S or SB) of the PCM sense amplification means (10) as a gate input. P-channel MOSFETs P20 and P21 having a drain connected to the feedback means 40, and a drain connected to the drains of the P-channel MOSFETs P20 and P21 and an output signal S of the PCM sense amplifying means 10. Or n-channel MOSFETs (N20, N23) whose source is connected to the driving means (50) with SB as the gate input. 제1항에 있어서, 상기 피드백 수단(40)은 커플링 구조로 구성된 n채널 MOSFET (N21, N22)로 구성되는 것을 특징으로 하는 감지 증폭기.2. A sense amplifier according to claim 1, wherein the feedback means (40) consists of n-channel MOSFETs (N21, N22) configured in a coupling structure. 제1항에 있어서, 상기 드라이빙수단(50)은 상기 제1 및 제2 신호전달수단(20, 30)과 피드백 수단(40)에 드레인이 연결되고 상기 제2인에이블 신호(SAE2)를 게이트 입력으로 하는 n채널 MOSFET(N24)로 구성되는 것을 특징으로 하는 감지 증폭기.The driving device 50 of claim 1, wherein the driving means 50 has a drain connected to the first and second signal transmission means 20 and 30 and the feedback means 40, and a gate input of the second enable signal SAE2. A sense amplifier comprising an n-channel MOSFET (N24). ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019910015347A 1991-09-03 1991-09-03 Sense amplifier of the memory cell KR940005687B1 (en)

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KR1019910015347A KR940005687B1 (en) 1991-09-03 1991-09-03 Sense amplifier of the memory cell

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KR1019910015347A KR940005687B1 (en) 1991-09-03 1991-09-03 Sense amplifier of the memory cell

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KR930006727A true KR930006727A (en) 1993-04-21
KR940005687B1 KR940005687B1 (en) 1994-06-22

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