KR930004898Y1 - Resetting circuit for protection of low-voltage - Google Patents

Resetting circuit for protection of low-voltage Download PDF

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Publication number
KR930004898Y1
KR930004898Y1 KR2019880006706U KR880006706U KR930004898Y1 KR 930004898 Y1 KR930004898 Y1 KR 930004898Y1 KR 2019880006706 U KR2019880006706 U KR 2019880006706U KR 880006706 U KR880006706 U KR 880006706U KR 930004898 Y1 KR930004898 Y1 KR 930004898Y1
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voltage
transistor
capacitor
reset
low
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KR2019880006706U
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Korean (ko)
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KR890023501U (en
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한경해
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주식회사 금성사
최근선
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/24—Resetting means
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/30—Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02—Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/26—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback
    • H03K3/28—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback
    • H03K3/281—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator
    • H03K3/286—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable
    • H03K3/2865—Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of bipolar transistors with internal or external positive feedback using means other than a transformer for feedback using at least two transistors so coupled that the input of one is derived from the output of another, e.g. multivibrator bistable ensuring a predetermined initial state when the supply voltage has been applied; storing the actual state when the supply voltage fails

Abstract

내용 없음.No content.

Description

저전압 보호용 리세트회로Reset circuit for low voltage protection

제1도는 종래의 회로도.1 is a conventional circuit diagram.

제2도는 본 고안의 회로도.2 is a circuit diagram of the present invention.

* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings

BD : 브리지회로 CA, CB: 캐패시터BD: Bridge circuit C A , C B : Capacitor

RA, RB, RC, RD, RE, RF: 저항 ZDA, ZDB: 제너다이오드R A , R B , R C , R D , R E , R F : Resistor ZD A , ZD B : Zener Diode

QA, QB: 트랜지스터 DA, DB: 다이오드Q A , Q B : Transistor D A , D B : Diode

본 고안은 일정 전압 이하의 저전압에서 마이크로프로세서를 리세트(RESET)시킴으로써 소자의 동작을 중지시킴과 동시에 마이크로프로세서의 초기 리세트조건을 만족시키도록 한 저전압 보호용 리세트회로에 관한 것이다.The present invention relates to a reset circuit for low voltage protection that stops the operation of the device by resetting the microprocessor at a low voltage below a predetermined voltage and simultaneously satisfies the initial reset condition of the microprocessor.

종래의 저전압 보호용 리세트회로는 제1도에 도시한 바와 같이 트랜스(T)의 2차측에 다이오드(D1), (D2), (D3)와 캐패시터(C1), (C2)로 결합된 캐패시터 필터를 구성하고, 트랜지스터(Q1, Q2)와 저항(R2), (R7)과 제너다이오드(ZD2), (ZD3) 및 다이오드(D4), (D5)로 정전압회로를 구성하며, 상기 트랜지스터(Q1)의 콜렉터와 트랜스(T)의 중간 탭(GND) 사이에 저항(R1)과 제너다이오드(ZD1)를 직렬로 연결시킴과 동시에 저항(R3), (R4)을 트랜지스터(Q3)의 베이스에 연결하고, 그 콜렉터를 저항(R5)에 연결함과 동시에 트랜지스터(Q3)의 베이스에 연결하며, 그 콜렉터에 저항(R6)과 콘덴서(C3)를 결합하여 마이크로프로세서의 리세트단에 연결된 리세트회로로 구성되어 있다.In the conventional low voltage protection reset circuit, as shown in FIG. 1, diodes D 1 , D 2 , D 3 , capacitors C 1 , and C 2 are located on the secondary side of the transformer T. A capacitor filter coupled to the transistors, transistors (Q 1 , Q 2 ), resistors (R 2 ), (R 7 ), zener diodes (ZD 2 ), (ZD 3 ), and diodes (D 4 ), (D 5) ) And a resistor (R 1 ) and a zener diode (ZD 1 ) are connected in series between the collector of the transistor (Q 1 ) and the middle tap (GND) of the transformer (T). R 3 ), (R 4 ) are connected to the base of transistor Q 3 , the collector is connected to resistor R 5 , and at the same time to the base of transistor Q 3 , and the resistor (R) to the collector. 6 ) Reset the microprocessor by combining the capacitor (C 3 ) It consists of a reset circuit connected to the stage.

상술한 바와 같이 구성된 종래의 저전압 보호용 리세트 회로는 하기와 같이 동작된다.The conventional low voltage protection reset circuit configured as described above operates as follows.

트랜스(T)의 일차측에 교류전압이 인가되면 그 트랜스(T)의 2차측에 연결된 캐패시터(C1)의 양단전압이 점점 증가하기 시작하여 일정전압을 초과하게 되면 제너다이오드(ZD1)에 전압이 유지되고, 그 전압이 저항(R3), (R4)에 전압분배되어 트랜지스터(Q3)를 도통시키게 된다. 이에 따라 상기 트랜지스터(Q3)의 콜렉터에 연결된 트랜지스터(Q4)의 베이스단이 0.6V이하로 되어 그 트랜지스터를 차단시키게 되므로, 마이크로 프로세서의 리세트단은 기준전압(Vcc)이 캐패시터(C3)를 충전시킴으로써 서서히 기준전압(Vcc)과 일치하게 되어 리세트단이 하이(H)상태로 되고, 또한 마이크로프로세서에서 요구되는 리세트 시간을 만들어줌으로써 일정전압 이하인 경우에 상기 트랜지스터(Q3)이 베이스단이 0.6V이하로 되어 차단됨과 동시에 트랜지스터(Q4)가 도통되어 캐패시터(C3)에 충전된 전하가 방출되므로 리세트단을 로우(L)상태로 유지시켜 마이크로프로세서에서 리세트를 시키게 된다. 보통 마이크로 프로세서의 리세트시에 요구되는 시간은 기준전압(Vcc)이 0.9Vcc가 된후, 리세트단이 2μsec 이상 로우(L)를 유지해야 리세트되므로 2μsec 이상이 되어야 한다.When an AC voltage is applied to the primary side of the transformer T, the voltage across the capacitor C 1 connected to the secondary side of the transformer T gradually increases, and when the voltage exceeds the predetermined voltage, the zener diode ZD 1 is applied. The voltage is maintained, and the voltage is divided by the resistors R 3 and R 4 to conduct the transistor Q 3 . As a result, the base terminal of the transistor Q 4 connected to the collector of the transistor Q 3 is set to 0.6 V or less, and the transistor is shut off, thus resetting the microprocessor. The stage is reset by gradually matching the reference voltage Vcc by charging the capacitor C 3 with the reference voltage Vcc. When the stage becomes high (H) and the reset time required by the microprocessor is lowered below a certain voltage, the transistor Q 3 is cut off with the base terminal below 0.6V and at the same time, the transistor Q 4 . Is turned on and the charge charged in capacitor (C 3 ) is released, so the reset Keeping the stage low (L) resets the microprocessor. Usually, the time required for resetting the microprocessor should be 2 μsec or more because the reset stage must be kept low (L) for 2 μsec or more after the reference voltage (Vcc) becomes 0.9 Vcc.

따라서 접지(GND)와 인가전압(VP)의 사이에 과부하가 걸리는 경우에 캐패시터(C2)의 양단전압이 0V이어서 캐패시터(C1)의 양단전압이 정상전압 보다 높으므로 리세트 회로로서는 이를 감지하지 못하게 되어 계속 리세트단을 하이(H)로 되게 하여 마이크로프로세서를 동작시키게 되므로 소자의 파괴결과를 초래하게 되며, 또한 리세트회로로 많은 소자를 사용함으로써 원가상승의 요인이 되었다.Therefore, if the voltage between both ends of capacitor C 2 is 0V when overload is applied between ground GND and applied voltage V P , the voltage between both ends of capacitor C 1 is higher than the normal voltage. Reset not detected and continue to reset Since the microprocessor is operated by making the stage high (H), the destruction of the device is caused. Also, the use of many devices as the reset circuit causes the cost increase.

본 고안의 목적은 일정 전압 이하의 저전압에서 마이크로 프로세서를 리세트시킴으로써 소자의 동작을 중지시킴과 동시에 마이크로프로세서의 초기 리세트 조건을 만족시키는 저전압 보호용 리세트회로를 제공하는 것이다.An object of the present invention is to provide a reset circuit for low voltage protection that stops the operation of the device by resetting the microprocessor at a low voltage below a certain voltage and at the same time satisfies the initial reset condition of the microprocessor.

이하 본 고안의 구성 및 작용효과를 예시 도면에 의거하여 상세히 설명한다.Hereinafter will be described in detail on the basis of the configuration and working effects of the present invention.

본 고안은 교류전압(Ac=120V/25V)이 트랜스(T)를 통해 브리지회로(BD)와 캐패시터(CA)로 직류 변환하여 저항(RC), 트랜지스터(QA), 제너다이오드(ZDA) 및 다이오드(DA)로 구성된 정전압회로로 기준전압(Vcc)과 접지(Vss) 사이의 전압을 만듬과 동시에 저항(RD),트랜지스터(QB), 제너다이오드(ZDB) 및 다이오드(DB)로 구성된 또하나의 정전압 회로로 기준전압과 인가전압(VP=-25V)사이의 전압을 만들고, 상기 캐패시터(CA)의 양단에 저항(RA), (RB)을 연결함과 동시에 그 사이의 접속점(A점)을 트랜지스터(QC)의 베이스에 연결하며, 그 콜렉터를 트랜지스터(QD)의 베이스에 연결하고, 트랜지스터(QD)의 콜렉터를 저항(RF)과 캐패시터(CB)에 연결함과 동시에 리세트단에 연결된 구성으로 되어 있다.According to the present invention, the AC voltage (Ac = 120V / 25V) is directly converted into a bridge circuit (BD) and a capacitor (C A ) through a transformer (T), so that a resistor (R C ), a transistor (Q A ), a zener diode (ZD) A ) and a constant voltage circuit consisting of a diode (D A ), which creates a voltage between the reference voltage (Vcc) and ground (Vss), and at the same time resistance (R D ), transistor (Q B ), zener diode (ZD B ) and diode Another constant voltage circuit composed of (D B ) forms a voltage between the reference voltage and the applied voltage (V P = -25V), and the resistors (R A ) and (R B ) are provided at both ends of the capacitor (C A ). connection, and at the same time connects the connection point (a point) between the base of the transistor (Q C), connecting its collector to the base of the transistor (Q D) and a transistor (Q D), the collector resistance (R F of ) And capacitor (C B ) and reset at the same time It is connected to the stage.

제2도에서 교류전압(AC)이 인가되면 브리지회로(BD)에서 전파 정류된 전류가 캐패시터(CA)를 통해 서서히 충전되어 그 양단의 전압을 증가시키게 되므로 그 전압이 TV이상인 경우에는 저항(RC), 트랜지스터(QA), 제너다이오드(ZDA)및 다이오드(DA)로 구성된 정전압회로는 작동하여 기준전압(Vcc)과 접지전압(Vss)사이에서 5V의 전압이 발생하게 된다.In FIG. 2, when the AC voltage AC is applied, the full-wave rectified current in the bridge circuit BD is gradually charged through the capacitor C A to increase the voltage at both ends thereof. The constant voltage circuit composed of R C ), the transistor Q A , the zener diode ZD A and the diode D A operates to generate a voltage of 5 V between the reference voltage Vcc and the ground voltage Vss.

이때 접속점(A점)의 전압은 기준전압(Vcc)을 기준으로 -5.7V(QC의 VEB〈0.6V)이상이므로 트랜지스터(QC)을 차단시킴과 동시에 트랜지스터(QD)을 도통시켜서 캐패시터(CB)에 잔류하고 있는 전하가 접지로 방출되고 리세트단은 로우(L)상태로 된다.At this time, the voltage at the connection point (point A) is greater than -5.7V (V EB <0.6V of Q C ) based on the reference voltage (Vcc), so that the transistor Q C is turned off and the transistor Q D is turned on. The charge remaining on capacitor C B is released to ground and reset The stage enters the low (L) state.

또한, 캐패시터(CA)의 양단전압이 어느정도 이상이 될때에는 저항(RA), (RB)간의 전압비로 트랜지스터(QC)의 베이스단에 기준전압(Vcc)이 -5.7V 이하(QC의 VEB〉0.7V)의 전압을 걸려서(트랜지스터(QC)가 도통되고 트랜지스터(QD)의 베이스단이 접지전압(Vss)과 같게 되므로 트랜지스터(QD)는 차단되고 그 콜렉터가 하이(H)상태를 유지하게 된다. 즉, 트랜지스터(QD)의 콜렉터에 연결된 바이어스저항(RF)에 흐르는 전류가 캐패시터(CB)를 충전시킴으로써 리세트단을 서서히 하이(H)상태로 유지시키므로 리세트 된다.In addition, when the voltage across the capacitor C A exceeds a certain level, the reference voltage Vcc is -5.7 V or less at the base terminal of the transistor Q C by the voltage ratio between the resistors R A and R B. It took the voltage V EB> 0.7V) of C (the transistor (Q C), because the conduction and the transistor base of the (Q D) equal to the ground voltage (Vss) transistor (Q D) is cut off the collector has a high (H) state, that is, the current flowing through the bias resistor R F connected to the collector of transistor Q D is reset by charging capacitor C B. It is reset because the stage is gradually kept high (H).

그리고 전압이 낮아졌을 경우에도 상술한 바와 같이 저항(RA), (RB)간의 전압분배로 트랜지스터(QC)가 차단됨과 동시에 트랜지스터(QD)가 도통되어 리세트단을 로우(L)상태로 유지시켜 리세트시킴으로 소자의 작동을 중지시킴과 아울러 입력전압이 일정 레벨이하로 떨어지는 것을 방지하게 된다. 또한 기준전압(Vcc)과 인가전압(VP)간에 있는 부품에 과부하게 걸려 단락되었을 경우에 캐패시터(CA) 양단의 전압은 낮아짐과 동시에 리세트회로가 작동되어 리세트시킴으로써 다른 부품에는 아무런 영향을 주지 않고 소자들을 보호할 수 있다.Even when the voltage is lowered, as described above, the transistor Q C is blocked by the voltage distribution between the resistors R A and R B and the transistor Q D is turned on to reset the transistor Q C. Resetting the stage by keeping it low (L) stops the operation of the device and prevents the input voltage from dropping below a certain level. In addition, if the component between the reference voltage (Vcc) and the applied voltage (V P ) is overloaded and short-circuited, the voltage across the capacitor (C A ) is lowered and the reset circuit is operated to reset, which has no effect on other components. The devices can be protected without the need for this.

상술한 바와 같이 본 고안은 종래의 회로 보다도 더 작은 소자로 리세트회로를 구성함으로써 원가가 절감되며, 또한 종래의 접지전압(GND)과 인가전압(VP) 사이에 있는 소자들이 단락되었을 경우에 리세트회로는 작동이 되지 않았으나 본 고안은 리세트 회로의 뒤단에 있는 소자들이 단락되었을 경우에도 리세트시킴으로써 구동되고 있는 소자들을 보호할 수가 있다.As described above, the present invention can reduce the cost by configuring the reset circuit with a smaller element than the conventional circuit, and in the case where the elements between the conventional ground voltage (GND) and the applied voltage (V P ) are short-circuited. Although the reset circuit has not been operated, the present invention can protect the devices being driven by resetting even if the devices at the rear end of the reset circuit are shorted.

Claims (1)

교류전압이 인가되는 트랜스(T)를 거쳐 브리지회로(BD) 및 캐패시터(CA)가 직류 변환하고, 상기 캐패시터(CA)의 양단에 전압분배용 저항(RA, RB)이 접속되고, 저항, 트랜지스터, 제너다이오드 및 다이오드로 구성된 제1 및 제2의 정전압 회로가 전압차를 만들기 위해 각 전원(Vcc, Vss, Vp)에 연결되고, 상기 저항(RA, RB)의 접속점(A)에 트랜지스터(QC)의 베이스가 연결되고, 그 콜렉터에 저항(RE)를 통해 트랜지스터(QD)의 베이스가 연결되고, 그 콜렉터에 저항(RF) 및 캐패시터(CB)를 거쳐 리세트단이 접속되는 구성을 특징으로 하는 저전압 보호용 리세트회로.The bridge circuit BD and the capacitor C A are DC-converted via a transformer T to which an AC voltage is applied, and voltage distribution resistors R A and R B are connected to both ends of the capacitor C A. And first and second constant voltage circuits consisting of resistors, transistors, zener diodes and diodes are connected to respective power supplies Vcc, Vss, and Vp to make a voltage difference, and the connection points of the resistors R A and R B ( a) the transistor (and the base is connected to the Q C), and the base of the transistor (Q D) connected through a resistor (R E) in the collector, a resistor (R F) and a capacitor (C B) to the collector on the A reset circuit for low voltage protection, characterized by a configuration in which a reset stage is connected via a channel.
KR2019880006706U 1988-05-03 1988-05-03 Resetting circuit for protection of low-voltage KR930004898Y1 (en)

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Application Number Priority Date Filing Date Title
KR2019880006706U KR930004898Y1 (en) 1988-05-03 1988-05-03 Resetting circuit for protection of low-voltage

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Application Number Priority Date Filing Date Title
KR2019880006706U KR930004898Y1 (en) 1988-05-03 1988-05-03 Resetting circuit for protection of low-voltage

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KR890023501U KR890023501U (en) 1989-12-02
KR930004898Y1 true KR930004898Y1 (en) 1993-07-26

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